<div dir="ltr">Merged to 6.0 in r323743.</div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Jan 29, 2018 at 6:56 PM, Craig Topper via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: ctopper<br>
Date: Mon Jan 29 09:56:57 2018<br>
New Revision: 323672<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=323672&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project?rev=323672&view=rev</a><br>
Log:<br>
[X86] Don't create SHRUNKBLEND when the condition is used by the true or false operand of the vselect.<br>
<br>
Fixes PR34592.<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D42628" rel="noreferrer" target="_blank">https://reviews.llvm.org/<wbr>D42628</a><br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/<wbr>X86ISelLowering.cpp<br>
llvm/trunk/test/CodeGen/X86/<wbr>pr34592.ll<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>X86ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=323672&r1=323671&r2=323672&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86ISelLowering.cpp?rev=<wbr>323672&r1=323671&r2=323672&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>X86ISelLowering.cpp Mon Jan 29 09:56:57 2018<br>
@@ -31828,9 +31828,10 @@ static SDValue combineSelect(SDNode *N,<br>
// Check all uses of the condition operand to check whether it will be<br>
// consumed by non-BLEND instructions. Those may require that all bits<br>
// are set properly.<br>
- for (SDNode *U : Cond->uses()) {<br>
+ for (SDNode::use_iterator UI = Cond->use_begin(), UE = Cond->use_end();<br>
+ UI != UE; ++UI) {<br>
// TODO: Add other opcodes eventually lowered into BLEND.<br>
- if (U->getOpcode() != ISD::VSELECT)<br>
+ if (UI->getOpcode() != ISD::VSELECT || UI.getOperandNo() != 0)<br>
return SDValue();<br>
}<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/<wbr>pr34592.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34592.ll?rev=323672&r1=323671&r2=323672&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>CodeGen/X86/pr34592.ll?rev=<wbr>323672&r1=323671&r2=323672&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/<wbr>pr34592.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/<wbr>pr34592.ll Mon Jan 29 09:56:57 2018<br>
@@ -10,7 +10,7 @@ define <16 x i64> @pluto(<16 x i64> %arg<br>
; CHECK-NEXT: movq %rsp, %rbp<br>
; CHECK-NEXT: .cfi_def_cfa_register %rbp<br>
; CHECK-NEXT: andq $-32, %rsp<br>
-; CHECK-NEXT: subq $128, %rsp<br>
+; CHECK-NEXT: subq $288, %rsp # imm = 0x120<br>
; CHECK-NEXT: vmovaps 240(%rbp), %ymm8<br>
; CHECK-NEXT: vmovaps 208(%rbp), %ymm9<br>
; CHECK-NEXT: vmovaps 176(%rbp), %ymm10<br>
@@ -23,39 +23,42 @@ define <16 x i64> @pluto(<16 x i64> %arg<br>
; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [0,0,18446744071562067968,<wbr>18446744071562067968]<br>
; CHECK-NEXT: vblendvpd %ymm0, %ymm2, %ymm6, %ymm0<br>
; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2<br>
-; CHECK-NEXT: vblendvpd %ymm2, %ymm3, %ymm7, %ymm3<br>
-; CHECK-NEXT: vblendvpd %ymm2, %ymm1, %ymm5, %ymm1<br>
-; CHECK-NEXT: vpblendd {{.*#+}} ymm5 = ymm2[0,1],ymm13[2,3],ymm2[4,5,<wbr>6,7]<br>
-; CHECK-NEXT: vpblendd {{.*#+}} ymm6 = ymm14[0,1],ymm2[2,3,4,5],<wbr>ymm14[6,7]<br>
-; CHECK-NEXT: vpblendd {{.*#+}} ymm7 = ymm15[0,1],ymm11[2,3,4,5,6,7]<br>
-; CHECK-NEXT: vblendvpd %ymm2, %ymm10, %ymm6, %ymm6<br>
-; CHECK-NEXT: vmovaps {{.*#+}} ymm10 = [18446744071562067968,<wbr>18446744071562067968,0,0]<br>
-; CHECK-NEXT: vblendvpd %ymm10, %ymm9, %ymm5, %ymm5<br>
-; CHECK-NEXT: vblendvpd %ymm2, %ymm8, %ymm2, %ymm2<br>
-; CHECK-NEXT: vpshufd {{.*#+}} ymm8 = ymm1[0,1,0,1,4,5,4,5]<br>
-; CHECK-NEXT: vpblendd {{.*#+}} ymm9 = ymm3[0,1],ymm2[2,3],ymm3[4,5,<wbr>6,7]<br>
-; CHECK-NEXT: vpermq {{.*#+}} ymm9 = ymm9[2,1,1,3]<br>
-; CHECK-NEXT: vpblendd {{.*#+}} ymm8 = ymm9[0,1,2,3,4,5],ymm8[6,7]<br>
+; CHECK-NEXT: vpblendd {{.*#+}} ymm6 = ymm2[0,1],ymm13[2,3],ymm2[4,5,<wbr>6,7]<br>
+; CHECK-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm8[2,3,4,5,6,7]<br>
+; CHECK-NEXT: vmovaps {{.*#+}} ymm8 = [18446744071562067968,<wbr>18446744071562067968,0,0]<br>
+; CHECK-NEXT: vblendvpd %ymm8, %ymm9, %ymm6, %ymm6<br>
+; CHECK-NEXT: vpblendd {{.*#+}} ymm8 = ymm15[0,1],ymm11[2,3,4,5,6,7]<br>
+; CHECK-NEXT: vpalignr {{.*#+}} ymm8 = ymm0[8,9,10,11,12,13,14,15],<wbr>ymm8[0,1,2,3,4,5,6,7],ymm0[24,<wbr>25,26,27,28,29,30,31],ymm8[16,<wbr>17,18,19,20,21,22,23]<br>
+; CHECK-NEXT: vpermq {{.*#+}} ymm8 = ymm8[2,3,2,0]<br>
+; CHECK-NEXT: vmovaps %xmm6, %xmm9<br>
+; CHECK-NEXT: # implicit-def: %ymm11<br>
+; CHECK-NEXT: vinserti128 $1, %xmm9, %ymm11, %ymm11<br>
+; CHECK-NEXT: vpblendd {{.*#+}} ymm8 = ymm8[0,1,2,3],ymm11[4,5],ymm8[<wbr>6,7]<br>
; CHECK-NEXT: vmovaps %xmm0, %xmm9<br>
-; CHECK-NEXT: # implicit-def: %ymm10<br>
-; CHECK-NEXT: vinserti128 $1, %xmm9, %ymm10, %ymm10<br>
-; CHECK-NEXT: vpunpcklqdq {{.*#+}} ymm2 = ymm3[0],ymm2[0],ymm3[2],ymm2[<wbr>2]<br>
-; CHECK-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,1,2,3]<br>
-; CHECK-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm10[4,5,6,7]<br>
-; CHECK-NEXT: vpalignr {{.*#+}} ymm1 = ymm5[8,9,10,11,12,13,14,15],<wbr>ymm1[0,1,2,3,4,5,6,7],ymm5[24,<wbr>25,26,27,28,29,30,31],ymm1[16,<wbr>17,18,19,20,21,22,23]<br>
-; CHECK-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,1,0,3]<br>
-; CHECK-NEXT: vpunpcklqdq {{.*#+}} ymm3 = ymm6[0],ymm3[0],ymm6[2],ymm3[<wbr>2]<br>
-; CHECK-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,1,2,3]<br>
-; CHECK-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1,2,3],ymm1[4,5,6,7]<br>
-; CHECK-NEXT: vpalignr {{.*#+}} ymm0 = ymm0[8,9,10,11,12,13,14,15],<wbr>ymm7[0,1,2,3,4,5,6,7],ymm0[24,<wbr>25,26,27,28,29,30,31],ymm7[16,<wbr>17,18,19,20,21,22,23]<br>
-; CHECK-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,3,2,0]<br>
-; CHECK-NEXT: vmovaps %xmm5, %xmm9<br>
-; CHECK-NEXT: # implicit-def: %ymm1<br>
-; CHECK-NEXT: vinserti128 $1, %xmm9, %ymm1, %ymm1<br>
-; CHECK-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5],ymm0[<wbr>6,7]<br>
-; CHECK-NEXT: vmovaps %ymm8, %ymm1<br>
+; CHECK-NEXT: # implicit-def: %ymm0<br>
+; CHECK-NEXT: vinserti128 $1, %xmm9, %ymm0, %ymm0<br>
+; CHECK-NEXT: vpunpcklqdq {{.*#+}} ymm11 = ymm7[0],ymm2[0],ymm7[2],ymm2[<wbr>2]<br>
+; CHECK-NEXT: vpermq {{.*#+}} ymm11 = ymm11[2,1,2,3]<br>
+; CHECK-NEXT: vpblendd {{.*#+}} ymm0 = ymm11[0,1,2,3],ymm0[4,5,6,7]<br>
+; CHECK-NEXT: vpblendd {{.*#+}} ymm2 = ymm7[0,1],ymm2[2,3],ymm7[4,5,<wbr>6,7]<br>
+; CHECK-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,1,1,3]<br>
+; CHECK-NEXT: vpshufd {{.*#+}} ymm11 = ymm5[0,1,0,1,4,5,4,5]<br>
+; CHECK-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3,4,5],ymm11[6,7]<br>
+; CHECK-NEXT: vpalignr {{.*#+}} ymm5 = ymm6[8,9,10,11,12,13,14,15],<wbr>ymm5[0,1,2,3,4,5,6,7],ymm6[24,<wbr>25,26,27,28,29,30,31],ymm5[16,<wbr>17,18,19,20,21,22,23]<br>
+; CHECK-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,1,0,3]<br>
+; CHECK-NEXT: vpslldq {{.*#+}} ymm6 = zero,zero,zero,zero,zero,zero,<wbr>zero,zero,ymm7[0,1,2,3,4,5,6,<wbr>7],zero,zero,zero,zero,zero,<wbr>zero,zero,zero,ymm7[16,17,18,<wbr>19,20,21,22,23]<br>
+; CHECK-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1,2,3],ymm5[4,5,6,7]<br>
+; CHECK-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill<br>
+; CHECK-NEXT: vmovaps %ymm8, %ymm0<br>
+; CHECK-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp) # 32-byte Spill<br>
+; CHECK-NEXT: vmovaps %ymm2, %ymm1<br>
+; CHECK-NEXT: vmovaps {{[0-9]+}}(%rsp), %ymm2 # 32-byte Reload<br>
+; CHECK-NEXT: vmovaps %ymm3, {{[0-9]+}}(%rsp) # 32-byte Spill<br>
+; CHECK-NEXT: vmovaps %ymm5, %ymm3<br>
+; CHECK-NEXT: vmovaps %ymm10, {{[0-9]+}}(%rsp) # 32-byte Spill<br>
+; CHECK-NEXT: vmovaps %ymm12, {{[0-9]+}}(%rsp) # 32-byte Spill<br>
; CHECK-NEXT: vmovaps %ymm4, {{[0-9]+}}(%rsp) # 32-byte Spill<br>
-; CHECK-NEXT: vmovaps %ymm12, (%rsp) # 32-byte Spill<br>
+; CHECK-NEXT: vmovaps %ymm14, (%rsp) # 32-byte Spill<br>
; CHECK-NEXT: movq %rbp, %rsp<br>
; CHECK-NEXT: popq %rbp<br>
; CHECK-NEXT: retq<br>
<br>
<br>
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</blockquote></div><br></div>