<div dir="ltr">Merged to 6.0 in r323770.</div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Jan 25, 2018 at 10:23 PM, Craig Topper via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: ctopper<br>
Date: Thu Jan 25 13:23:57 2018<br>
New Revision: 323469<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=323469&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project?rev=323469&view=rev</a><br>
Log:<br>
[X86] Teach Intel syntax InstPrinter to print lock prefixes that have been parsed from the asm parser.<br>
<br>
The asm parser puts the lock prefix in the MCInst flags so we need to check that in addition to TSFlags. This matches what the ATT printer does.<br>
<br>
Modified:<br>
    llvm/trunk/lib/Target/X86/<wbr>InstPrinter/<wbr>X86IntelInstPrinter.cpp<br>
    llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>InstPrinter/<wbr>X86IntelInstPrinter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp?rev=323469&r1=323468&r2=323469&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/InstPrinter/<wbr>X86IntelInstPrinter.cpp?rev=<wbr>323469&r1=323468&r2=323469&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>InstPrinter/<wbr>X86IntelInstPrinter.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>InstPrinter/<wbr>X86IntelInstPrinter.cpp Thu Jan 25 13:23:57 2018<br>
@@ -39,11 +39,11 @@ void X86IntelInstPrinter::<wbr>printInst(cons<br>
                                     const MCSubtargetInfo &STI) {<br>
   const MCInstrDesc &Desc = MII.get(MI->getOpcode());<br>
   uint64_t TSFlags = Desc.TSFlags;<br>
+  unsigned Flags = MI->getFlags();<br>
<br>
-  if (TSFlags & X86II::LOCK)<br>
+  if ((TSFlags & X86II::LOCK) || (Flags & X86::IP_HAS_LOCK))<br>
     OS << "\tlock\t";<br>
<br>
-  unsigned Flags = MI->getFlags();<br>
   if (Flags & X86::IP_HAS_REPEAT_NE)<br>
     OS << "\trepne\t";<br>
   else if (Flags & X86::IP_HAS_REPEAT)<br>
<br>
Modified: llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32-coverage.s?rev=323469&r1=323468&r2=323469&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/MC/<wbr>X86/x86-32-coverage.s?rev=<wbr>323469&r1=323468&r2=323469&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s (original)<br>
+++ llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s Thu Jan 25 13:23:57 2018<br>
@@ -10774,3 +10774,9 @@ btcl $4, (%eax)<br>
 // CHECK:      clzero<br>
 // CHECK:  encoding: [0x0f,0x01,0xfc]<br>
                clzero<br>
+<br>
+// CHECK: lock addl %esi, (%edi)<br>
+// INTEL: lock add dword ptr [edi], esi<br>
+// CHECK:  encoding: [0xf0,0x01,0x37]<br>
+               lock add %esi, (%edi)<br>
+<br>
<br>
<br>
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</blockquote></div><br></div>