<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=us-ascii">
<style type="text/css" style="display:none;"><!-- P {margin-top:0;margin-bottom:0;} --></style>
</head>
<body dir="ltr">
<div id="divtagdefaultwrapper" style="font-size:12pt;color:#000000;font-family:Calibri,Helvetica,sans-serif;" dir="ltr">
<p style="margin-top:0;margin-bottom:0">Hi Bill,</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0">Thanks for letting me know, I've reverted in the patch in
<span>r321349</span>.</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0">Regards,</p>
<p style="margin-top:0;margin-bottom:0">sam<br>
</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<div id="Signature">
<div id="divtagdefaultwrapper" dir="ltr" style="font-size:12pt; color:rgb(0,0,0); background-color:rgb(255,255,255); font-family:Calibri,Arial,Helvetica,sans-serif,EmojiFont,"Apple Color Emoji","Segoe UI Emoji",NotoColorEmoji,"Segoe UI Symbol","Android Emoji",EmojiSymbols,EmojiFont,"Apple Color Emoji","Segoe UI Emoji",NotoColorEmoji,"Segoe UI Symbol","Android Emoji",EmojiSymbols">
<p></p>
<p style="font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Sam Parker</span></p>
<span style="font-family:Calibri,Helvetica,sans-serif"></span>
<p style="font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Compilation Tools Engineer | Arm</span></p>
<span style="font-family:Calibri,Helvetica,sans-serif"></span>
<p style="font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">. . . . . . . . . . . . . . . . . . . . . . . . . . .</span></p>
<span style="font-family:Calibri,Helvetica,sans-serif"></span>
<p style="font-family:"Times New Roman""><span style="font-family:Calibri,Helvetica,sans-serif">Arm.com</span></p>
<p></p>
</div>
</div>
</div>
<hr style="display:inline-block;width:98%" tabindex="-1">
<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Bill Seurer <seurer@linux.vnet.ibm.com><br>
<b>Sent:</b> 22 December 2017 07:18:25<br>
<b>To:</b> Sam Parker; llvm-commits@lists.llvm.org<br>
<b>Subject:</b> Re: [llvm] r321259 - [DAGCombine] Improve ReduceLoadWidth for SRL</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">This revision is causing problems on powerpc64 BE (but not LE). On a
<br>
multistage build clang fails when running many of the tests but <br>
especially sanitizer tests. You can see where the failures began here: <br>
<a href="http://lab.llvm.org:8011/buildslaves/ppc64be-sanitizer">http://lab.llvm.org:8011/buildslaves/ppc64be-sanitizer</a><br>
<br>
One example from a check-all:<br>
<br>
[1/458] : && /home/seurer/llvm/install/llvm-test/bin/clang++ -fPIC <br>
-fvisibility-inlines-hidden -Werror=date-time <br>
-Werror=unguarded-availability-new -std=c++11 -Wall -W <br>
-Wno-unused-parameter -Wwrite-strings -Wcast-qual <br>
-Wmissing-field-initializers -pedantic -Wno-long-long <br>
-Wcovered-switch-default -Wnon-virtual-dtor -Wdelete-non-virtual-dtor <br>
-Wstring-conversion -fcolor-diagnostics -ffunction-sections <br>
-fdata-sections -fno-common -Woverloaded-virtual -Wno-nested-anon-types <br>
-O3 -L/home/seurer/gcc/install/gcc-6.3.0/lib64 <br>
-Wl,-allow-shlib-undefined -Wl,-O3 -Wl,--gc-sections <br>
tools/clang/unittests/StaticAnalyzer/CMakeFiles/StaticAnalysisTests.dir/AnalyzerOptionsTest.cpp.o
<br>
-o tools/clang/unittests/StaticAnalyzer/StaticAnalysisTests <br>
lib/libLLVMSupport.a lib/libLLVMSupport.a -lpthread lib/libgtest_main.a <br>
lib/libgtest.a -lpthread lib/libclangBasic.a lib/libclangAnalysis.a <br>
lib/libclangStaticAnalyzerCore.a -lpthread lib/libclangAnalysis.a <br>
lib/libclangASTMatchers.a lib/libclangAST.a lib/libclangRewrite.a <br>
lib/libclangLex.a lib/libclangBasic.a lib/libLLVMCore.a <br>
lib/libLLVMBinaryFormat.a lib/libLLVMMC.a lib/libLLVMSupport.a -lz -lrt <br>
-ldl -ltinfo -lpthread -lm lib/libLLVMDemangle.a && :<br>
[2/458] cd <br>
/home/seurer/llvm/build/llvm-multistage/projects/compiler-rt/lib/tsan/tests/unit <br>
&& /home/seurer/llvm/build/llvm-multistage/./bin/clang -fPIC <br>
-fvisibility-inlines-hidden -Werror=date-time <br>
-Werror=unguarded-availability-new -std=c++11 -Wall -W <br>
-Wno-unused-parameter -Wwrite-strings -Wcast-qual <br>
-Wmissing-field-initializers -pedantic -Wno-long-long <br>
-Wcovered-switch-default -Wnon-virtual-dtor -Wdelete-non-virtual-dtor <br>
-Wstring-conversion -fcolor-diagnostics -ffunction-sections <br>
-fdata-sections -Wall -std=c++11 -Wno-unused-parameter <br>
-Wno-unknown-warning-option -fPIC -fno-builtin -fno-exceptions <br>
-fomit-frame-pointer -funwind-tables -fno-stack-protector <br>
-fno-sanitize=safe-stack -fvisibility=hidden -fno-lto -O3 <br>
-gline-tables-only -Wno-gnu -Wno-variadic-macros -Wno-c99-extensions <br>
-Wno-non-virtual-dtor -fPIE -fno-rtti -Wno-covered-switch-default <br>
-DGTEST_NO_LLVM_RAW_OSTREAM=1 -DGTEST_HAS_RTTI=0 <br>
-I/home/seurer/llvm/llvm-multistage/utils/unittest/googletest/include <br>
-I/home/seurer/llvm/llvm-multistage/utils/unittest/googletest <br>
-I/home/seurer/llvm/llvm-multistage/projects/compiler-rt/include <br>
-I/home/seurer/llvm/llvm-multistage/projects/compiler-rt/lib <br>
-I/home/seurer/llvm/llvm-multistage/projects/compiler-rt/lib/tsan/rtl <br>
-DGTEST_HAS_RTTI=0 -m64 -c -o <br>
TsanUnitTestsObjects.tsan_unit_test_main.cc.powerpc64.o <br>
/home/seurer/llvm/llvm-multistage/projects/compiler-rt/lib/tsan/tests/unit/tsan_unit_test_main.cc<br>
FAILED: <br>
projects/compiler-rt/lib/tsan/tests/unit/TsanUnitTestsObjects.tsan_unit_test_main.cc.powerpc64.o
<br>
<br>
cd <br>
/home/seurer/llvm/build/llvm-multistage/projects/compiler-rt/lib/tsan/tests/unit <br>
&& /home/seurer/llvm/build/llvm-multistage/./bin/clang -fPIC <br>
-fvisibility-inlines-hidden -Werror=date-time <br>
-Werror=unguarded-availability-new -std=c++11 -Wall -W <br>
-Wno-unused-parameter -Wwrite-strings -Wcast-qual <br>
-Wmissing-field-initializers -pedantic -Wno-long-long <br>
-Wcovered-switch-default -Wnon-virtual-dtor -Wdelete-non-virtual-dtor <br>
-Wstring-conversion -fcolor-diagnostics -ffunction-sections <br>
-fdata-sections -Wall -std=c++11 -Wno-unused-parameter <br>
-Wno-unknown-warning-option -fPIC -fno-builtin -fno-exceptions <br>
-fomit-frame-pointer -funwind-tables -fno-stack-protector <br>
-fno-sanitize=safe-stack -fvisibility=hidden -fno-lto -O3 <br>
-gline-tables-only -Wno-gnu -Wno-variadic-macros -Wno-c99-extensions <br>
-Wno-non-virtual-dtor -fPIE -fno-rtti -Wno-covered-switch-default <br>
-DGTEST_NO_LLVM_RAW_OSTREAM=1 -DGTEST_HAS_RTTI=0 <br>
-I/home/seurer/llvm/llvm-multistage/utils/unittest/googletest/include <br>
-I/home/seurer/llvm/llvm-multistage/utils/unittest/googletest <br>
-I/home/seurer/llvm/llvm-multistage/projects/compiler-rt/include <br>
-I/home/seurer/llvm/llvm-multistage/projects/compiler-rt/lib <br>
-I/home/seurer/llvm/llvm-multistage/projects/compiler-rt/lib/tsan/rtl <br>
-DGTEST_HAS_RTTI=0 -m64 -c -o <br>
TsanUnitTestsObjects.tsan_unit_test_main.cc.powerpc64.o <br>
/home/seurer/llvm/llvm-multistage/projects/compiler-rt/lib/tsan/tests/unit/tsan_unit_test_main.cc<br>
clang-6.0: <br>
/home/seurer/llvm/llvm-multistage/tools/clang/include/clang/Sema/AttributeList.h:425:
<br>
clang::ArgsUnion clang::AttributeList::getArg(unsigned int) const: <br>
Assertion `Arg < NumArgs && "Arg access out of range!"' failed.<br>
#0 0x0000000011de472c PrintStackTraceSignalHandler(void*) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x11de472c)<br>
#1 0x0000000011de4bc0 SignalHandler(int) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x11de4bc0)<br>
#2 0x00003fff89560478 0x478 __GI_abort<br>
#3 0x00003fff89560478<br>
#4 0x00003fff89560478 __assert_fail_base (+0x478)<br>
#5 0x00003fff88ea35c8 __GI___assert_fail (/lib64/libc.so.6+0x635c8)<br>
#6 0x00003fff88e96e7c <br>
clang::Sema::checkStringLiteralArgumentAttr(clang::AttributeList const&, <br>
unsigned int, llvm::StringRef&, clang::SourceLocation*) <br>
(/lib64/libc.so.6+0x56e7c)<br>
#7 0x00003fff88e96f6c ProcessDeclAttribute(clang::Sema&, clang::Scope*, <br>
clang::Decl*, clang::AttributeList const&, bool) (/lib64/libc.so.6+0x56f6c)<br>
#8 0x00000000131d824c <br>
clang::Sema::ProcessDeclAttributeList(clang::Scope*, clang::Decl*, <br>
clang::AttributeList const*, bool) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x131d824c)<br>
#9 0x00000000131ed8f4 clang::Sema::ActOnStartNamespaceDef(clang::Scope*, <br>
clang::SourceLocation, clang::SourceLocation, clang::SourceLocation, <br>
clang::IdentifierInfo*, clang::SourceLocation, clang::AttributeList*, <br>
clang::UsingDirectiveDecl*&) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x131ed8f4)<br>
#10 0x00000000131e5398 clang::Parser::ParseNamespace(unsigned int, <br>
clang::SourceLocation&, clang::SourceLocation) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x131e5398)<br>
#11 0x000000001329783c clang::Parser::ParseDeclaration(unsigned int, <br>
clang::SourceLocation&, clang::Parser::ParsedAttributesWithRange&) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x1329783c)<br>
#12 0x0000000012e23abc <br>
clang::Parser::ParseExternalDeclaration(clang::Parser::ParsedAttributesWithRange&,
<br>
clang::ParsingDeclSpec*) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12e23abc)<br>
#13 0x0000000012e0cd84 <br>
clang::Parser::ParseInnerNamespace(std::vector<clang::SourceLocation, <br>
std::allocator<clang::SourceLocation> >&, <br>
std::vector<clang::IdentifierInfo*, <br>
std::allocator<clang::IdentifierInfo*> >&, <br>
std::vector<clang::SourceLocation, std::allocator<clang::SourceLocation> <br>
>&, unsigned int, clang::SourceLocation&, clang::ParsedAttributes&, <br>
clang::BalancedDelimiterTracker&) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12e0cd84)<br>
#14 0x0000000012df22c8 clang::Parser::ParseNamespace(unsigned int, <br>
clang::SourceLocation&, clang::SourceLocation) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12df22c8)<br>
#15 0x0000000012e241a8 clang::Parser::ParseDeclaration(unsigned int, <br>
clang::SourceLocation&, clang::Parser::ParsedAttributesWithRange&) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12e241a8)<br>
#16 0x0000000012e23b20 <br>
clang::Parser::ParseExternalDeclaration(clang::Parser::ParsedAttributesWithRange&,
<br>
clang::ParsingDeclSpec*) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12e23b20)<br>
#17 0x0000000012e0cb64 <br>
clang::Parser::ParseTopLevelDecl(clang::OpaquePtr<clang::DeclGroupRef>&) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12e0cb64)<br>
#18 0x0000000012df22c8 clang::ParseAST(clang::Sema&, bool, bool) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12df22c8)<br>
#19 0x0000000012df1b6c clang::ASTFrontendAction::ExecuteAction() <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12df1b6c)<br>
#20 0x0000000012decb58 clang::CodeGenAction::ExecuteAction() <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12decb58)<br>
#21 0x0000000012444830 clang::FrontendAction::Execute() <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12444830)<br>
#22 0x000000001282bcb0 <br>
clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x1282bcb0)<br>
#23 0x0000000012443e70 <br>
clang::ExecuteCompilerInvocation(clang::CompilerInstance*) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x12443e70)<br>
#24 0x00000000123fa200 cc1_main(llvm::ArrayRef<char const*>, char <br>
const*, void*) <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x123fa200)<br>
#25 0x00000000124fd060 main <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x124fd060)<br>
#26 0x000000001046cfec generic_start_main.isra.0 <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x1046cfec)<br>
#27 0x000000001046ab48 __libc_start_main <br>
(/home/seurer/llvm/build/llvm-multistage/bin/clang-6.0+0x1046ab48)<br>
<br>
On 12/21/2017 06:55 AM, Sam Parker via llvm-commits wrote:<br>
> Author: sam_parker<br>
> Date: Thu Dec 21 04:55:04 2017<br>
> New Revision: 321259<br>
> <br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=321259&view=rev">http://llvm.org/viewvc/llvm-project?rev=321259&view=rev</a><br>
> Log:<br>
> [DAGCombine] Improve ReduceLoadWidth for SRL<br>
> <br>
> If the SRL node is only used by an AND, we may be able to set the<br>
> ExtVT to the width of the mask, making the AND redundant. To support<br>
> this, another check has been added in isLegalNarrowLoad which queries<br>
> whether the load is valid.<br>
> <br>
> Differential Revision: <a href="https://reviews.llvm.org/D41350">https://reviews.llvm.org/D41350</a><br>
> <br>
> Modified:<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
> llvm/trunk/test/CodeGen/ARM/shift-combine.ll<br>
> llvm/trunk/test/CodeGen/X86/h-registers-1.ll<br>
> <br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=321259&r1=321258&r2=321259&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=321259&r1=321258&r2=321259&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Dec 21 04:55:04 2017<br>
> @@ -3788,6 +3788,16 @@ bool DAGCombiner::isLegalNarrowLoad(Load<br>
> if (LoadN->getNumValues() > 2)<br>
> return false;<br>
> <br>
> + // Only allow byte offsets.<br>
> + if (ShAmt % 8)<br>
> + return false;<br>
> +<br>
> + // Ensure that this isn't going to produce an unsupported unaligned access.<br>
> + if (ShAmt && !TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(),<br>
> + ExtVT, LoadN->getAddressSpace(),<br>
> + ShAmt / 8))<br>
> + return false;<br>
> +<br>
> // If the load that we're shrinking is an extload and we're not just<br>
> // discarding the extension we can't simply shrink the load. Bail.<br>
> // TODO: It would be possible to merge the extensions in some cases.<br>
> @@ -8274,6 +8284,22 @@ SDValue DAGCombiner::ReduceLoadWidth(SDN<br>
> // then the result of the shift+trunc is zero/undef (handled elsewhere).<br>
> if (ShAmt >= cast<LoadSDNode>(N0)->getMemoryVT().getSizeInBits())<br>
> return SDValue();<br>
> +<br>
> + // If the SRL is only used by a masking AND, we may be able to adjust<br>
> + // the ExtVT to make the AND redundant.<br>
> + SDNode *Mask = *(N->use_begin());<br>
> + if (Mask->getOpcode() == ISD::AND &&<br>
> + isa<ConstantSDNode>(Mask->getOperand(1))) {<br>
> + const APInt &ShiftMask =<br>
> + cast<ConstantSDNode>(Mask->getOperand(1))->getAPIntValue();<br>
> + if (ShiftMask.isMask()) {<br>
> + EVT MaskedVT = EVT::getIntegerVT(*DAG.getContext(),<br>
> + ShiftMask.countTrailingOnes());<br>
> + // Recompute the type.<br>
> + if (TLI.isLoadExtLegal(ExtType, N0.getValueType(), MaskedVT))<br>
> + ExtVT = MaskedVT;<br>
> + }<br>
> + }<br>
> }<br>
> }<br>
> <br>
> <br>
> Modified: llvm/trunk/test/CodeGen/ARM/shift-combine.ll<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/shift-combine.ll?rev=321259&r1=321258&r2=321259&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/shift-combine.ll?rev=321259&r1=321258&r2=321259&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/CodeGen/ARM/shift-combine.ll (original)<br>
> +++ llvm/trunk/test/CodeGen/ARM/shift-combine.ll Thu Dec 21 04:55:04 2017<br>
> @@ -217,10 +217,23 @@ entry:<br>
> ret i32 %conv<br>
> }<br>
> <br>
> -; CHECK-LABEL: test_shift8_mask8<br>
> +; CHECK-LABEL: test_shift7_mask8<br>
> ; CHECK-BE: ldr r1, [r0]<br>
> ; CHECK-COMMON: ldr r1, [r0]<br>
> -; CHECK-COMMON: ubfx r1, r1, #8, #8<br>
> +; CHECK-COMMON: ubfx r1, r1, #7, #8<br>
> +; CHECK-COMMON: str r1, [r0]<br>
> +define arm_aapcscc void @test_shift7_mask8(i32* nocapture %p) {<br>
> +entry:<br>
> + %0 = load i32, i32* %p, align 4<br>
> + %shl = lshr i32 %0, 7<br>
> + %and = and i32 %shl, 255<br>
> + store i32 %and, i32* %p, align 4<br>
> + ret void<br>
> +}<br>
> +<br>
> +; CHECK-LABEL: test_shift8_mask8<br>
> +; CHECK-BE: ldrb r1, [r0, #2]<br>
> +; CHECK-COMMON: ldrb r1, [r0, #1]<br>
> ; CHECK-COMMON: str r1, [r0]<br>
> define arm_aapcscc void @test_shift8_mask8(i32* nocapture %p) {<br>
> entry:<br>
> @@ -231,10 +244,40 @@ entry:<br>
> ret void<br>
> }<br>
> <br>
> -; CHECK-LABEL: test_shift8_mask16<br>
> +; CHECK-LABEL: test_shift8_mask7<br>
> +; CHECK-BE: ldr r1, [r0]<br>
> +; CHECK-COMMON: ldr r1, [r0]<br>
> +; CHECK-COMMON: ubfx r1, r1, #8, #7<br>
> +; CHECK-COMMON: str r1, [r0]<br>
> +define arm_aapcscc void @test_shift8_mask7(i32* nocapture %p) {<br>
> +entry:<br>
> + %0 = load i32, i32* %p, align 4<br>
> + %shl = lshr i32 %0, 8<br>
> + %and = and i32 %shl, 127<br>
> + store i32 %and, i32* %p, align 4<br>
> + ret void<br>
> +}<br>
> +<br>
> +; CHECK-LABEL: test_shift9_mask8<br>
> ; CHECK-BE: ldr r1, [r0]<br>
> ; CHECK-COMMON: ldr r1, [r0]<br>
> -; CHECK-COMMON: ubfx r1, r1, #8, #16<br>
> +; CHECK-COMMON: ubfx r1, r1, #9, #8<br>
> +; CHECK-COMMON: str r1, [r0]<br>
> +define arm_aapcscc void @test_shift9_mask8(i32* nocapture %p) {<br>
> +entry:<br>
> + %0 = load i32, i32* %p, align 4<br>
> + %shl = lshr i32 %0, 9<br>
> + %and = and i32 %shl, 255<br>
> + store i32 %and, i32* %p, align 4<br>
> + ret void<br>
> +}<br>
> +<br>
> +; CHECK-LABEL: test_shift8_mask16<br>
> +; CHECK-ALIGN: ldr r1, [r0]<br>
> +; CHECK-ALIGN: ubfx r1, r1, #8, #16<br>
> +; CHECK-BE: ldrh r1, [r0, #1]<br>
> +; CHECK-ARM: ldrh r1, [r0, #1]<br>
> +; CHECK-THUMB: ldrh.w r1, [r0, #1]<br>
> ; CHECK-COMMON: str r1, [r0]<br>
> define arm_aapcscc void @test_shift8_mask16(i32* nocapture %p) {<br>
> entry:<br>
> @@ -243,6 +286,61 @@ entry:<br>
> %and = and i32 %shl, 65535<br>
> store i32 %and, i32* %p, align 4<br>
> ret void<br>
> +}<br>
> +<br>
> +; CHECK-LABEL: test_shift15_mask16<br>
> +; CHECK-COMMON: ldr r1, [r0]<br>
> +; CHECK-COMMON: ubfx r1, r1, #15, #16<br>
> +; CHECK-COMMON: str r1, [r0]<br>
> +define arm_aapcscc void @test_shift15_mask16(i32* nocapture %p) {<br>
> +entry:<br>
> + %0 = load i32, i32* %p, align 4<br>
> + %shl = lshr i32 %0, 15<br>
> + %and = and i32 %shl, 65535<br>
> + store i32 %and, i32* %p, align 4<br>
> + ret void<br>
> +}<br>
> +<br>
> +; CHECK-LABEL: test_shift16_mask15<br>
> +; CHECK-BE: ldrh r1, [r0]<br>
> +; CHECK-COMMON: ldrh r1, [r0, #2]<br>
> +; CHECK-COMMON: bfc r1, #15, #17<br>
> +; CHECK-COMMON: str r1, [r0]<br>
> +define arm_aapcscc void @test_shift16_mask15(i32* nocapture %p) {<br>
> +entry:<br>
> + %0 = load i32, i32* %p, align 4<br>
> + %shl = lshr i32 %0, 16<br>
> + %and = and i32 %shl, 32767<br>
> + store i32 %and, i32* %p, align 4<br>
> + ret void<br>
> +}<br>
> +<br>
> +; CHECK-LABEL: test_shift8_mask24<br>
> +; CHECK-BE: ldr r1, [r0]<br>
> +; CHECK-COMMON: ldr r1, [r0]<br>
> +; CHECK-ARM: lsr r1, r1, #8<br>
> +; CHECK-THUMB: lsrs r1, r1, #8<br>
> +; CHECK-COMMON: str r1, [r0]<br>
> +define arm_aapcscc void @test_shift8_mask24(i32* nocapture %p) {<br>
> +entry:<br>
> + %0 = load i32, i32* %p, align 4<br>
> + %shl = lshr i32 %0, 8<br>
> + %and = and i32 %shl, 16777215<br>
> + store i32 %and, i32* %p, align 4<br>
> + ret void<br>
> +}<br>
> +<br>
> +; CHECK-LABEL: test_shift24_mask16<br>
> +; CHECK-BE: ldrb r1, [r0]<br>
> +; CHECK-COMMON: ldrb r1, [r0, #3]<br>
> +; CHECK-COMMON: str r1, [r0]<br>
> +define arm_aapcscc void @test_shift24_mask16(i32* nocapture %p) {<br>
> +entry:<br>
> + %0 = load i32, i32* %p, align 4<br>
> + %shl = lshr i32 %0, 24<br>
> + %and = and i32 %shl, 65535<br>
> + store i32 %and, i32* %p, align 4<br>
> + ret void<br>
> }<br>
> <br>
> ; CHECK-LABEL: test_sext_shift8_mask8<br>
> <br>
> Modified: llvm/trunk/test/CodeGen/X86/h-registers-1.ll<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-registers-1.ll?rev=321259&r1=321258&r2=321259&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/h-registers-1.ll?rev=321259&r1=321258&r2=321259&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/CodeGen/X86/h-registers-1.ll (original)<br>
> +++ llvm/trunk/test/CodeGen/X86/h-registers-1.ll Thu Dec 21 04:55:04 2017<br>
> @@ -22,21 +22,18 @@ define i64 @foo(i64 %a, i64 %b, i64 %c,<br>
> ; CHECK-NEXT: movzbl %ah, %eax # NOREX<br>
> ; CHECK-NEXT: movq %rax, %r10<br>
> ; CHECK-NEXT: movzbl %dh, %edx # NOREX<br>
> -; CHECK-NEXT: movzbl %ch, %eax # NOREX<br>
> -; CHECK-NEXT: movq %rax, %r11<br>
> +; CHECK-NEXT: movzbl %ch, %ebp # NOREX<br>
> ; CHECK-NEXT: movq %r8, %rax<br>
> ; CHECK-NEXT: movzbl %ah, %ecx # NOREX<br>
> ; CHECK-NEXT: movq %r9, %rax<br>
> -; CHECK-NEXT: movzbl %ah, %ebp # NOREX<br>
> -; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %eax<br>
> -; CHECK-NEXT: movzbl %ah, %eax # NOREX<br>
> -; CHECK-NEXT: movl {{[0-9]+}}(%rsp), %ebx<br>
> -; CHECK-NEXT: movzbl %bh, %edi # NOREX<br>
> +; CHECK-NEXT: movzbl %ah, %ebx # NOREX<br>
> +; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %eax<br>
> +; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %edi<br>
> ; CHECK-NEXT: movq %r10, %r8<br>
> ; CHECK-NEXT: addq %r8, %rsi<br>
> -; CHECK-NEXT: addq %r11, %rdx<br>
> +; CHECK-NEXT: addq %rbp, %rdx<br>
> ; CHECK-NEXT: addq %rsi, %rdx<br>
> -; CHECK-NEXT: addq %rbp, %rcx<br>
> +; CHECK-NEXT: addq %rbx, %rcx<br>
> ; CHECK-NEXT: addq %rdi, %rax<br>
> ; CHECK-NEXT: addq %rcx, %rax<br>
> ; CHECK-NEXT: addq %rdx, %rax<br>
> @@ -58,21 +55,18 @@ define i64 @foo(i64 %a, i64 %b, i64 %c,<br>
> ; GNUX32-NEXT: movzbl %ah, %eax # NOREX<br>
> ; GNUX32-NEXT: movq %rax, %r10<br>
> ; GNUX32-NEXT: movzbl %dh, %edx # NOREX<br>
> -; GNUX32-NEXT: movzbl %ch, %eax # NOREX<br>
> -; GNUX32-NEXT: movq %rax, %r11<br>
> +; GNUX32-NEXT: movzbl %ch, %ebp # NOREX<br>
> ; GNUX32-NEXT: movq %r8, %rax<br>
> ; GNUX32-NEXT: movzbl %ah, %ecx # NOREX<br>
> ; GNUX32-NEXT: movq %r9, %rax<br>
> -; GNUX32-NEXT: movzbl %ah, %ebp # NOREX<br>
> -; GNUX32-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
> -; GNUX32-NEXT: movzbl %ah, %eax # NOREX<br>
> -; GNUX32-NEXT: movl {{[0-9]+}}(%esp), %ebx<br>
> -; GNUX32-NEXT: movzbl %bh, %edi # NOREX<br>
> +; GNUX32-NEXT: movzbl %ah, %ebx # NOREX<br>
> +; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %eax<br>
> +; GNUX32-NEXT: movzbl {{[0-9]+}}(%esp), %edi<br>
> ; GNUX32-NEXT: movq %r10, %r8<br>
> ; GNUX32-NEXT: addq %r8, %rsi<br>
> -; GNUX32-NEXT: addq %r11, %rdx<br>
> +; GNUX32-NEXT: addq %rbp, %rdx<br>
> ; GNUX32-NEXT: addq %rsi, %rdx<br>
> -; GNUX32-NEXT: addq %rbp, %rcx<br>
> +; GNUX32-NEXT: addq %rbx, %rcx<br>
> ; GNUX32-NEXT: addq %rdi, %rax<br>
> ; GNUX32-NEXT: addq %rcx, %rax<br>
> ; GNUX32-NEXT: addq %rdx, %rax<br>
> <br>
> <br>
> _______________________________________________<br>
> llvm-commits mailing list<br>
> llvm-commits@lists.llvm.org<br>
> <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
> <br>
<br>
<br>
-- <br>
<br>
-Bill Seurer<br>
<br>
</div>
</span></font></div>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose,
or store or copy the information in any medium. Thank you.
</body>
</html>