<div dir="ltr">Will do - I am running regression tests with the assert removed right now, but will put it back and get this info afterwards.<div><br></div><div>Teresa</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Dec 15, 2017 at 11:41 AM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Any chance you can get the value of the TSFlags variable in X86MCCodeEmitter::<wbr>emitOpcodePrefix at the time of the assertion failure. That should tell me which instruction is failing.</div><div class="gmail_extra"><span class="HOEnZb"><font color="#888888"><br clear="all"><div><div class="m_-556129395475363754gmail_signature" data-smartmail="gmail_signature">~Craig</div></div></font></span><div><div class="h5">
<br><div class="gmail_quote">On Fri, Dec 15, 2017 at 11:40 AM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Well that's a little concerning. I've removed the assert in r320850. I'll try to investigate why it was failing. Unless my logic is wrong, that means we weren't encoding the instruction we think we are.</div><div class="gmail_extra"><span class="m_-556129395475363754HOEnZb"><font color="#888888"><br clear="all"><div><div class="m_-556129395475363754m_-4234698857128772133gmail_signature" data-smartmail="gmail_signature">~Craig</div></div></font></span><div><div class="m_-556129395475363754h5">
<br><div class="gmail_quote">On Fri, Dec 15, 2017 at 11:33 AM, Teresa Johnson via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">I am hitting this assert in projects/compiler-rt/lib/as<wbr>an/tests/asan_asm_test.cc when regression testing on Linux x86.<div>Teresa</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Dec 15, 2017 at 9:22 AM, Craig Topper via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: ctopper<br>
Date: Fri Dec 15 09:22:58 2017<br>
New Revision: 320830<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=320830&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject?rev=320830&view=rev</a><br>
Log:<br>
[X86] Fix XSAVE64 and similar instructions to not be allowed by the assembler in 32-bit mode.<br>
<br>
There was a top level "let Predicates =" in the .td file that was overriding the Requires on each instruction.<br>
<br>
I've added an assert to the code emitter to catch more cases like this. I'm sure this isn't the only place where the right predicates aren't being applied. This assert already found that we don't block btq/btsq/btrq in 32-bit mode.<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/MCTa<wbr>rgetDesc/X86MCCodeEmitter.cpp<br>
llvm/trunk/lib/Target/X86/X86I<wbr>nstrFPStack.td<br>
llvm/trunk/lib/Target/X86/X86I<wbr>nstrSystem.td<br>
llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s<br>
<br>
Modified: llvm/trunk/lib/Target/X86/MCTa<wbr>rgetDesc/X86MCCodeEmitter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp?rev=320830&r1=320829&r2=320830&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/X8<wbr>6/MCTargetDesc/X86MCCodeEmitte<wbr>r.cpp?rev=320830&r1=320829&r2=<wbr>320830&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/MCTa<wbr>rgetDesc/X86MCCodeEmitter.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/MCTa<wbr>rgetDesc/X86MCCodeEmitter.cpp Fri Dec 15 09:22:58 2017<br>
@@ -1130,6 +1130,8 @@ bool X86MCCodeEmitter::emitOpcodePr<wbr>efix(<br>
EmitByte(0x40 | REX, CurByte, OS);<br>
Ret = true;<br>
}<br>
+ } else {<br>
+ assert(!(TSFlags & X86II::REX_W) && "REX.W requires 64bit mode.");<br>
}<br>
<br>
// 0x0F escape code must be emitted just before the opcode.<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86I<wbr>nstrFPStack.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFPStack.td?rev=320830&r1=320829&r2=320830&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/X8<wbr>6/X86InstrFPStack.td?rev=32083<wbr>0&r1=320829&r2=320830&view=dif<wbr>f</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/X86I<wbr>nstrFPStack.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86I<wbr>nstrFPStack.td Fri Dec 15 09:22:58 2017<br>
@@ -697,19 +697,18 @@ def FSCALE : I<0xD9, MRM_FD, (outs), (in<br>
def FCOMPP : I<0xDE, MRM_D9, (outs), (ins), "fcompp", [], IIC_FCOMPP>;<br>
} // Defs = [FPSW]<br>
<br>
-let Predicates = [HasFXSR] in {<br>
- def FXSAVE : I<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),<br>
- "fxsave\t$dst", [(int_x86_fxsave addr:$dst)], IIC_FXSAVE>, TB;<br>
- def FXSAVE64 : RI<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),<br>
- "fxsave64\t$dst", [(int_x86_fxsave64 addr:$dst)],<br>
- IIC_FXSAVE>, TB, Requires<[In64BitMode]>;<br>
- def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),<br>
- "fxrstor\t$src", [(int_x86_fxrstor addr:$src)], IIC_FXRSTOR>,<br>
- TB;<br>
- def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaque512mem:$src),<br>
- "fxrstor64\t$src", [(int_x86_fxrstor64 addr:$src)],<br>
- IIC_FXRSTOR>, TB, Requires<[In64BitMode]>;<br>
-} // Predicates = [FeatureFXSR]<br>
+def FXSAVE : I<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),<br>
+ "fxsave\t$dst", [(int_x86_fxsave addr:$dst)], IIC_FXSAVE>, TB,<br>
+ Requires<[HasFXSR]>;<br>
+def FXSAVE64 : RI<0xAE, MRM0m, (outs), (ins opaque512mem:$dst),<br>
+ "fxsave64\t$dst", [(int_x86_fxsave64 addr:$dst)],<br>
+ IIC_FXSAVE>, TB, Requires<[HasFXSR, In64BitMode]>;<br>
+def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src),<br>
+ "fxrstor\t$src", [(int_x86_fxrstor addr:$src)], IIC_FXRSTOR>,<br>
+ TB, Requires<[HasFXSR]>;<br>
+def FXRSTOR64 : RI<0xAE, MRM1m, (outs), (ins opaque512mem:$src),<br>
+ "fxrstor64\t$src", [(int_x86_fxrstor64 addr:$src)],<br>
+ IIC_FXRSTOR>, TB, Requires<[HasFXSR, In64BitMode]>;<br>
} // SchedRW<br>
<br>
//===------------------------<wbr>------------------------------<wbr>----------------===//<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86I<wbr>nstrSystem.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=320830&r1=320829&r2=320830&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/X8<wbr>6/X86InstrSystem.td?rev=320830<wbr>&r1=320829&r2=320830&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/X86I<wbr>nstrSystem.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86I<wbr>nstrSystem.td Fri Dec 15 09:22:58 2017<br>
@@ -555,49 +555,47 @@ let Uses = [EDX, EAX, ECX] in<br>
} // HasXSAVE<br>
<br>
let Uses = [EDX, EAX] in {<br>
-let Predicates = [HasXSAVE] in {<br>
- def XSAVE : I<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),<br>
- "xsave\t$dst",<br>
- [(int_x86_xsave addr:$dst, EDX, EAX)]>, PS;<br>
- def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),<br>
- "xsave64\t$dst",<br>
- [(int_x86_xsave64 addr:$dst, EDX, EAX)]>, PS, Requires<[In64BitMode]>;<br>
- def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),<br>
- "xrstor\t$dst",<br>
- [(int_x86_xrstor addr:$dst, EDX, EAX)]>, PS;<br>
- def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),<br>
- "xrstor64\t$dst",<br>
- [(int_x86_xrstor64 addr:$dst, EDX, EAX)]>, PS, Requires<[In64BitMode]>;<br>
-}<br>
+def XSAVE : I<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),<br>
+ "xsave\t$dst",<br>
+ [(int_x86_xsave addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE]>;<br>
+def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),<br>
+ "xsave64\t$dst",<br>
+ [(int_x86_xsave64 addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE, In64BitMode]>;<br>
+def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),<br>
+ "xrstor\t$dst",<br>
+ [(int_x86_xrstor addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE]>;<br>
+def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),<br>
+ "xrstor64\t$dst",<br>
+ [(int_x86_xrstor64 addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE, In64BitMode]>;<br>
let Predicates = [HasXSAVEOPT] in {<br>
def XSAVEOPT : I<0xAE, MRM6m, (outs), (ins opaque512mem:$dst),<br>
"xsaveopt\t$dst",<br>
- [(int_x86_xsaveopt addr:$dst, EDX, EAX)]>, PS;<br>
+ [(int_x86_xsaveopt addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVEOPT]>;<br>
def XSAVEOPT64 : RI<0xAE, MRM6m, (outs), (ins opaque512mem:$dst),<br>
"xsaveopt64\t$dst",<br>
- [(int_x86_xsaveopt64 addr:$dst, EDX, EAX)]>, PS, Requires<[In64BitMode]>;<br>
+ [(int_x86_xsaveopt64 addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVEOPT, In64BitMode]>;<br>
}<br>
let Predicates = [HasXSAVEC] in {<br>
def XSAVEC : I<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),<br>
"xsavec\t$dst",<br>
- [(int_x86_xsavec addr:$dst, EDX, EAX)]>, TB;<br>
+ [(int_x86_xsavec addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVEC]>;<br>
def XSAVEC64 : RI<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),<br>
"xsavec64\t$dst",<br>
- [(int_x86_xsavec64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;<br>
+ [(int_x86_xsavec64 addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVEC, In64BitMode]>;<br>
}<br>
let Predicates = [HasXSAVES] in {<br>
def XSAVES : I<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),<br>
"xsaves\t$dst",<br>
- [(int_x86_xsaves addr:$dst, EDX, EAX)]>, TB;<br>
+ [(int_x86_xsaves addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVES]>;<br>
def XSAVES64 : RI<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),<br>
"xsaves64\t$dst",<br>
- [(int_x86_xsaves64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;<br>
+ [(int_x86_xsaves64 addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVE, In64BitMode]>;<br>
def XRSTORS : I<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),<br>
"xrstors\t$dst",<br>
- [(int_x86_xrstors addr:$dst, EDX, EAX)]>, TB;<br>
+ [(int_x86_xrstors addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVES]>;<br>
def XRSTORS64 : RI<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),<br>
"xrstors64\t$dst",<br>
- [(int_x86_xrstors64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;<br>
+ [(int_x86_xrstors64 addr:$dst, EDX, EAX)]>, TB, Requires<[HasXSAVES, In64BitMode]>;<br>
}<br>
} // Uses<br>
} // SchedRW<br>
<br>
Modified: llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32-coverage.s?rev=320830&r1=320829&r2=320830&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/MC/X86/x<wbr>86-32-coverage.s?rev=320830&r1<wbr>=320829&r2=320830&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s (original)<br>
+++ llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s Fri Dec 15 09:22:58 2017<br>
@@ -10601,35 +10601,27 @@ blendvps %xmm0, (%eax), %xmm1<br>
// CHECK: btl $4, (%eax)<br>
// CHECK: btw $4, (%eax)<br>
// CHECK: btl $4, (%eax)<br>
-// CHECK: btq $4, (%eax)<br>
// CHECK: btsl $4, (%eax)<br>
// CHECK: btsw $4, (%eax)<br>
// CHECK: btsl $4, (%eax)<br>
-// CHECK: btsq $4, (%eax)<br>
// CHECK: btrl $4, (%eax)<br>
// CHECK: btrw $4, (%eax)<br>
// CHECK: btrl $4, (%eax)<br>
-// CHECK: btrq $4, (%eax)<br>
// CHECK: btcl $4, (%eax)<br>
// CHECK: btcw $4, (%eax)<br>
// CHECK: btcl $4, (%eax)<br>
-// CHECK: btcq $4, (%eax)<br>
bt $4, (%eax)<br>
btw $4, (%eax)<br>
btl $4, (%eax)<br>
-btq $4, (%eax)<br>
bts $4, (%eax)<br>
btsw $4, (%eax)<br>
btsl $4, (%eax)<br>
-btsq $4, (%eax)<br>
btr $4, (%eax)<br>
btrw $4, (%eax)<br>
btrl $4, (%eax)<br>
-btrq $4, (%eax)<br>
btc $4, (%eax)<br>
btcw $4, (%eax)<br>
btcl $4, (%eax)<br>
-btcq $4, (%eax)<br>
<br>
// CHECK: clflushopt 3735928559(%ebx,%ecx,8)<br>
// CHECK: encoding: [0x66,0x0f,0xae,0xbc,0xcb,0xef<wbr>,0xbe,0xad,0xde]<br>
<br>
<br>
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</font></span></blockquote></div><span class="m_-556129395475363754m_-4234698857128772133HOEnZb"><font color="#888888"><br><br clear="all"><div><br></div>-- <br><div class="m_-556129395475363754m_-4234698857128772133m_-1671825640134579722gmail_signature" data-smartmail="gmail_signature"><span style="font-family:Times;font-size:medium"><table cellspacing="0" cellpadding="0"><tbody><tr style="color:rgb(85,85,85);font-family:sans-serif;font-size:small"><td nowrap style="border-top-style:solid;border-top-color:rgb(213,15,37);border-top-width:2px">Teresa Johnson |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(51,105,232);border-top-width:2px"> Software Engineer |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(0,153,57);border-top-width:2px"> <a href="mailto:tejohnson@google.com" target="_blank">tejohnson@google.com</a> |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(238,178,17);border-top-width:2px"> <a href="tel:(408)%20460-2413" value="+14084602413" target="_blank">408-460-2413</a></td></tr></tbody></table></span></div>
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</blockquote></div><br></div></div></div>
</blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature" data-smartmail="gmail_signature"><span style="font-family:Times;font-size:medium"><table cellspacing="0" cellpadding="0"><tbody><tr style="color:rgb(85,85,85);font-family:sans-serif;font-size:small"><td nowrap style="border-top-style:solid;border-top-color:rgb(213,15,37);border-top-width:2px">Teresa Johnson |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(51,105,232);border-top-width:2px"> Software Engineer |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(0,153,57);border-top-width:2px"> <a href="mailto:tejohnson@google.com" target="_blank">tejohnson@google.com</a> |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(238,178,17);border-top-width:2px"> 408-460-2413</td></tr></tbody></table></span></div>
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