<div dir="ltr">I did end up forwarding repro instructions to Dehao and I think Teresa recommitted in r306935. So, I think everything has been resolved.</div><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Dec 13, 2017 at 6:32 AM, Teresa Johnson <span dir="ltr"><<a href="mailto:tejohnson@google.com" target="_blank">tejohnson@google.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div>+djasper</div><div><br></div>This one was actually an accidental recommit and noop (due to a problem in my git working directory) of something Daniel committed the day before:<div><br>[llvm] r306792 - Revert "r306473 - re-commit r306336: Enable vectorizer-maximize-bandwidth by default."<div><br></div><div>(so the comment about forwarding a repro to Dehao was Daniel's not mine).</div><div><br></div><div>Hopefully Daniel and/or Dehao can follow up with the status.</div></div><div><br></div><div>Thanks,</div><div>Teresa</div></div><div class="gmail_extra"><div><div class="h5"><br><div class="gmail_quote">On Tue, Dec 12, 2017 at 2:48 PM, Hal Finkel <span dir="ltr"><<a href="mailto:hfinkel@anl.gov" target="_blank">hfinkel@anl.gov</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi, Teresa, Dehao,<br>
<br>
Were you able to figure this out?<br>
<br>
-Hal<div class="m_3419749026596711539HOEnZb"><div class="m_3419749026596711539h5"><br>
<br>
<br>
On 06/30/2017 10:24 PM, Teresa Johnson via llvm-commits wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Author: tejohnson<br>
Date: Fri Jun 30 20:24:09 2017<br>
New Revision: 306936<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=306936&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject?rev=306936&view=rev</a><br>
Log:<br>
Revert "r306473 - re-commit r306336: Enable vectorizer-maximize-bandwidth by default."<br>
<br>
This still breaks PPC tests we have. I'll forward reproduction<br>
instructions to dehao.<br>
<br>
Modified:<br>
llvm/trunk/lib/Transforms/Vec<wbr>torize/LoopVectorize.cpp<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/AArch64/loop-vecto<wbr>rization-factors.ll<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/AArch64/reduction-<wbr>small-size.ll<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/ARM/gcc-examples.l<wbr>l<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/X86/fp64_to_uint32<wbr>-cost-model.ll<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/X86/gcc-examples.l<wbr>l<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/X86/masked_load_st<wbr>ore.ll<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/X86/no_fpmath.ll<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/X86/no_fpmath_with<wbr>_hotness.ll<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/X86/reduction-cras<wbr>h.ll<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/X86/vectorization-<wbr>remarks-loopid-dbg.ll<br>
llvm/trunk/test/Transforms/Lo<wbr>opVectorize/X86/vectorization-<wbr>remarks.ll<br>
<br>
Modified: llvm/trunk/lib/Transforms/Vect<wbr>orize/LoopVectorize.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Transform<wbr>s/Vectorize/LoopVectorize.cpp?<wbr>rev=306936&r1=306935&r2=306936<wbr>&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Transforms/Vect<wbr>orize/LoopVectorize.cpp (original)<br>
+++ llvm/trunk/lib/Transforms/Vect<wbr>orize/LoopVectorize.cpp Fri Jun 30 20:24:09 2017<br>
@@ -123,7 +123,7 @@ static cl::opt<unsigned> TinyTripCountVe<br>
"are incurred."));<br>
static cl::opt<bool> MaximizeBandwidth(<br>
- "vectorizer-maximize-bandwidth<wbr>", cl::init(true), cl::Hidden,<br>
+ "vectorizer-maximize-bandwidth<wbr>", cl::init(false), cl::Hidden,<br>
cl::desc("Maximize bandwidth when selecting vectorization factor which "<br>
"will be determined by the smallest type in loop."));<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/AArch64/loop-vector<wbr>ization-factors.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/AArch64/loop-<wbr>vectorization-factors.ll?rev=3<wbr>06936&r1=306935&r2=306936&view<wbr>=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/AArch64/loop-vector<wbr>ization-factors.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/AArch64/loop-vector<wbr>ization-factors.ll Fri Jun 30 20:24:09 2017<br>
@@ -88,9 +88,9 @@ for.body:<br>
}<br>
; CHECK-LABEL: @add_c(<br>
-; CHECK: load <16 x i8>, <16 x i8>*<br>
-; CHECK: add <16 x i16><br>
-; CHECK: store <16 x i16><br>
+; CHECK: load <8 x i8>, <8 x i8>*<br>
+; CHECK: add <8 x i16><br>
+; CHECK: store <8 x i16><br>
; Function Attrs: nounwind<br>
define void @add_c(i8* noalias nocapture readonly %p, i16* noalias nocapture %q, i32 %len) #0 {<br>
entry:<br>
@@ -116,9 +116,9 @@ for.body:<br>
}<br>
; CHECK-LABEL: @add_d(<br>
-; CHECK: load <8 x i16><br>
-; CHECK: add nsw <8 x i32><br>
-; CHECK: store <8 x i32><br>
+; CHECK: load <4 x i16><br>
+; CHECK: add nsw <4 x i32><br>
+; CHECK: store <4 x i32><br>
define void @add_d(i16* noalias nocapture readonly %p, i32* noalias nocapture %q, i32 %len) #0 {<br>
entry:<br>
%cmp7 = icmp sgt i32 %len, 0<br>
@@ -187,16 +187,16 @@ for.body:<br>
}<br>
; CHECK-LABEL: @add_f<br>
-; CHECK: load <16 x i16><br>
-; CHECK: trunc <16 x i16><br>
-; CHECK: shl <16 x i8><br>
-; CHECK: add <16 x i8><br>
-; CHECK: or <16 x i8><br>
-; CHECK: mul <16 x i8><br>
-; CHECK: and <16 x i8><br>
-; CHECK: xor <16 x i8><br>
-; CHECK: mul <16 x i8><br>
-; CHECK: store <16 x i8><br>
+; CHECK: load <8 x i16><br>
+; CHECK: trunc <8 x i16><br>
+; CHECK: shl <8 x i8><br>
+; CHECK: add <8 x i8><br>
+; CHECK: or <8 x i8><br>
+; CHECK: mul <8 x i8><br>
+; CHECK: and <8 x i8><br>
+; CHECK: xor <8 x i8><br>
+; CHECK: mul <8 x i8><br>
+; CHECK: store <8 x i8><br>
define void @add_f(i16* noalias nocapture readonly %p, i8* noalias nocapture %q, i8 %arg1, i8 %arg2, i32 %len) #0 {<br>
entry:<br>
%cmp.32 = icmp sgt i32 %len, 0<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/AArch64/reduction-s<wbr>mall-size.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/AArch64/reduc<wbr>tion-small-size.ll?rev=306936&<wbr>r1=306935&r2=306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/AArch64/reduction-s<wbr>mall-size.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/AArch64/reduction-s<wbr>mall-size.ll Fri Jun 30 20:24:09 2017<br>
@@ -123,16 +123,16 @@ for.body:<br>
; }<br>
;<br>
; CHECK: vector.body:<br>
-; CHECK: phi <16 x i16><br>
-; CHECK: [[Ld1:%[a-zA-Z0-9.]+]] = load <16 x i8><br>
-; CHECK: zext <16 x i8> [[Ld1]] to <16 x i16><br>
-; CHECK: [[Ld2:%[a-zA-Z0-9.]+]] = load <16 x i8><br>
-; CHECK: zext <16 x i8> [[Ld2]] to <16 x i16><br>
-; CHECK: add <16 x i16><br>
-; CHECK: add <16 x i16><br>
+; CHECK: phi <8 x i16><br>
+; CHECK: [[Ld1:%[a-zA-Z0-9.]+]] = load <8 x i8><br>
+; CHECK: zext <8 x i8> [[Ld1]] to <8 x i16><br>
+; CHECK: [[Ld2:%[a-zA-Z0-9.]+]] = load <8 x i8><br>
+; CHECK: zext <8 x i8> [[Ld2]] to <8 x i16><br>
+; CHECK: add <8 x i16><br>
+; CHECK: add <8 x i16><br>
;<br>
; CHECK: middle.block:<br>
-; CHECK: [[Rdx:%[a-zA-Z0-9.]+]] = call i16 @llvm.experimental.vector.redu<wbr>ce.add.i16.v16i16(<16 x i16><br>
+; CHECK: [[Rdx:%[a-zA-Z0-9.]+]] = call i16 @llvm.experimental.vector.redu<wbr>ce.add.i16.v8i16(<8 x i16><br>
; CHECK: zext i16 [[Rdx]] to i32<br>
;<br>
define i16 @reduction_i16_2(i8* nocapture readonly %a, i8* nocapture readonly %b, i32 %n) {<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/ARM/gcc-examples.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/ARM/gcc-examples.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/ARM/gcc-examp<wbr>les.ll?rev=306936&r1=306935&<wbr>r2=306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/ARM/gcc-examples.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/ARM/gcc-examples.ll Fri Jun 30 20:24:09 2017<br>
@@ -35,9 +35,9 @@ define void @example1() nounwind uwtable<br>
}<br>
;CHECK-LABEL: @example10b(<br>
-;CHECK: load <8 x i16><br>
-;CHECK: sext <8 x i16><br>
-;CHECK: store <8 x i32><br>
+;CHECK: load <4 x i16><br>
+;CHECK: sext <4 x i16><br>
+;CHECK: store <4 x i32><br>
;CHECK: ret void<br>
define void @example10b(i16* noalias nocapture %sa, i16* noalias nocapture %sb, i16* noalias nocapture %sc, i32* noalias nocapture %ia, i32* noalias nocapture %ib, i32* noalias nocapture %ic) nounwind uwtable ssp {<br>
br label %1<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/fp64_to_uint32-<wbr>cost-model.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/fp64_to_uint32-cost-model.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/X86/fp64_to_u<wbr>int32-cost-model.ll?rev=306936<wbr>&r1=306935&r2=306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/fp64_to_uint32-<wbr>cost-model.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/fp64_to_uint32-<wbr>cost-model.ll Fri Jun 30 20:24:09 2017<br>
@@ -9,9 +9,7 @@ target triple = "x86_64-apple-macosx"<br>
; If we need to scalarize the fptoui and then use inserts to build up the<br>
; vector again, then there is certainly no value in going 256-bit wide.<br>
-; But as we default to maximize bandwidth, we should convert it to 256-bit<br>
-; anyway.<br>
-; CHECK: vpinsrd<br>
+; CHECK-NOT: vpinsrd<br>
define void @convert() {<br>
entry:<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/gcc-examples.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/gcc-examples.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/X86/gcc-examp<wbr>les.ll?rev=306936&r1=306935&<wbr>r2=306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/gcc-examples.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/gcc-examples.ll Fri Jun 30 20:24:09 2017<br>
@@ -44,16 +44,17 @@ define void @example1() nounwind uwtable<br>
ret void<br>
}<br>
+; Select VF=4 because sext <8 x i1> to <8 x i32> is expensive.<br>
;CHECK-LABEL: @example10b(<br>
-;CHECK: load <8 x i16><br>
-;CHECK: sext <8 x i16><br>
-;CHECK: store <8 x i32><br>
+;CHECK: load <4 x i16><br>
+;CHECK: sext <4 x i16><br>
+;CHECK: store <4 x i32><br>
;CHECK: ret void<br>
;UNROLL-LABEL: @example10b(<br>
-;UNROLL: load <8 x i16><br>
-;UNROLL: load <8 x i16><br>
-;UNROLL: store <8 x i32><br>
-;UNROLL: store <8 x i32><br>
+;UNROLL: load <4 x i16><br>
+;UNROLL: load <4 x i16><br>
+;UNROLL: store <4 x i32><br>
+;UNROLL: store <4 x i32><br>
;UNROLL: ret void<br>
define void @example10b(i16* noalias nocapture %sa, i16* noalias nocapture %sb, i16* noalias nocapture %sc, i32* noalias nocapture %ia, i32* noalias nocapture %ib, i32* noalias nocapture %ic) nounwind uwtable ssp {<br>
br label %1<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/masked_load_sto<wbr>re.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/masked_load_store.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/X86/masked_lo<wbr>ad_store.ll?rev=306936&r1=3069<wbr>35&r2=306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/masked_load_sto<wbr>re.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/masked_load_sto<wbr>re.ll Fri Jun 30 20:24:09 2017<br>
@@ -260,28 +260,20 @@ for.end:<br>
; }<br>
;}<br>
-;AVX1-LABEL: @foo3<br>
-;AVX1: icmp slt <4 x i32> %wide.load, <i32 100, i32 100,<br>
-;AVX1: call <4 x double> @llvm.masked.load.v4f64.p0v4f6<wbr>4<br>
-;AVX1: sitofp <4 x i32> %wide.load to <4 x double><br>
-;AVX1: fadd <4 x double><br>
-;AVX1: call void @llvm.masked.store.v4f64.p0v4f<wbr>64<br>
-;AVX1: ret void<br>
-<br>
-;AVX2-LABEL: @foo3<br>
-;AVX2: icmp slt <8 x i32> %wide.load, <i32 100, i32 100,<br>
-;AVX2: call <8 x double> @llvm.masked.load.v8f64.p0v8f6<wbr>4<br>
-;AVX2: sitofp <8 x i32> %wide.load to <8 x double><br>
-;AVX2: fadd <8 x double><br>
-;AVX2: call void @llvm.masked.store.v8f64.p0v8f<wbr>64<br>
-;AVX2: ret void<br>
+;AVX-LABEL: @foo3<br>
+;AVX: icmp slt <4 x i32> %wide.load, <i32 100, i32 100,<br>
+;AVX: call <4 x double> @llvm.masked.load.v4f64.p0v4f6<wbr>4<br>
+;AVX: sitofp <4 x i32> %wide.load to <4 x double><br>
+;AVX: fadd <4 x double><br>
+;AVX: call void @llvm.masked.store.v4f64.p0v4f<wbr>64<br>
+;AVX: ret void<br>
;AVX512-LABEL: @foo3<br>
-;AVX512: icmp slt <16 x i32> %wide.load, <i32 100, i32 100,<br>
-;AVX512: call <16 x double> @llvm.masked.load.v16f64.p0v16<wbr>f64<br>
-;AVX512: sitofp <16 x i32> %wide.load to <16 x double><br>
-;AVX512: fadd <16 x double><br>
-;AVX512: call void @llvm.masked.store.v16f64.p0v1<wbr>6f64<br>
+;AVX512: icmp slt <8 x i32> %wide.load, <i32 100, i32 100,<br>
+;AVX512: call <8 x double> @llvm.masked.load.v8f64.p0v8f6<wbr>4<br>
+;AVX512: sitofp <8 x i32> %wide.load to <8 x double><br>
+;AVX512: fadd <8 x double><br>
+;AVX512: call void @llvm.masked.store.v8f64.p0v8f<wbr>64<br>
;AVX512: ret void<br>
@@ -510,19 +502,19 @@ for.end:<br>
; }<br>
;}<br>
;AVX2-LABEL: @foo6<br>
-;AVX2: icmp sgt <8 x i32> %reverse, zeroinitializer<br>
-;AVX2: shufflevector <8 x i1>{{.*}}<8 x i32> <i32 7, i32 6, i32 5, i32 4<br>
-;AVX2: call <8 x double> @llvm.masked.load.v8f64.p0v8f6<wbr>4<br>
-;AVX2: fadd <8 x double><br>
-;AVX2: call void @llvm.masked.store.v8f64.p0v8f<wbr>64<br>
+;AVX2: icmp sgt <4 x i32> %reverse, zeroinitializer<br>
+;AVX2: shufflevector <4 x i1>{{.*}}<4 x i32> <i32 3, i32 2, i32 1, i32 0><br>
+;AVX2: call <4 x double> @llvm.masked.load.v4f64.p0v4f6<wbr>4<br>
+;AVX2: fadd <4 x double><br>
+;AVX2: call void @llvm.masked.store.v4f64.p0v4f<wbr>64<br>
;AVX2: ret void<br>
;AVX512-LABEL: @foo6<br>
-;AVX512: icmp sgt <16 x i32> %reverse, zeroinitializer<br>
-;AVX512: shufflevector <16 x i1>{{.*}}<16 x i32> <i32 15, i32 14, i32 13, i32 12<br>
-;AVX512: call <16 x double> @llvm.masked.load.v16f64.p0v16<wbr>f64<br>
-;AVX512: fadd <16 x double><br>
-;AVX512: call void @llvm.masked.store.v16f64.p0v1<wbr>6f64<br>
+;AVX512: icmp sgt <8 x i32> %reverse, zeroinitializer<br>
+;AVX512: shufflevector <8 x i1>{{.*}}<8 x i32> <i32 7, i32 6, i32 5, i32 4<br>
+;AVX512: call <8 x double> @llvm.masked.load.v8f64.p0v8f6<wbr>4<br>
+;AVX512: fadd <8 x double><br>
+;AVX512: call void @llvm.masked.store.v8f64.p0v8f<wbr>64<br>
;AVX512: ret void<br>
@@ -590,8 +582,8 @@ for.end:<br>
; }<br>
;AVX512-LABEL: @foo7<br>
-;AVX512: call <64 x double*> @llvm.masked.load.v64p0f64.p0v<wbr>64p0f64(<64 x double*>*<br>
-;AVX512: call void @llvm.masked.store.v64f64.p0v6<wbr>4f64<br>
+;AVX512: call <8 x double*> @llvm.masked.load.v8p0f64.p0v8<wbr>p0f64(<8 x double*>*<br>
+;AVX512: call void @llvm.masked.store.v8f64.p0v8f<wbr>64<br>
;AVX512: ret void<br>
define void @foo7(double* noalias %out, double** noalias %in, i8* noalias %trigger, i32 %size) #0 {<br>
@@ -662,8 +654,8 @@ for.end:<br>
;}<br>
;AVX512-LABEL: @foo8<br>
-;AVX512: call <64 x i32 ()*> @llvm.masked.load.v64p0f_i32f.<wbr>p0v64p0f_i32f(<64 x i32 ()*>* %<br>
-;AVX512: call void @llvm.masked.store.v64f64.p0v6<wbr>4f64<br>
+;AVX512: call <8 x i32 ()*> @llvm.masked.load.v8p0f_i32f.p<wbr>0v8p0f_i32f(<8 x i32 ()*>* %<br>
+;AVX512: call void @llvm.masked.store.v8f64.p0v8f<wbr>64<br>
;AVX512: ret void<br>
define void @foo8(double* noalias %out, i32 ()** noalias %in, i8* noalias %trigger, i32 %size) #0 {<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/no_fpmath.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/no_fpmath.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/X86/no_fpmath<wbr>.ll?rev=306936&r1=306935&r2=<wbr>306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/no_fpmath.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/no_fpmath.ll Fri Jun 30 20:24:09 2017<br>
@@ -2,7 +2,7 @@<br>
; CHECK: remark: no_fpmath.c:6:11: loop not vectorized: cannot prove it is safe to reorder floating-point operations<br>
; CHECK: remark: no_fpmath.c:6:14: loop not vectorized<br>
-; CHECK: remark: no_fpmath.c:17:14: vectorized loop (vectorization width: 4, interleaved count: 2)<br>
+; CHECK: remark: no_fpmath.c:17:14: vectorized loop (vectorization width: 2, interleaved count: 2)<br>
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32<wbr>:64-S128"<br>
target triple = "x86_64-apple-macosx10.10.0"<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/no_fpmath_with_<wbr>hotness.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/X86/no_fpmath<wbr>_with_hotness.ll?rev=306936&<wbr>r1=306935&r2=306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/no_fpmath_with_<wbr>hotness.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/no_fpmath_with_<wbr>hotness.ll Fri Jun 30 20:24:09 2017<br>
@@ -3,7 +3,7 @@<br>
; CHECK: remark: no_fpmath.c:6:11: loop not vectorized: cannot prove it is safe to reorder floating-point operations (hotness: 300)<br>
; CHECK: remark: no_fpmath.c:6:14: loop not vectorized<br>
-; CHECK: remark: no_fpmath.c:17:14: vectorized loop (vectorization width: 4, interleaved count: 2) (hotness: 300)<br>
+; CHECK: remark: no_fpmath.c:17:14: vectorized loop (vectorization width: 2, interleaved count: 2) (hotness: 300)<br>
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32<wbr>:64-S128"<br>
target triple = "x86_64-apple-macosx10.10.0"<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/reduction-crash<wbr>.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/reduction-crash.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/X86/reduction<wbr>-crash.ll?rev=306936&r1=306935<wbr>&r2=306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/reduction-crash<wbr>.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/reduction-crash<wbr>.ll Fri Jun 30 20:24:09 2017<br>
@@ -7,7 +7,7 @@ target triple = "i386-apple-darwin"<br>
define void @test1(float* nocapture %arg, i32 %arg1) nounwind {<br>
; CHECK-LABEL: @test1(<br>
; CHECK: preheader<br>
-; CHECK: insertelement <4 x double> zeroinitializer, double %tmp, i32 0<br>
+; CHECK: insertelement <2 x double> zeroinitializer, double %tmp, i32 0<br>
; CHECK: vector.memcheck<br>
bb:<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/vectorization-r<wbr>emarks-loopid-dbg.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/vectorization-remarks-loopid-dbg.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/X86/vectoriza<wbr>tion-remarks-loopid-dbg.ll?rev<wbr>=306936&r1=306935&r2=306936&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/vectorization-r<wbr>emarks-loopid-dbg.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/vectorization-r<wbr>emarks-loopid-dbg.ll Fri Jun 30 20:24:09 2017<br>
@@ -6,7 +6,7 @@<br>
; DEBUG-OUTPUT-NOT: .loc<br>
; DEBUG-OUTPUT-NOT: {{.*}}.debug_info<br>
-; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop (vectorization width: 16, interleaved count: 1)<br>
+; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop (vectorization width: 4, interleaved count: 1)<br>
; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved loop (interleaved count: 4)<br>
; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized: vectorization and interleaving are explicitly disabled, or vectorize width and interleave count are both set to 1<br>
<br>
Modified: llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/vectorization-r<wbr>emarks.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/vectorization-remarks.ll?rev=306936&r1=306935&r2=306936&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/Transfor<wbr>ms/LoopVectorize/X86/vectoriza<wbr>tion-remarks.ll?rev=306936&r1=<wbr>306935&r2=306936&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/vectorization-r<wbr>emarks.ll (original)<br>
+++ llvm/trunk/test/Transforms/Loo<wbr>pVectorize/X86/vectorization-r<wbr>emarks.ll Fri Jun 30 20:24:09 2017<br>
@@ -6,7 +6,7 @@<br>
; DEBUG-OUTPUT-NOT: .loc<br>
; DEBUG-OUTPUT-NOT: {{.*}}.debug_info<br>
-; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop (vectorization width: 16, interleaved count: 1)<br>
+; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop (vectorization width: 4, interleaved count: 1)<br>
; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved loop (interleaved count: 4)<br>
; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized: vectorization and interleaving are explicitly disabled, or vectorize width and interleave count are both set to 1<br>
<br>
<br>
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</blockquote>
<br></div></div><span class="m_3419749026596711539HOEnZb"><font color="#888888">
-- <br>
Hal Finkel<br>
Lead, Compiler Technology and Programming Languages<br>
Leadership Computing Facility<br>
Argonne National Laboratory<br>
<br>
</font></span></blockquote></div><br><br clear="all"><div><br></div></div></div><span class="HOEnZb"><font color="#888888">-- <br><div class="m_3419749026596711539gmail_signature" data-smartmail="gmail_signature"><span style="font-family:Times;font-size:medium"><table cellspacing="0" cellpadding="0"><tbody><tr style="color:rgb(85,85,85);font-family:sans-serif;font-size:small"><td nowrap style="border-top-style:solid;border-top-color:rgb(213,15,37);border-top-width:2px">Teresa Johnson |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(51,105,232);border-top-width:2px"> Software Engineer |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(0,153,57);border-top-width:2px"> <a href="mailto:tejohnson@google.com" target="_blank">tejohnson@google.com</a> |</td><td nowrap style="border-top-style:solid;border-top-color:rgb(238,178,17);border-top-width:2px"> 408-460-2413</td></tr></tbody></table></span></div>
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</blockquote></div><br></div>