<div dir="ltr">I've attempted a fix for at least the ubsan failure in r319911</div><div class="gmail_extra"><br clear="all"><div><div class="gmail_signature" data-smartmail="gmail_signature">~Craig</div></div>
<br><div class="gmail_quote">On Wed, Dec 6, 2017 at 9:49 AM, Bill Seurer via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">This is still causing failures on all the powerpc64 buildbots:<br>
<br>
******************** TEST 'LLVM :: CodeGen/X86/avx512bw-intrinsic<wbr>s-upgrade.ll' FAILED ********************<br>
Script:<br>
--<br>
/home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/stage1/bin/<wbr>llc < /home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/llvm/test/C<wbr>odeGen/X86/avx512bw-intrinsics<wbr>-upgrade.ll -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw | /home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/stage1/bin/<wbr>FileCheck /home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/llvm/test/C<wbr>odeGen/X86/avx512bw-intrinsics<wbr>-upgrade.ll --check-prefix=ALL --check-prefix=AVX512BW<br>
/home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/stage1/bin/<wbr>llc < /home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/llvm/test/C<wbr>odeGen/X86/avx512bw-intrinsics<wbr>-upgrade.ll -mtriple=i386-unknown-linux-gn<wbr>u -mattr=+avx512f,+avx512bw | /home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/stage1/bin/<wbr>FileCheck /home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/llvm/test/C<wbr>odeGen/X86/avx512bw-intrinsics<wbr>-upgrade.ll --check-prefix=ALL --check-prefix=AVX512F-32<br>
--<br>
Exit Code: 1<br>
<br>
Command Output (stderr):<br>
--<br>
/home/buildbots/ppc64be-clang-<wbr>test/clang-ppc64be/llvm/test/C<wbr>odeGen/X86/avx512bw-intrinsics<wbr>-upgrade.ll:32:18: error: AVX512BW-NEXT: is not on the line after the previous match<br>
; AVX512BW-NEXT: movq %rsi, %rax<br>
^<br>
<stdin>:20:2: note: 'next' match was here<br>
movq %rsi, %rax<br>
^<br>
<stdin>:18:16: note: previous match ended here<br>
shlq $32, %rsi<br>
^<br>
<stdin>:19:1: note: non-matching line after previous match is here<br>
orq %rdi, %rsi<br>
^<br>
<br>
--<br>
<br>
********************<div><div class="h5"><br>
<br>
On 12/05/2017 09:42 AM, Jina Nahias via llvm-commits wrote:<br>
</div></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div class="h5">
Author: jina.nahias<br>
Date: Tue Dec 5 07:42:56 2017<br>
New Revision: 319778<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=319778&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject?rev=319778&view=rev</a><br>
Log:<br>
[x86][AVX512] Lowering kunpack intrinsics to LLVM IR<br>
<br>
This patch, together with a matching clang patch (<a href="https://reviews.llvm.org/D39719" rel="noreferrer" target="_blank">https://reviews.llvm.org/D397<wbr>19</a>), implements the lowering of X86 kunpack intrinsics to IR.<br>
<br>
Differential Revision: <a href="https://reviews.llvm.org/D39720" rel="noreferrer" target="_blank">https://reviews.llvm.org/D3972<wbr>0</a><br>
<br>
Change-Id: I4088d9428478f9457f6afddc90bd3<wbr>d66b3daf0a1<br>
<br>
Modified:<br>
llvm/trunk/include/llvm/IR/In<wbr>trinsicsX86.td<br>
llvm/trunk/lib/IR/<wbr>AutoUpgrade.cpp<br>
llvm/trunk/lib/Target/X86/X86<wbr>ISelLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86<wbr>IntrinsicsInfo.h<br>
llvm/trunk/test/CodeGen/X86/a<wbr>vx512-intrinsics-fast-isel.ll<br>
llvm/trunk/test/CodeGen/X86/a<wbr>vx512-intrinsics-upgrade.ll<br>
llvm/trunk/test/CodeGen/X86/a<wbr>vx512-intrinsics.ll<br>
llvm/trunk/test/CodeGen/X86/a<wbr>vx512bw-intrinsics-fast-isel.l<wbr>l<br>
llvm/trunk/test/CodeGen/X86/a<wbr>vx512bw-intrinsics-upgrade.ll<br>
llvm/trunk/test/CodeGen/X86/a<wbr>vx512bw-intrinsics.ll<br>
<br>
Modified: llvm/trunk/include/llvm/IR/Int<wbr>rinsicsX86.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/include/llvm/<wbr>IR/IntrinsicsX86.td?rev=319778<wbr>&r1=319777&r2=319778&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/include/llvm/IR/Int<wbr>rinsicsX86.td (original)<br>
+++ llvm/trunk/include/llvm/IR/Int<wbr>rinsicsX86.td Tue Dec 5 07:42:56 2017<br>
@@ -3738,15 +3738,6 @@ let TargetPrefix = "x86" in { // All in<br>
def int_x86_avx512_kxnor_w : GCCBuiltin<"__builtin_ia32_kxn<wbr>orhi">,<br>
Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty],<br>
[IntrNoMem]>;<br>
- def int_x86_avx512_kunpck_bw : GCCBuiltin<"__builtin_ia32_kun<wbr>pckhi">,<br>
- Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty],<br>
- [IntrNoMem]>;<br>
- def int_x86_avx512_kunpck_wd : GCCBuiltin<"__builtin_ia32_kun<wbr>pcksi">,<br>
- Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],<br>
- [IntrNoMem]>;<br>
- def int_x86_avx512_kunpck_dq : GCCBuiltin<"__builtin_ia32_kun<wbr>pckdi">,<br>
- Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty],<br>
- [IntrNoMem]>;<br>
def int_x86_avx512_kortestz_w : GCCBuiltin<"__builtin_ia32_kor<wbr>testzhi">,<br>
Intrinsic<[llvm_i32_ty], [llvm_i16_ty, llvm_i16_ty],<br>
[IntrNoMem]>;<br>
<br>
Modified: llvm/trunk/lib/IR/AutoUpgrade.<wbr>cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/AutoUpgrade.cpp?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/IR/AutoUp<wbr>grade.cpp?rev=319778&r1=319777<wbr>&r2=319778&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/IR/AutoUpgrade.<wbr>cpp (original)<br>
+++ llvm/trunk/lib/IR/AutoUpgrade.<wbr>cpp Tue Dec 5 07:42:56 2017<br>
@@ -78,6 +78,7 @@ static bool ShouldUpgradeX86Intrinsic(Fu<br>
Name=="ssse3.pabs.d.128" || // Added in 6.0<br>
Name.startswith("avx512.mask.s<wbr>huf.i") || // Added in 6.0<br>
Name.startswith("avx512.mask.s<wbr>huf.f") || // Added in 6.0<br>
+ Name.startswith("avx512.kunpck<wbr>") || //added in 6.0<br>
Name.startswith("avx2.pabs.") || // Added in 6.0<br>
Name.startswith("avx512.mask.p<wbr>abs.") || // Added in 6.0<br>
Name.startswith("avx512.broadc<wbr>astm") || // Added in 6.0<br>
@@ -1065,6 +1066,12 @@ void llvm::UpgradeIntrinsicCall(Cal<wbr>lInst<br>
Rep = Builder.CreateVectorSplat(NumE<wbr>lts, CI->getArgOperand(0));<br>
Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,<br>
CI->getArgOperand(1));<br>
+ } else if (IsX86 && (Name.startswith("avx512.kunpc<wbr>k"))) {<br>
+ uint64_t Shift = CI->getType()->getScalarSizeIn<wbr>Bits() / 2;<br>
+ uint64_t And = (1 << Shift) - 1;<br>
+ Value* LowBits = Builder.CreateAnd(CI->getArgOp<wbr>erand(0), And);<br>
+ Value* HighBits = Builder.CreateShl(CI->getArgOp<wbr>erand(1), Shift);<br>
+ Rep = Builder.CreateOr(LowBits, HighBits);<br>
} else if (IsX86 && (Name == "sse.add.ss" || Name == "<a href="http://sse2.add.sd" rel="noreferrer" target="_blank">sse2.add.sd</a>")) {<br>
Type *I32Ty = Type::getInt32Ty(C);<br>
Value *Elt0 = Builder.CreateExtractElement(C<wbr>I->getArgOperand(0),<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86I<wbr>SelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/X8<wbr>6/X86ISelLowering.cpp?rev=3197<wbr>78&r1=319777&r2=319778&view=<wbr>diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/X86I<wbr>SelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86I<wbr>SelLowering.cpp Tue Dec 5 07:42:56 2017<br>
@@ -30007,6 +30007,53 @@ static SDValue combineBitcastvxi1(Select<br>
SDValue N0 = BitCast.getOperand(0);<br>
EVT VecVT = N0->getValueType(0);<br>
+ if (VT.isVector() && VecVT.isScalarInteger() && Subtarget.hasAVX512() &&<br>
+ N0->getOpcode() == ISD::OR) {<br>
+ SDValue Op0 = N0->getOperand(0);<br>
+ SDValue Op1 = N0->getOperand(1);<br>
+ MVT TrunckVT;<br>
+ MVT BitcastVT;<br>
+ switch (VT.getSimpleVT().SimpleTy) {<br>
+ default:<br>
+ return SDValue();<br>
+ case MVT::v16i1:<br>
+ TrunckVT = MVT::i8;<br>
+ BitcastVT = MVT::v8i1;<br>
+ break;<br>
+ case MVT::v32i1:<br>
+ TrunckVT = MVT::i16;<br>
+ BitcastVT = MVT::v16i1;<br>
+ break;<br>
+ case MVT::v64i1:<br>
+ TrunckVT = MVT::i32;<br>
+ BitcastVT = MVT::v32i1;<br>
+ break;<br>
+ }<br>
+ bool isArg0UndefRight = Op0->getOpcode() == ISD::SHL;<br>
+ bool isArg0UndefLeft =<br>
+ Op0->getOpcode() == ISD::ZERO_EXTEND || Op0->getOpcode() == ISD::AND;<br>
+ bool isArg1UndefRight = Op1->getOpcode() == ISD::SHL;<br>
+ bool isArg1UndefLeft =<br>
+ Op1->getOpcode() == ISD::ZERO_EXTEND || Op1->getOpcode() == ISD::AND;<br>
+ SDValue OpLeft;<br>
+ SDValue OpRight;<br>
+ if (isArg0UndefRight && isArg1UndefLeft) {<br>
+ OpLeft = Op0;<br>
+ OpRight = Op1;<br>
+ } else if (isArg1UndefRight && isArg0UndefLeft) {<br>
+ OpLeft = Op1;<br>
+ OpRight = Op0;<br>
+ } else<br>
+ return SDValue();<br>
+ SDLoc DL(BitCast);<br>
+ SDValue Shr = OpLeft->getOperand(0);<br>
+ SDValue Trunc1 = DAG.getNode(ISD::TRUNCATE, DL, TrunckVT, Shr);<br>
+ SDValue Bitcast1 = DAG.getBitcast(BitcastVT, Trunc1);<br>
+ SDValue Trunc2 = DAG.getNode(ISD::TRUNCATE, DL, TrunckVT, OpRight);<br>
+ SDValue Bitcast2 = DAG.getBitcast(BitcastVT, Trunc2);<br>
+ return DAG.getNode(ISD::CONCAT_VECTOR<wbr>S, DL, VT, Bitcast1, Bitcast2);<br>
+ }<br>
+<br>
if (!VT.isScalarInteger() || !VecVT.isSimple())<br>
return SDValue();<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86I<wbr>ntrinsicsInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/lib/Target/X8<wbr>6/X86IntrinsicsInfo.h?rev=3197<wbr>78&r1=319777&r2=319778&view=<wbr>diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/X86I<wbr>ntrinsicsInfo.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86I<wbr>ntrinsicsInfo.h Tue Dec 5 07:42:56 2017<br>
@@ -479,9 +479,6 @@ static const IntrinsicData IntrinsicsWi<br>
X86_INTRINSIC_DATA(avx512_exp2<wbr>_ps, INTR_TYPE_1OP_MASK_RM, X86ISD::EXP2, 0),<br>
X86_INTRINSIC_DATA(avx512_kand<wbr>_w, MASK_BINOP, ISD::AND, 0),<br>
X86_INTRINSIC_DATA(avx512_kor_<wbr>w, MASK_BINOP, ISD::OR, 0),<br>
- X86_INTRINSIC_DATA(avx512_kunp<wbr>ck_bw, KUNPCK, ISD::CONCAT_VECTORS, 0),<br>
- X86_INTRINSIC_DATA(avx512_kunp<wbr>ck_dq, KUNPCK, ISD::CONCAT_VECTORS, 0),<br>
- X86_INTRINSIC_DATA(avx512_kunp<wbr>ck_wd, KUNPCK, ISD::CONCAT_VECTORS, 0),<br>
X86_INTRINSIC_DATA(avx512_kxor<wbr>_w, MASK_BINOP, ISD::XOR, 0),<br>
X86_INTRINSIC_DATA(avx512_mask<wbr>_add_pd_512, INTR_TYPE_2OP_MASK, ISD::FADD,<br>
X86ISD::FADD_RND),<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics-fast-isel.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>X86/avx512-intrinsics-fast-<wbr>isel.ll?rev=319778&r1=319777&<wbr>r2=319778&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics-fast-isel.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics-fast-isel.ll Tue Dec 5 07:42:56 2017<br>
@@ -5,6 +5,59 @@<br>
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512f-bui<wbr>ltins.c<br>
+define zeroext i16 @test_mm512_kunpackb(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, <8 x i64> %__D, <8 x i64> %__E, <8 x i64> %__F) local_unnamed_addr #0 {<br>
+; X32-LABEL: test_mm512_kunpackb:<br>
+; X32: # %bb.0: # %entry<br>
+; X32-NEXT: pushl %ebp<br>
+; X32-NEXT: .cfi_def_cfa_offset 8<br>
+; X32-NEXT: .cfi_offset %ebp, -8<br>
+; X32-NEXT: movl %esp, %ebp<br>
+; X32-NEXT: .cfi_def_cfa_register %ebp<br>
+; X32-NEXT: andl $-64, %esp<br>
+; X32-NEXT: subl $64, %esp<br>
+; X32-NEXT: vmovdqa64 136(%ebp), %zmm3<br>
+; X32-NEXT: vpcmpneqd %zmm1, %zmm0, %k0<br>
+; X32-NEXT: vpcmpneqd 8(%ebp), %zmm2, %k1<br>
+; X32-NEXT: kunpckbw %k0, %k1, %k1<br>
+; X32-NEXT: vpcmpneqd 72(%ebp), %zmm3, %k0 {%k1}<br>
+; X32-NEXT: kmovw %k0, %eax<br>
+; X32-NEXT: movzwl %ax, %eax<br>
+; X32-NEXT: movl %ebp, %esp<br>
+; X32-NEXT: popl %ebp<br>
+; X32-NEXT: vzeroupper<br>
+; X32-NEXT: retl<br>
+;<br>
+; X64-LABEL: test_mm512_kunpackb:<br>
+; X64: # %bb.0: # %entry<br>
+; X64-NEXT: vpcmpneqd %zmm1, %zmm0, %k0<br>
+; X64-NEXT: vpcmpneqd %zmm3, %zmm2, %k1<br>
+; X64-NEXT: kunpckbw %k0, %k1, %k1<br>
+; X64-NEXT: vpcmpneqd %zmm5, %zmm4, %k0 {%k1}<br>
+; X64-NEXT: kmovw %k0, %eax<br>
+; X64-NEXT: movzwl %ax, %eax<br>
+; X64-NEXT: vzeroupper<br>
+; X64-NEXT: retq<br>
+entry:<br>
+ %0 = bitcast <8 x i64> %__A to <16 x i32><br>
+ %1 = bitcast <8 x i64> %__B to <16 x i32><br>
+ %2 = icmp ne <16 x i32> %0, %1<br>
+ %3 = bitcast <16 x i1> %2 to i16<br>
+ %4 = bitcast <8 x i64> %__C to <16 x i32><br>
+ %5 = bitcast <8 x i64> %__D to <16 x i32><br>
+ %6 = icmp ne <16 x i32> %4, %5<br>
+ %7 = bitcast <16 x i1> %6 to i16<br>
+ %8 = and i16 %7, 255<br>
+ %shl.i = shl i16 %3, 8<br>
+ %or.i = or i16 %8, %shl.i<br>
+ %9 = bitcast <8 x i64> %__E to <16 x i32><br>
+ %10 = bitcast <8 x i64> %__F to <16 x i32><br>
+ %11 = icmp ne <16 x i32> %9, %10<br>
+ %12 = bitcast i16 %or.i to <16 x i1><br>
+ %13 = and <16 x i1> %11, %12<br>
+ %14 = bitcast <16 x i1> %13 to i16<br>
+ ret i16 %14<br>
+}<br>
+<br>
define <16 x float> @test_mm512_shuffle_f32x4(<16 x float> %__A, <16 x float> %__B) {<br>
; X32-LABEL: test_mm512_shuffle_f32x4:<br>
; X32: # %bb.0: # %entry<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics-upgrade.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics-upgrade.ll?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>X86/avx512-intrinsics-upgrade.<wbr>ll?rev=319778&r1=319777&r2=<wbr>319778&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics-upgrade.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics-upgrade.ll Tue Dec 5 07:42:56 2017<br>
@@ -1,7 +1,21 @@<br>
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.p<wbr>y<br>
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s<br>
- define <16 x i32>@test_int_x86_avx512_mask_<wbr>pbroadcastd_gpr_512(i32 %x0, <16 x i32> %x1, i16 %mask) {<br>
+declare i16 @<a href="http://llvm.x86.avx512.kunpck.bw" rel="noreferrer" target="_blank">llvm.x86.avx512.kunpck.bw</a>(i16<wbr>, i16) nounwind readnone<br>
+<br>
+define i16 @unpckbw_test(i16 %a0, i16 %a1) {<br>
+; CHECK-LABEL: unpckbw_test:<br>
+; CHECK: ## %bb.0:<br>
+; CHECK-NEXT: movzbl %dil, %eax<br>
+; CHECK-NEXT: shll $8, %esi<br>
+; CHECK-NEXT: orl %esi, %eax<br>
+; CHECK-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill><br>
+; CHECK-NEXT: retq<br>
+ %res = call i16 @<a href="http://llvm.x86.avx512.kunpck.bw" rel="noreferrer" target="_blank">llvm.x86.avx512.kunpck.bw</a>(i16 %a0, i16 %a1)<br>
+ ret i16 %res<br>
+}<br>
+<br>
+define <16 x i32>@test_int_x86_avx512_mask_<wbr>pbroadcastd_gpr_512(i32 %x0, <16 x i32> %x1, i16 %mask) {<br>
; CHECK-LABEL: test_int_x86_avx512_mask_pbroa<wbr>dcastd_gpr_512:<br>
; CHECK: ## %bb.0:<br>
; CHECK-NEXT: vpbroadcastd %edi, %zmm1<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>X86/avx512-intrinsics.ll?rev=<wbr>319778&r1=319777&r2=319778&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/av<wbr>x512-intrinsics.ll Tue Dec 5 07:42:56 2017<br>
@@ -96,21 +96,6 @@ define i16 @test_kor(i16 %a0, i16 %a1) {<br>
ret i16 %t2<br>
}<br>
-declare i16 @<a href="http://llvm.x86.avx512.kunpck.bw" rel="noreferrer" target="_blank">llvm.x86.avx512.kunpck.bw</a>(i16<wbr>, i16) nounwind readnone<br>
-<br>
-define i16 @unpckbw_test(i16 %a0, i16 %a1) {<br>
-; CHECK-LABEL: unpckbw_test:<br>
-; CHECK: ## %bb.0:<br>
-; CHECK-NEXT: kmovw %edi, %k0<br>
-; CHECK-NEXT: kmovw %esi, %k1<br>
-; CHECK-NEXT: kunpckbw %k1, %k0, %k0<br>
-; CHECK-NEXT: kmovw %k0, %eax<br>
-; CHECK-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill><br>
-; CHECK-NEXT: retq<br>
- %res = call i16 @<a href="http://llvm.x86.avx512.kunpck.bw" rel="noreferrer" target="_blank">llvm.x86.avx512.kunpck.bw</a>(i16 %a0, i16 %a1)<br>
- ret i16 %res<br>
-}<br>
-<br>
declare i16 @llvm.x86.avx512.kxnor.w(i16, i16) nounwind readnone<br>
; TODO: the two kxnor instructions here a no op and should be elimintaed,<br>
; probably by FoldConstantArithmetic in SelectionDAG.<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics-fast-isel.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>X86/avx512bw-intrinsics-fast-<wbr>isel.ll?rev=319778&r1=319777&<wbr>r2=319778&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics-fast-isel.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics-fast-isel.ll Tue Dec 5 07:42:56 2017<br>
@@ -4,6 +4,117 @@<br>
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512bw-bu<wbr>iltins.c<br>
+define i64 @test_mm512_kunpackd(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, <8 x i64> %__D, <8 x i64> %__E, <8 x i64> %__F) {<br>
+; X32-LABEL: test_mm512_kunpackd:<br>
+; X32: # %bb.0: # %entry<br>
+; X32-NEXT: pushl %ebp<br>
+; X32-NEXT: .cfi_def_cfa_offset 8<br>
+; X32-NEXT: .cfi_offset %ebp, -8<br>
+; X32-NEXT: movl %esp, %ebp<br>
+; X32-NEXT: .cfi_def_cfa_register %ebp<br>
+; X32-NEXT: andl $-64, %esp<br>
+; X32-NEXT: subl $64, %esp<br>
+; X32-NEXT: vmovdqa64 136(%ebp), %zmm3<br>
+; X32-NEXT: vmovdqa64 72(%ebp), %zmm4<br>
+; X32-NEXT: vmovdqa64 8(%ebp), %zmm5<br>
+; X32-NEXT: vpcmpneqb %zmm0, %zmm1, %k0<br>
+; X32-NEXT: kmovq %k0, {{[0-9]+}}(%esp)<br>
+; X32-NEXT: vpcmpneqb %zmm5, %zmm2, %k0<br>
<a href="https://maps.google.com/?q=%2B;+X32-NE&entry=gmail&source=g">+; X32-NE</a>XT: kmovq %k0, {{[0-9]+}}(%esp)<br>
+; X32-NEXT: kmovd {{[0-9]+}}(%esp), %k0<br>
+; X32-NEXT: kmovd {{[0-9]+}}(%esp), %k1<br>
+; X32-NEXT: kunpckdq %k0, %k1, %k1<br>
+; X32-NEXT: vpcmpneqb %zmm3, <a href="https://maps.google.com/?q=%25zmm4,+%25k0&entry=gmail&source=g">%zmm4, %k0</a> {%k1}<br>
+; X32-NEXT: kmovq %k0, {{[0-9]+}}(%esp)<br>
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edx<br>
+; X32-NEXT: movl %ebp, %esp<br>
+; X32-NEXT: popl %ebp<br>
+; X32-NEXT: vzeroupper<br>
+; X32-NEXT: retl<br>
+;<br>
+; X64-LABEL: test_mm512_kunpackd:<br>
+; X64: # %bb.0: # %entry<br>
+; X64-NEXT: vpcmpneqb %zmm0, %zmm1, %k0<br>
+; X64-NEXT: vpcmpneqb %zmm3, %zmm2, %k1<br>
+; X64-NEXT: kunpckdq %k0, %k1, %k1<br>
+; X64-NEXT: vpcmpneqb %zmm5, %zmm4, %k0 {%k1}<br>
+; X64-NEXT: kmovq %k0, %rax<br>
+; X64-NEXT: vzeroupper<br>
+; X64-NEXT: retq<br>
+entry:<br>
+ %0 = bitcast <8 x i64> %__B to <64 x i8><br>
+ %1 = bitcast <8 x i64> %__A to <64 x i8><br>
+ %2 = icmp ne <64 x i8> %0, %1<br>
+ %3 = bitcast <64 x i1> %2 to i64<br>
+ %4 = bitcast <8 x i64> %__C to <64 x i8><br>
+ %5 = bitcast <8 x i64> %__D to <64 x i8><br>
+ %6 = icmp ne <64 x i8> %4, %5<br>
+ %7 = bitcast <64 x i1> %6 to i64<br>
+ %and.i = and i64 %7, 4294967295<br>
+ %shl.i = shl i64 %3, 32<br>
+ %or.i = or i64 %and.i, %shl.i<br>
+ %8 = bitcast <8 x i64> %__E to <64 x i8><br>
+ %9 = bitcast <8 x i64> %__F to <64 x i8><br>
+ %10 = icmp ne <64 x i8> %8, %9<br>
+ %11 = bitcast i64 %or.i to <64 x i1><br>
+ %12 = and <64 x i1> %10, %11<br>
+ %13 = bitcast <64 x i1> %12 to i64<br>
+ ret i64 %13<br>
+}<br>
+<br>
+define i32 @test_mm512_kunpackw(<8 x i64> %__A, <8 x i64> %__B, <8 x i64> %__C, <8 x i64> %__D, <8 x i64> %__E, <8 x i64> %__F) {<br>
+; X32-LABEL: test_mm512_kunpackw:<br>
+; X32: # %bb.0: # %entry<br>
+; X32-NEXT: pushl %ebp<br>
+; X32-NEXT: .cfi_def_cfa_offset 8<br>
+; X32-NEXT: .cfi_offset %ebp, -8<br>
+; X32-NEXT: movl %esp, %ebp<br>
+; X32-NEXT: .cfi_def_cfa_register %ebp<br>
+; X32-NEXT: andl $-64, %esp<br>
+; X32-NEXT: subl $64, %esp<br>
+; X32-NEXT: vmovdqa64 136(%ebp), %zmm3<br>
+; X32-NEXT: vpcmpneqw %zmm0, %zmm1, %k0<br>
+; X32-NEXT: vpcmpneqw 8(%ebp), %zmm2, %k1<br>
+; X32-NEXT: kunpckwd %k0, %k1, %k1<br>
+; X32-NEXT: vpcmpneqw 72(%ebp), %zmm3, %k0 {%k1}<br>
+; X32-NEXT: kmovd %k0, %eax<br>
+; X32-NEXT: movl %ebp, %esp<br>
+; X32-NEXT: popl %ebp<br>
+; X32-NEXT: vzeroupper<br>
+; X32-NEXT: retl<br>
+;<br>
+; X64-LABEL: test_mm512_kunpackw:<br>
+; X64: # %bb.0: # %entry<br>
+; X64-NEXT: vpcmpneqw %zmm0, %zmm1, %k0<br>
+; X64-NEXT: vpcmpneqw %zmm3, %zmm2, %k1<br>
+; X64-NEXT: kunpckwd %k0, %k1, %k1<br>
+; X64-NEXT: vpcmpneqw %zmm5, %zmm4, %k0 {%k1}<br>
+; X64-NEXT: kmovd %k0, %eax<br>
+; X64-NEXT: vzeroupper<br>
+; X64-NEXT: retq<br>
+entry:<br>
+ %0 = bitcast <8 x i64> %__B to <32 x i16><br>
+ %1 = bitcast <8 x i64> %__A to <32 x i16><br>
+ %2 = icmp ne <32 x i16> %0, %1<br>
+ %3 = bitcast <32 x i1> %2 to i32<br>
+ %4 = bitcast <8 x i64> %__C to <32 x i16><br>
+ %5 = bitcast <8 x i64> %__D to <32 x i16><br>
+ %6 = icmp ne <32 x i16> %4, %5<br>
+ %7 = bitcast <32 x i1> %6 to i32<br>
+ %and.i = and i32 %7, 65535<br>
+ %shl.i = shl i32 %3, 16<br>
+ %or.i = or i32 %and.i, %shl.i<br>
+ %8 = bitcast <8 x i64> %__E to <32 x i16><br>
+ %9 = bitcast <8 x i64> %__F to <32 x i16><br>
+ %10 = icmp ne <32 x i16> %8, %9<br>
+ %11 = bitcast i32 %or.i to <32 x i1><br>
+ %12 = and <32 x i1> %10, %11<br>
+ %13 = bitcast <32 x i1> %12 to i32<br>
+ ret i32 %13<br>
+}<br>
+<br>
+<br>
define <8 x i64> @test_mm512_mask_set1_epi8(<8 x i64> %__O, i64 %__M, i8 signext %__A) {<br>
; X32-LABEL: test_mm512_mask_set1_epi8:<br>
; X32: # %bb.0: # %entry<br>
@@ -694,13 +805,13 @@ define <8 x i64> @test_mm512_mask_set1_e<br>
; X32-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2<br>
; X32-NEXT: vmovdqa {{.*#+}} ymm5 = [255,255,255,255,255,255,255,2<wbr>55,255,255,255,255,255,255,255<wbr>,255,255,255,255,255,255,255,<wbr>255,255,255,255,255,255,255,0,<wbr>255,255]<br>
; X32-NEXT: vpblendvb %ymm5, %ymm1, %ymm2, %ymm1<br>
-; X32-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; X32-NEXT: vpmovb2m %zmm0, %k0<br>
-; X32-NEXT: vpmovm2b %k0, %zmm0<br>
-; X32-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
; X32-NEXT: movl %eax, %ecx<br>
; X32-NEXT: shrl $30, %ecx<br>
; X32-NEXT: kmovd %ecx, %k0<br>
+; X32-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
+; X32-NEXT: vpmovb2m %zmm0, %k1<br>
+; X32-NEXT: vpmovm2b %k1, %zmm0<br>
+; X32-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
; X32-NEXT: vpmovm2b %k0, %zmm2<br>
; X32-NEXT: vpbroadcastw %xmm2, %xmm2<br>
; X32-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2<br>
@@ -1422,13 +1533,13 @@ define <8 x i64> @test_mm512_maskz_set1_<br>
; X32-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2<br>
; X32-NEXT: vmovdqa {{.*#+}} ymm4 = [255,255,255,255,255,255,255,2<wbr>55,255,255,255,255,255,255,255<wbr>,255,255,255,255,255,255,255,<wbr>255,255,255,255,255,255,255,0,<wbr>255,255]<br>
; X32-NEXT: vpblendvb %ymm4, %ymm1, %ymm2, %ymm1<br>
-; X32-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; X32-NEXT: vpmovb2m %zmm0, %k0<br>
-; X32-NEXT: vpmovm2b %k0, %zmm0<br>
-; X32-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
; X32-NEXT: movl %eax, %ecx<br>
; X32-NEXT: shrl $30, %ecx<br>
; X32-NEXT: kmovd %ecx, %k0<br>
+; X32-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
+; X32-NEXT: vpmovb2m %zmm0, %k1<br>
+; X32-NEXT: vpmovm2b %k1, %zmm0<br>
+; X32-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
; X32-NEXT: vpmovm2b %k0, %zmm2<br>
; X32-NEXT: vpbroadcastw %xmm2, %xmm2<br>
; X32-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics-upgrade.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>X86/avx512bw-intrinsics-<wbr>upgrade.ll?rev=319778&r1=<wbr>319777&r2=319778&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics-upgrade.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics-upgrade.ll Tue Dec 5 07:42:56 2017<br>
@@ -2,6 +2,45 @@<br>
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512BW<br>
; RUN: llc < %s -mtriple=i386-unknown-linux-gn<wbr>u -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512F-32<br>
+declare i32 @llvm.x86.avx512.kunpck.wd(i32<wbr>, i32)<br>
+<br>
+define i32@test_int_x86_avx512_kunpck<wbr>_wd(i32 %x0, i32 %x1) {<br>
+; AVX512BW-LABEL: test_int_x86_avx512_kunpck_wd:<br>
+; AVX512BW: ## %bb.0:<br>
+; AVX512BW-NEXT: movzwl %di, %eax<br>
+; AVX512BW-NEXT: shll $16, %esi<br>
+; AVX512BW-NEXT: orl %esi, %eax<br>
+; AVX512BW-NEXT: retq<br>
+;<br>
+; AVX512F-32-LABEL: test_int_x86_avx512_kunpck_wd:<br>
+; AVX512F-32: # %bb.0:<br>
+; AVX512F-32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx<br>
+; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %eax<br>
+; AVX512F-32-NEXT: shll $16, %eax<br>
+; AVX512F-32-NEXT: orl %ecx, %eax<br>
+; AVX512F-32-NEXT: retl<br>
+ %res = call i32 @llvm.x86.avx512.kunpck.wd(i32 %x0, i32 %x1)<br>
+ ret i32 %res<br>
+}<br>
+<br>
+declare i64 @llvm.x86.avx512.kunpck.dq(i64<wbr>, i64)<br>
+<br>
+define i64@test_int_x86_avx512_kunpck<wbr>_qd(i64 %x0, i64 %x1) {<br>
+; AVX512BW-LABEL: test_int_x86_avx512_kunpck_qd:<br>
+; AVX512BW: ## %bb.0:<br>
+; AVX512BW-NEXT: shlq $32, %rsi<br>
+; AVX512BW-NEXT: movq %rsi, %rax<br>
+; AVX512BW-NEXT: retq<br>
+;<br>
+; AVX512F-32-LABEL: test_int_x86_avx512_kunpck_qd:<br>
+; AVX512F-32: # %bb.0:<br>
+; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx<br>
+; AVX512F-32-NEXT: xorl %eax, %eax<br>
+; AVX512F-32-NEXT: retl<br>
+ %res = call i64 @llvm.x86.avx512.kunpck.dq(i64 %x0, i64 %x1)<br>
+ ret i64 %res<br>
+}<br>
+<br>
declare <64 x i8> @llvm.x86.avx512.mask.pbroadca<wbr>st.b.gpr.512(i8, <64 x i8>, i64)<br>
define <64 x i8>@test_int_x86_avx512_mask_p<wbr>broadcast_b_gpr_512(i8 %x0, <64 x i8> %x1, i64 %mask) {<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics.ll?rev=319778&r1=319777&r2=319778&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-pr<wbr>oject/llvm/trunk/test/CodeGen/<wbr>X86/avx512bw-intrinsics.ll?<wbr>rev=319778&r1=319777&r2=<wbr>319778&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/av<wbr>x512bw-intrinsics.ll Tue Dec 5 07:42:56 2017<br>
@@ -1455,55 +1455,6 @@ define <8 x i64>@test_int_x86_avx512_ma<br>
ret <8 x i64> %res2<br>
}<br>
-declare i32 @llvm.x86.avx512.kunpck.wd(i32<wbr>, i32)<br>
-<br>
-define i32@test_int_x86_avx512_kunpck<wbr>_wd(i32 %x0, i32 %x1) {<br>
-; AVX512BW-LABEL: test_int_x86_avx512_kunpck_wd:<br>
-; AVX512BW: ## %bb.0:<br>
-; AVX512BW-NEXT: kmovd %edi, %k0<br>
-; AVX512BW-NEXT: kmovd %esi, %k1<br>
-; AVX512BW-NEXT: kunpckwd %k1, %k0, %k0<br>
-; AVX512BW-NEXT: kmovd %k0, %eax<br>
-; AVX512BW-NEXT: retq<br>
-;<br>
-; AVX512F-32-LABEL: test_int_x86_avx512_kunpck_wd:<br>
-; AVX512F-32: # %bb.0:<br>
-; AVX512F-32-NEXT: kmovw {{[0-9]+}}(%esp), %k0<br>
-; AVX512F-32-NEXT: kmovw {{[0-9]+}}(%esp), %k1<br>
-; AVX512F-32-NEXT: kunpckwd %k0, %k1, %k0<br>
-; AVX512F-32-NEXT: kmovd %k0, %eax<br>
-; AVX512F-32-NEXT: retl<br>
- %res = call i32 @llvm.x86.avx512.kunpck.wd(i32 %x0, i32 %x1)<br>
- ret i32 %res<br>
-}<br>
-<br>
-declare i64 @llvm.x86.avx512.kunpck.dq(i64<wbr>, i64)<br>
-<br>
-define i64@test_int_x86_avx512_kunpck<wbr>_qd(i64 %x0, i64 %x1) {<br>
-; AVX512BW-LABEL: test_int_x86_avx512_kunpck_qd:<br>
-; AVX512BW: ## %bb.0:<br>
-; AVX512BW-NEXT: kmovq %rdi, %k0<br>
-; AVX512BW-NEXT: kmovq %rsi, %k1<br>
-; AVX512BW-NEXT: kunpckdq %k1, %k0, %k0<br>
-; AVX512BW-NEXT: kmovq %k0, %rax<br>
-; AVX512BW-NEXT: retq<br>
-;<br>
-; AVX512F-32-LABEL: test_int_x86_avx512_kunpck_qd:<br>
-; AVX512F-32: # %bb.0:<br>
-; AVX512F-32-NEXT: subl $12, %esp<br>
-; AVX512F-32-NEXT: .cfi_def_cfa_offset 16<br>
-; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k0<br>
-; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1<br>
-; AVX512F-32-NEXT: kunpckdq %k0, %k1, %k0<br>
-; AVX512F-32-NEXT: kmovq %k0, (%esp)<br>
-; AVX512F-32-NEXT: movl (%esp), %eax<br>
-; AVX512F-32-NEXT: movl {{[0-9]+}}(%esp), %edx<br>
-; AVX512F-32-NEXT: addl $12, %esp<br>
-; AVX512F-32-NEXT: retl<br>
- %res = call i64 @llvm.x86.avx512.kunpck.dq(i64 %x0, i64 %x1)<br>
- ret i64 %res<br>
-}<br>
-<br>
declare i64 @llvm.x86.avx512.cvtb2mask.512<wbr>(<64 x i8>)<br>
define i64@test_int_x86_avx512_cvtb2m<wbr>ask_512(<64 x i8> %x0) {<br>
<br>
<br></div></div><span class="">
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</span></blockquote><div class="HOEnZb"><div class="h5">
<br>
<br>
-- <br>
<br>
-Bill Seurer<br>
<br>
______________________________<wbr>_________________<br>
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