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<div class="moz-cite-prefix">I would rather move the actual code to
adjust the shift amount type, instead of just the assert.<br>
<br>
-Eli<br>
<br>
On 11/21/2017 9:08 AM, Liu, Yaxun (Sam) wrote:<br>
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<p class="MsoNormal"><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:windowtext">How
about moving the assert to
</span>LegalizeTypes.cpp, right before the change? Since
that’s where regression may happen.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Sam<span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:windowtext"><o:p></o:p></span></p>
<p class="MsoNormal"><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:windowtext"><o:p> </o:p></span></p>
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<div style="border:none;border-top:solid #E1E1E1
1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:windowtext">From:</span></b><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:windowtext">
Friedman, Eli [<a class="moz-txt-link-freetext" href="mailto:efriedma@codeaurora.org">mailto:efriedma@codeaurora.org</a>]
<br>
<b>Sent:</b> Monday, November 20, 2017 9:46 PM<br>
<b>To:</b> Liu, Yaxun (Sam) <a class="moz-txt-link-rfc2396E" href="mailto:Yaxun.Liu@amd.com"><Yaxun.Liu@amd.com></a>;
<a class="moz-txt-link-abbreviated" href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a><br>
<b>Subject:</b> Re: [llvm] r318727 - [AMDGPU] Fix
DAGTypeLegalizer::SplitInteger for shift amount type<o:p></o:p></span></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<div>
<p class="MsoNormal">On 11/20/2017 6:29 PM, Yaxun Liu via
llvm-commits wrote:<o:p></o:p></p>
</div>
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<pre>Author: yaxunl<o:p></o:p></pre>
<pre>Date: Mon Nov 20 18:29:54 2017<o:p></o:p></pre>
<pre>New Revision: 318727<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>URL: <a href="http://llvm.org/viewvc/llvm-project?rev=318727&view=rev" moz-do-not-send="true">http://llvm.org/viewvc/llvm-project?rev=318727&view=rev</a><o:p></o:p></pre>
<pre>Log:<o:p></o:p></pre>
<pre>[AMDGPU] Fix DAGTypeLegalizer::SplitInteger for shift amount type<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>DAGTypeLegalizer::SplitInteger uses default pointer size as shift amount constant type,<o:p></o:p></pre>
<pre>which causes less performant ISA in amdgcn---amdgiz target since the default pointer<o:p></o:p></pre>
<pre>type is i64 whereas the desired shift amount type is i32.<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>This patch fixes that by using TLI.getScalarShiftAmountTy in DAGTypeLegalizer::SplitInteger.<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>The X86 change is necessary since splitting i512 requires shifting amount of 256, which<o:p></o:p></pre>
<pre>cannot be held by i8.<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>Differential Revision: <a href="https://reviews.llvm.org/D40148" moz-do-not-send="true">https://reviews.llvm.org/D40148</a><o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>Modified:<o:p></o:p></pre>
<pre> llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp<o:p></o:p></pre>
<pre> llvm/trunk/lib/Target/X86/X86ISelLowering.h<o:p></o:p></pre>
<pre> llvm/trunk/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp<o:p></o:p></pre>
<pre>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=318727&r1=318726&r2=318727&view=diff" moz-do-not-send="true">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp?rev=318727&r1=318726&r2=318727&view=diff</a><o:p></o:p></pre>
<pre>==============================================================================<o:p></o:p></pre>
<pre>--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp (original)<o:p></o:p></pre>
<pre>+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp Mon Nov 20 18:29:54 2017<o:p></o:p></pre>
<pre>@@ -1172,9 +1172,11 @@ void DAGTypeLegalizer::SplitInteger(SDVa<o:p></o:p></pre>
<pre> assert(LoVT.getSizeInBits() + HiVT.getSizeInBits() ==<o:p></o:p></pre>
<pre> Op.getValueSizeInBits() && "Invalid integer splitting!");<o:p></o:p></pre>
<pre> Lo = DAG.getNode(ISD::TRUNCATE, dl, LoVT, Op);<o:p></o:p></pre>
<pre>- Hi = DAG.getNode(ISD::SRL, dl, Op.getValueType(), Op,<o:p></o:p></pre>
<pre>- DAG.getConstant(LoVT.getSizeInBits(), dl,<o:p></o:p></pre>
<pre>- TLI.getPointerTy(DAG.getDataLayout())));<o:p></o:p></pre>
<pre>+ Hi =<o:p></o:p></pre>
<pre>+ DAG.getNode(ISD::SRL, dl, Op.getValueType(), Op,<o:p></o:p></pre>
<pre>+ DAG.getConstant(LoVT.getSizeInBits(), dl,<o:p></o:p></pre>
<pre>+ TLI.getScalarShiftAmountTy(<o:p></o:p></pre>
<pre>+ DAG.getDataLayout(), Op.getValueType())));<o:p></o:p></pre>
<pre> Hi = DAG.getNode(ISD::TRUNCATE, dl, HiVT, Hi);<o:p></o:p></pre>
<pre> }<o:p></o:p></pre>
<pre> <o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h<o:p></o:p></pre>
<pre>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=318727&r1=318726&r2=318727&view=diff" moz-do-not-send="true">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=318727&r1=318726&r2=318727&view=diff</a><o:p></o:p></pre>
<pre>==============================================================================<o:p></o:p></pre>
<pre>--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)<o:p></o:p></pre>
<pre>+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Mon Nov 20 18:29:54 2017<o:p></o:p></pre>
<pre>@@ -18,6 +18,7 @@<o:p></o:p></pre>
<pre> #include "llvm/CodeGen/CallingConvLower.h"<o:p></o:p></pre>
<pre> #include "llvm/CodeGen/SelectionDAG.h"<o:p></o:p></pre>
<pre> #include "llvm/CodeGen/TargetLowering.h"<o:p></o:p></pre>
<pre>+#include "llvm/Support/MathExtras.h"<o:p></o:p></pre>
<pre> #include "llvm/Target/TargetOptions.h"<o:p></o:p></pre>
<pre> <o:p></o:p></pre>
<pre> namespace llvm {<o:p></o:p></pre>
<pre>@@ -664,8 +665,14 @@ namespace llvm {<o:p></o:p></pre>
<pre> void markLibCallAttributes(MachineFunction *MF, unsigned CC,<o:p></o:p></pre>
<pre> ArgListTy &Args) const override;<o:p></o:p></pre>
<pre> <o:p></o:p></pre>
<pre>- MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {<o:p></o:p></pre>
<pre>- return MVT::i8;<o:p></o:p></pre>
<pre>+ // For i512, DAGTypeLegalizer::SplitInteger needs a shift amount 256,<o:p></o:p></pre>
<pre>+ // which cannot be held by i8, therefore use i16 instead. In all the<o:p></o:p></pre>
<pre>+ // other situations i8 is sufficient.<o:p></o:p></pre>
<pre>+ MVT getScalarShiftAmountTy(const DataLayout &, EVT VT) const override {<o:p></o:p></pre>
<pre>+ MVT T = VT.getSizeInBits() >= 512 ? MVT::i16 : MVT::i8;<o:p></o:p></pre>
</blockquote>
<p class="MsoNormal"><br>
From LangRef, the description of integer types: "Any bit width
from 1 bit to 2<sup>23</sup>-1 (about 8 million) can be
specified." You need at least an i32 to hold every possible
shift amount. (Granted, the issue is unlikely to come up in
practice.)<br>
<br>
AVR also has a getScalarShiftAmountTy() which returns i8. It
would be better to add a check somewhere to the
target-independent code to avoid this sort of issue rather
than make each target add this check to its own
getScalarShiftAmountTy().<o:p></o:p></p>
<p>-Eli<o:p></o:p></p>
<pre>-- <o:p></o:p></pre>
<pre>Employee of Qualcomm Innovation Center, Inc.<o:p></o:p></pre>
<pre>Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project<o:p></o:p></pre>
</div>
</blockquote>
<p><br>
</p>
<pre class="moz-signature" cols="72">--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project</pre>
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