<html><head><meta http-equiv="Content-Type" content="text/html; charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">Hi Galina,<div class=""><br class=""></div><div class="">Something strange is happening on one of your bots (llvm-clang-x86_64-expensive-checks-win). After this commit, it didn't re-run tablegen as we've found in the past so I forced a clean build as usual. However, now it's failing to run the cmake step successfully due to a missing LLVMBuild.txt (see <a href="http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/5612/steps/cmake-configure/logs/stdio" class="">http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/5612/steps/cmake-configure/logs/stdio</a>). I'd hazard a guess that the actual problem is related to the '/' that's in the path and that the clean build has only made a pre-existing problem visible. Could you take a look?<br class=""><div><br class=""><blockquote type="cite" class=""><div class="">On 20 Oct 2017, at 13:55, Daniel Sanders via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="">Author: dsanders<br class="">Date: Fri Oct 20 13:55:29 2017<br class="">New Revision: 316237<br class=""><br class="">URL: <a href="http://llvm.org/viewvc/llvm-project?rev=316237&view=rev" class="">http://llvm.org/viewvc/llvm-project?rev=316237&view=rev</a><br class="">Log:<br class="">[globalisel][tablegen] Fix small spelling nits. NFC<br class=""><br class="">ComplexRendererFn -> ComplexRendererFns<br class="">Corrected a couple lingering references to tied operands that were missed.<br class=""><br class=""><br class="">Modified:<br class="">    llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h<br class="">    llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h<br class="">    llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp<br class="">    llvm/trunk/test/TableGen/GlobalISelEmitter.td<br class="">    llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp<br class=""><br class="">Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h?rev=316237&r1=316236&r2=316237&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h?rev=316237&r1=316236&r2=316237&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h (original)<br class="">+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h Fri Oct 20 13:55:29 2017<br class="">@@ -276,13 +276,13 @@ public:<br class="">   virtual bool select(MachineInstr &I) const = 0;<br class=""><br class=""> protected:<br class="">-  using ComplexRendererFn =<br class="">+  using ComplexRendererFns =<br class="">       Optional<SmallVector<std::function<void(MachineInstrBuilder &)>, 4>>;<br class="">   using RecordedMIVector = SmallVector<MachineInstr *, 4>;<br class="">   using NewMIVector = SmallVector<MachineInstrBuilder, 4>;<br class=""><br class="">   struct MatcherState {<br class="">-    std::vector<ComplexRendererFn::value_type> Renderers;<br class="">+    std::vector<ComplexRendererFns::value_type> Renderers;<br class="">     RecordedMIVector MIs;<br class=""><br class="">     MatcherState(unsigned MaxRenderers);<br class=""><br class="">Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h?rev=316237&r1=316236&r2=316237&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h?rev=316237&r1=316236&r2=316237&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h (original)<br class="">+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h Fri Oct 20 13:55:29 2017<br class="">@@ -297,7 +297,7 @@ bool InstructionSelector::executeMatchTa<br class="">                    << "), ComplexPredicateID=" << ComplexPredicateID << ")\n");<br class="">       assert(State.MIs[InsnID] != nullptr && "Used insn before defined");<br class="">       // FIXME: Use std::invoke() when it's available.<br class="">-      ComplexRendererFn Renderer =<br class="">+      ComplexRendererFns Renderer =<br class="">           (ISel.*MatcherInfo.ComplexPredicates[ComplexPredicateID])(<br class="">               State.MIs[InsnID]->getOperand(OpIdx));<br class="">       if (Renderer.hasValue())<br class=""><br class="">Modified: llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=316237&r1=316236&r2=316237&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp?rev=316237&r1=316236&r2=316237&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (original)<br class="">+++ llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp Fri Oct 20 13:55:29 2017<br class="">@@ -64,31 +64,31 @@ private:<br class="">   bool selectCompareBranch(MachineInstr &I, MachineFunction &MF,<br class="">                            MachineRegisterInfo &MRI) const;<br class=""><br class="">-  ComplexRendererFn selectArithImmed(MachineOperand &Root) const;<br class="">+  ComplexRendererFns selectArithImmed(MachineOperand &Root) const;<br class=""><br class="">-  ComplexRendererFn selectAddrModeUnscaled(MachineOperand &Root,<br class="">-                                           unsigned Size) const;<br class="">+  ComplexRendererFns selectAddrModeUnscaled(MachineOperand &Root,<br class="">+                                            unsigned Size) const;<br class=""><br class="">-  ComplexRendererFn selectAddrModeUnscaled8(MachineOperand &Root) const {<br class="">+  ComplexRendererFns selectAddrModeUnscaled8(MachineOperand &Root) const {<br class="">     return selectAddrModeUnscaled(Root, 1);<br class="">   }<br class="">-  ComplexRendererFn selectAddrModeUnscaled16(MachineOperand &Root) const {<br class="">+  ComplexRendererFns selectAddrModeUnscaled16(MachineOperand &Root) const {<br class="">     return selectAddrModeUnscaled(Root, 2);<br class="">   }<br class="">-  ComplexRendererFn selectAddrModeUnscaled32(MachineOperand &Root) const {<br class="">+  ComplexRendererFns selectAddrModeUnscaled32(MachineOperand &Root) const {<br class="">     return selectAddrModeUnscaled(Root, 4);<br class="">   }<br class="">-  ComplexRendererFn selectAddrModeUnscaled64(MachineOperand &Root) const {<br class="">+  ComplexRendererFns selectAddrModeUnscaled64(MachineOperand &Root) const {<br class="">     return selectAddrModeUnscaled(Root, 8);<br class="">   }<br class="">-  ComplexRendererFn selectAddrModeUnscaled128(MachineOperand &Root) const {<br class="">+  ComplexRendererFns selectAddrModeUnscaled128(MachineOperand &Root) const {<br class="">     return selectAddrModeUnscaled(Root, 16);<br class="">   }<br class=""><br class="">-  ComplexRendererFn selectAddrModeIndexed(MachineOperand &Root,<br class="">-                                          unsigned Size) const;<br class="">+  ComplexRendererFns selectAddrModeIndexed(MachineOperand &Root,<br class="">+                                           unsigned Size) const;<br class="">   template <int Width><br class="">-  ComplexRendererFn selectAddrModeIndexed(MachineOperand &Root) const {<br class="">+  ComplexRendererFns selectAddrModeIndexed(MachineOperand &Root) const {<br class="">     return selectAddrModeIndexed(Root, Width / 8);<br class="">   }<br class=""><br class="">@@ -1373,7 +1373,7 @@ bool AArch64InstructionSelector::select(<br class=""> /// SelectArithImmed - Select an immediate value that can be represented as<br class=""> /// a 12-bit value shifted left by either 0 or 12.  If so, return true with<br class=""> /// Val set to the 12-bit value and Shift set to the shifter operand.<br class="">-InstructionSelector::ComplexRendererFn<br class="">+InstructionSelector::ComplexRendererFns<br class=""> AArch64InstructionSelector::selectArithImmed(MachineOperand &Root) const {<br class="">   MachineInstr &MI = *Root.getParent();<br class="">   MachineBasicBlock &MBB = *MI.getParent();<br class="">@@ -1423,7 +1423,7 @@ AArch64InstructionSelector::selectArithI<br class=""> /// immediate addressing mode.  The "Size" argument is the size in bytes of the<br class=""> /// memory reference, which is needed here to know what is valid for a scaled<br class=""> /// immediate.<br class="">-InstructionSelector::ComplexRendererFn<br class="">+InstructionSelector::ComplexRendererFns<br class=""> AArch64InstructionSelector::selectAddrModeUnscaled(MachineOperand &Root,<br class="">                                                    unsigned Size) const {<br class="">   MachineRegisterInfo &MRI =<br class="">@@ -1467,7 +1467,7 @@ AArch64InstructionSelector::selectAddrMo<br class=""> /// Select a "register plus scaled unsigned 12-bit immediate" address.  The<br class=""> /// "Size" argument is the size in bytes of the memory reference, which<br class=""> /// determines the scale.<br class="">-InstructionSelector::ComplexRendererFn<br class="">+InstructionSelector::ComplexRendererFns<br class=""> AArch64InstructionSelector::selectAddrModeIndexed(MachineOperand &Root,<br class="">                                                   unsigned Size) const {<br class="">   MachineRegisterInfo &MRI =<br class=""><br class="">Modified: llvm/trunk/test/TableGen/GlobalISelEmitter.td<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/GlobalISelEmitter.td?rev=316237&r1=316236&r2=316237&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/GlobalISelEmitter.td?rev=316237&r1=316236&r2=316237&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/test/TableGen/GlobalISelEmitter.td (original)<br class="">+++ llvm/trunk/test/TableGen/GlobalISelEmitter.td Fri Oct 20 13:55:29 2017<br class="">@@ -53,7 +53,7 @@ def HasC : Predicate<"Subtarget->hasC()"<br class=""><br class=""> // CHECK-LABEL: #ifdef GET_GLOBALISEL_TEMPORARIES_DECL<br class=""> // CHECK-NEXT:    mutable MatcherState State;<br class="">-// CHECK-NEXT:    typedef ComplexRendererFn(MyTargetInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;<br class="">+// CHECK-NEXT:    typedef ComplexRendererFns(MyTargetInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;<br class=""> // CHECK-NEXT:    const MatcherInfoTy<PredicateBitset, ComplexMatcherMemFn> MatcherInfo;<br class=""> // CHECK-NEXT:    static MyTargetInstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];<br class=""> // CHECK-NEXT:  #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL<br class=""><br class="">Modified: llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp?rev=316237&r1=316236&r2=316237&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp?rev=316237&r1=316236&r2=316237&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp (original)<br class="">+++ llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp Fri Oct 20 13:55:29 2017<br class="">@@ -672,7 +672,7 @@ public:<br class="">   /// but OPM_Int must have priority over OPM_RegBank since constant integers<br class="">   /// are represented by a virtual register defined by a G_CONSTANT instruction.<br class="">   enum PredicateKind {<br class="">-    OPM_Tie,<br class="">+    OPM_SameOperand,<br class="">     OPM_ComplexPattern,<br class="">     OPM_IntrinsicID,<br class="">     OPM_Instruction,<br class="">@@ -724,14 +724,14 @@ PredicateListMatcher<OperandPredicateMat<br class=""> /// Generates code to check that a register operand is defined by the same exact<br class=""> /// one as another.<br class=""> class SameOperandMatcher : public OperandPredicateMatcher {<br class="">-  std::string TiedTo;<br class="">+  std::string MatchingName;<br class=""><br class=""> public:<br class="">-  SameOperandMatcher(StringRef TiedTo)<br class="">-      : OperandPredicateMatcher(OPM_Tie), TiedTo(TiedTo) {}<br class="">+  SameOperandMatcher(StringRef MatchingName)<br class="">+      : OperandPredicateMatcher(OPM_SameOperand), MatchingName(MatchingName) {}<br class=""><br class="">   static bool classof(const OperandPredicateMatcher *P) {<br class="">-    return P->getKind() == OPM_Tie;<br class="">+    return P->getKind() == OPM_SameOperand;<br class="">   }<br class=""><br class="">   void emitPredicateOpcodes(MatchTable &Table, RuleMatcher &Rule,<br class="">@@ -2094,7 +2094,7 @@ void SameOperandMatcher::emitPredicateOp<br class="">                                               RuleMatcher &Rule,<br class="">                                               unsigned InsnVarID,<br class="">                                               unsigned OpIdx) const {<br class="">-  const OperandMatcher &OtherOM = Rule.getOperandMatcher(TiedTo);<br class="">+  const OperandMatcher &OtherOM = Rule.getOperandMatcher(MatchingName);<br class="">   unsigned OtherInsnVarID = Rule.getInsnVarID(OtherOM.getInstructionMatcher());<br class=""><br class="">   Table << MatchTable::Opcode("GIM_CheckIsSameOperand")<br class="">@@ -2982,7 +2982,7 @@ void GlobalISelEmitter::run(raw_ostream<br class="">   OS << "#ifdef GET_GLOBALISEL_TEMPORARIES_DECL\n"<br class="">      << "  mutable MatcherState State;\n"<br class="">      << "  typedef "<br class="">-        "ComplexRendererFn("<br class="">+        "ComplexRendererFns("<br class="">      << Target.getName()<br class="">      << "InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;\n"<br class="">      << "  const MatcherInfoTy<PredicateBitset, ComplexMatcherMemFn> "<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits<br class=""></div></div></blockquote></div><br class=""></div></body></html>