<div dir="ltr">If LiveIns is already a container, should 'liveins()' return a const ref to that container instead? (or is it that we're expecting thees kind of ranges to be cheap to copy? That seems like a mistake in how we treat ranges if we've already created an assumption around cheap-to-copy ranges... might be best to avoid that)<br><br>Having an iterator_range for cases where there is no underlying container (custom iterators iterating over some portion of the data structure, filtering, etc) makes sense to me - but I don't know that we need it/should use it when there is such a range.</div><br><div class="gmail_quote"><div dir="ltr">On Mon, Oct 16, 2017 at 12:08 PM Krzysztof Parzyszek via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: kparzysz<br>
Date: Mon Oct 16 12:08:41 2017<br>
New Revision: 315927<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=315927&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=315927&view=rev</a><br>
Log:<br>
Add iterator range MachineRegisterInfo::liveins(), adopt users, NFC<br>
<br>
Modified:<br>
llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h<br>
llvm/trunk/lib/CodeGen/MIRPrinter.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp<br>
llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.cpp<br>
llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp<br>
llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp<br>
llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86VZeroUpper.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Mon Oct 16 12:08:41 2017<br>
@@ -841,6 +841,9 @@ public:<br>
livein_iterator livein_begin() const { return LiveIns.begin(); }<br>
livein_iterator livein_end() const { return LiveIns.end(); }<br>
bool livein_empty() const { return LiveIns.empty(); }<br>
+ iterator_range<livein_iterator> liveins() const {<br>
+ return make_range(livein_begin(), livein_end());<br>
+ }<br>
<br>
bool isLiveIn(unsigned Reg) const;<br>
<br>
<br>
Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Mon Oct 16 12:08:41 2017<br>
@@ -297,11 +297,11 @@ void MIRPrinter::convert(yaml::MachineFu<br>
}<br>
<br>
// Print the live ins.<br>
- for (auto I = RegInfo.livein_begin(), E = RegInfo.livein_end(); I != E; ++I) {<br>
+ for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {<br>
yaml::MachineFunctionLiveIn LiveIn;<br>
- printReg(I->first, LiveIn.Register, TRI);<br>
- if (I->second)<br>
- printReg(I->second, LiveIn.VirtualRegister, TRI);<br>
+ printReg(LI.first, LiveIn.Register, TRI);<br>
+ if (LI.second)<br>
+ printReg(LI.second, LiveIn.VirtualRegister, TRI);<br>
MF.LiveIns.push_back(LiveIn);<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Oct 16 12:08:41 2017<br>
@@ -494,10 +494,9 @@ bool SelectionDAGISel::runOnMachineFunct<br>
<br>
DenseMap<unsigned, unsigned> LiveInMap;<br>
if (!FuncInfo->ArgDbgValues.empty())<br>
- for (MachineRegisterInfo::livein_iterator LI = RegInfo->livein_begin(),<br>
- E = RegInfo->livein_end(); LI != E; ++LI)<br>
- if (LI->second)<br>
- LiveInMap.insert(std::make_pair(LI->first, LI->second));<br>
+ for (std::pair<unsigned, unsigned> LI : RegInfo->liveins())<br>
+ if (LI.second)<br>
+ LiveInMap.insert(LI);<br>
<br>
// Insert DBG_VALUE instructions for function arguments to the entry block.<br>
for (unsigned i = 0, e = FuncInfo->ArgDbgValues.size(); i != e; ++i) {<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.cpp?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.cpp?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.cpp Mon Oct 16 12:08:41 2017<br>
@@ -1186,10 +1186,8 @@ int R600InstrInfo::getIndirectIndexBegin<br>
}<br>
<br>
const TargetRegisterClass *IndirectRC = getIndirectAddrRegClass();<br>
- for (MachineRegisterInfo::livein_iterator LI = MRI.livein_begin(),<br>
- LE = MRI.livein_end();<br>
- LI != LE; ++LI) {<br>
- unsigned Reg = LI->first;<br>
+ for (std::pair<unsigned, unsigned> LI : MRI.liveins()) {<br>
+ unsigned Reg = LI.first;<br>
if (TargetRegisterInfo::isVirtualRegister(Reg) ||<br>
!IndirectRC->contains(Reg))<br>
continue;<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp Mon Oct 16 12:08:41 2017<br>
@@ -1248,11 +1248,8 @@ unsigned HexagonEvaluator::getNextPhysRe<br>
}<br>
<br>
unsigned HexagonEvaluator::getVirtRegFor(unsigned PReg) const {<br>
- using iterator = MachineRegisterInfo::livein_iterator;<br>
-<br>
- for (iterator I = MRI.livein_begin(), E = MRI.livein_end(); I != E; ++I) {<br>
- if (I->first == PReg)<br>
- return I->second;<br>
- }<br>
+ for (std::pair<unsigned,unsigned> P : MRI.liveins())<br>
+ if (P.first == PReg)<br>
+ return P.second;<br>
return 0;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp Mon Oct 16 12:08:41 2017<br>
@@ -913,8 +913,8 @@ void DataFlowGraph::build(unsigned Optio<br>
MachineRegisterInfo &MRI = MF.getRegInfo();<br>
MachineBasicBlock &EntryB = *EA.Addr->getCode();<br>
assert(EntryB.pred_empty() && "Function entry block has predecessors");<br>
- for (auto I = MRI.livein_begin(), E = MRI.livein_end(); I != E; ++I)<br>
- LiveIns.insert(RegisterRef(I->first));<br>
+ for (std::pair<unsigned,unsigned> P : MRI.liveins())<br>
+ LiveIns.insert(RegisterRef(P.first));<br>
if (MRI.tracksLiveness()) {<br>
for (auto I : EntryB.liveins())<br>
LiveIns.insert(RegisterRef(I.PhysReg, I.LaneMask));<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp Mon Oct 16 12:08:41 2017<br>
@@ -312,11 +312,9 @@ static void HandleVRSaveUpdate(MachineIn<br>
<br>
// Live in and live out values already must be in the mask, so don't bother<br>
// marking them.<br>
- for (MachineRegisterInfo::livein_iterator<br>
- I = MF->getRegInfo().livein_begin(),<br>
- E = MF->getRegInfo().livein_end(); I != E; ++I) {<br>
- unsigned RegNo = TRI->getEncodingValue(I->first);<br>
- if (VRRegNo[RegNo] == I->first) // If this really is a vector reg.<br>
+ for (std::pair<unsigned, unsigned> LI : MF->getRegInfo().liveins()) {<br>
+ unsigned RegNo = TRI->getEncodingValue(LI.first);<br>
+ if (VRRegNo[RegNo] == LI.first) // If this really is a vector reg.<br>
UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.<br>
}<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Oct 16 12:08:41 2017<br>
@@ -3235,9 +3235,9 @@ SDValue X86TargetLowering::LowerFormalAr<br>
<br>
if (CallConv == CallingConv::X86_RegCall ||<br>
Fn->hasFnAttribute("no_caller_saved_registers")) {<br>
- const MachineRegisterInfo &MRI = MF.getRegInfo();<br>
- for (const auto &Pair : make_range(MRI.livein_begin(), MRI.livein_end()))<br>
- MF.getRegInfo().disableCalleeSavedRegister(Pair.first);<br>
+ MachineRegisterInfo &MRI = MF.getRegInfo();<br>
+ for (std::pair<unsigned, unsigned> Pair : MRI.liveins())<br>
+ MRI.disableCalleeSavedRegister(Pair.first);<br>
}<br>
<br>
return Chain;<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86VZeroUpper.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86VZeroUpper.cpp?rev=315927&r1=315926&r2=315927&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86VZeroUpper.cpp?rev=315927&r1=315926&r2=315927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86VZeroUpper.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86VZeroUpper.cpp Mon Oct 16 12:08:41 2017<br>
@@ -132,9 +132,8 @@ static bool isYmmOrZmmReg(unsigned Reg)<br>
}<br>
<br>
static bool checkFnHasLiveInYmmOrZmm(MachineRegisterInfo &MRI) {<br>
- for (MachineRegisterInfo::livein_iterator I = MRI.livein_begin(),<br>
- E = MRI.livein_end(); I != E; ++I)<br>
- if (isYmmOrZmmReg(I->first))<br>
+ for (std::pair<unsigned, unsigned> LI : MRI.liveins())<br>
+ if (isYmmOrZmmReg(LI.first))<br>
return true;<br>
<br>
return false;<br>
<br>
<br>
_______________________________________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
</blockquote></div>