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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'>Hi Galina,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'>Sorry, I couldn’t get to this. Thanks for reverting the patch. We will look into this and push up a fix shortly.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'>Pranav<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'><o:p> </o:p></span></p><p class=MsoNormal><b><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'>From:</span></b><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'> Galina Kistanova [mailto:gkistanova@gmail.com] <br><b>Sent:</b> Monday, September 25, 2017 5:35 PM<br><b>To:</b> Pranav Bhandarkar <pranavb@codeaurora.org><br><b>Cc:</b> Artur Pilipenko via llvm-commits <llvm-commits@lists.llvm.org><br><b>Subject:</b> Re: [llvm] r313993 - Check vector elements for equivalence in the HexagonVectorLoopCarriedReuse pass<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal style='margin-bottom:12.0pt'>Hello Pranav,<br><br>It looks like this commit broke one of our builders:<br><a href="http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/5037">http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/5037</a><br><br>Please have a look?<br><br>Thanks<br><br>Galina<br><br>. . . <br>Failing Tests (1):<br> LLVM :: CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_constant.ll<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>On Fri, Sep 22, 2017 at 9:43 AM, Pranav Bhandarkar via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>> wrote:<o:p></o:p></p><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in'><p class=MsoNormal>Author: pranavb<br>Date: Fri Sep 22 09:43:31 2017<br>New Revision: 313993<br><br>URL: <a href="http://llvm.org/viewvc/llvm-project?rev=313993&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=313993&view=rev</a><br>Log:<br>Check vector elements for equivalence in the HexagonVectorLoopCarriedReuse pass<br><br>If the two instructions being compared for equivalence have corresponding operands<br>that are integer constants, then check their values to determine equivalence.<br><br>Patch by Suyog Sarda!<br><br><br>Added:<br> llvm/trunk/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_constant.ll<br>Modified:<br> llvm/trunk/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp<br><br>Modified: llvm/trunk/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp?rev=313993&r1=313992&r2=313993&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp?rev=313993&r1=313992&r2=313993&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp (original)<br>+++ llvm/trunk/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp Fri Sep 22 09:43:31 2017<br>@@ -302,6 +302,21 @@ bool HexagonVectorLoopCarriedReuse::isEq<br> return false;<br> }<br> }<br>+<br>+ // If both the Instructions are of Vector Type and any of the element<br>+ // is integer constant, check their values too for equivalence.<br>+ if (I1->getType()->isVectorTy() && I2->getType()->isVectorTy()) {<br>+ unsigned NumOperands = I1->getNumOperands();<br>+ for (unsigned i = 0; i < NumOperands; ++i) {<br>+ ConstantInt *C1 = dyn_cast<ConstantInt>(I1->getOperand(i));<br>+ ConstantInt *C2 = dyn_cast<ConstantInt>(I2->getOperand(i));<br>+ if(!C1) continue;<br>+ assert(C2);<br>+ if (C1->getSExtValue() != C2->getSExtValue())<br>+ return false;<br>+ }<br>+ }<br>+<br> return true;<br> }<br><br><br>Added: llvm/trunk/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_constant.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_constant.ll?rev=313993&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_constant.ll?rev=313993&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_constant.ll (added)<br>+++ llvm/trunk/test/CodeGen/Hexagon/hexagon_vector_loop_carried_reuse_constant.ll Fri Sep 22 09:43:31 2017<br>@@ -0,0 +1,86 @@<br>+; RUN: opt < %s -hexagon-vlcr -adce -S | FileCheck %s<br>+<br>+; CHECK-NOT: %.hexagon.vlcr<br>+; ModuleID = 'hexagon_vector_loop_carried_reuse.c'<br>+source_filename = "hexagon_vector_loop_carried_reuse.c"<br>+target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"<br>+target triple = "hexagon"<br>+<br>+@W = external local_unnamed_addr global i32, align 4<br>+<br>+; Function Attrs: nounwind<br>+define void @foo(i8* noalias nocapture readonly %src, i8* noalias nocapture %dst, i32 %stride) local_unnamed_addr #0 {<br>+entry:<br>+ %add.ptr = getelementptr inbounds i8, i8* %src, i32 %stride<br>+ %mul = mul nsw i32 %stride, 2<br>+ %add.ptr1 = getelementptr inbounds i8, i8* %src, i32 %mul<br>+ %0 = load i32, i32* @W, align 4, !tbaa !1<br>+ %cmp55 = icmp sgt i32 %0, 0<br>+ br i1 %cmp55, label %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a>, label %for.end<br>+<br>+<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a>: ; preds = %entry<br>+ %1 = bitcast i8* %add.ptr1 to <32 x i32>*<br>+ %2 = load <32 x i32>, <32 x i32>* %1, align 128, !tbaa !5<br>+ %incdec.ptr4 = getelementptr inbounds i8, i8* %add.ptr1, i32 128<br>+ %3 = bitcast i8* %incdec.ptr4 to <32 x i32>*<br>+ %4 = bitcast i8* %add.ptr to <32 x i32>*<br>+ %5 = load <32 x i32>, <32 x i32>* %4, align 128, !tbaa !5<br>+ %incdec.ptr2 = getelementptr inbounds i8, i8* %add.ptr, i32 128<br>+ %6 = bitcast i8* %incdec.ptr2 to <32 x i32>*<br>+ %7 = bitcast i8* %src to <32 x i32>*<br>+ %8 = load <32 x i32>, <32 x i32>* %7, align 128, !tbaa !5<br>+ %incdec.ptr = getelementptr inbounds i8, i8* %src, i32 128<br>+ %9 = bitcast i8* %incdec.ptr to <32 x i32>*<br>+ %10 = bitcast i8* %dst to <32 x i32>*<br>+ br label %for.body<br>+<br>+for.body: ; preds = %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a>, %for.body<br>+ %out.063 = phi <32 x i32>* [ %10, %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a> ], [ %incdec.ptr18, %for.body ]<br>+ %p2.062 = phi <32 x i32>* [ %3, %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a> ], [ %incdec.ptr10, %for.body ]<br>+ %p1.061 = phi <32 x i32>* [ %6, %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a> ], [ %incdec.ptr8, %for.body ]<br>+ %p0.060 = phi <32 x i32>* [ %9, %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a> ], [ %incdec.ptr6, %for.body ]<br>+ %i.059 = phi i32 [ 0, %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a> ], [ %add, %for.body ]<br>+ %a.sroa.0.058 = phi <32 x i32> [ %8, %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a> ], [ %11, %for.body ]<br>+ %b.sroa.0.057 = phi <32 x i32> [ %5, %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a> ], [ %12, %for.body ]<br>+ %c.sroa.0.056 = phi <32 x i32> [ %2, %<a href="http://for.body.lr.ph" target="_blank">for.body.lr.ph</a> ], [ %13, %for.body ]<br>+ %incdec.ptr6 = getelementptr inbounds <32 x i32>, <32 x i32>* %p0.060, i32 1<br>+ %11 = load <32 x i32>, <32 x i32>* %p0.060, align 128, !tbaa !5<br>+ %incdec.ptr8 = getelementptr inbounds <32 x i32>, <32 x i32>* %p1.061, i32 1<br>+ %12 = load <32 x i32>, <32 x i32>* %p1.061, align 128, !tbaa !5<br>+ %incdec.ptr10 = getelementptr inbounds <32 x i32>, <32 x i32>* %p2.062, i32 1<br>+ %13 = load <32 x i32>, <32 x i32>* %p2.062, align 128, !tbaa !5<br>+ %14 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %a.sroa.0.058, <32 x i32> %b.sroa.0.057, i32 4)<br>+ %15 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %14, <32 x i32> %c.sroa.0.056)<br>+ %16 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %11, <32 x i32> %12, i32 5)<br>+ %17 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %16, <32 x i32> %13)<br>+ %18 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %17, <32 x i32> %15, i32 1)<br>+ %incdec.ptr18 = getelementptr inbounds <32 x i32>, <32 x i32>* %out.063, i32 1<br>+ store <32 x i32> %18, <32 x i32>* %out.063, align 128, !tbaa !5<br>+ %add = add nuw nsw i32 %i.059, 128<br>+ %cmp = icmp slt i32 %add, %0<br>+ br i1 %cmp, label %for.body, label %for.end.loopexit<br>+<br>+for.end.loopexit: ; preds = %for.body<br>+ br label %for.end<br>+<br>+for.end: ; preds = %for.end.loopexit, %entry<br>+ ret void<br>+}<br>+<br>+; Function Attrs: nounwind readnone<br>+declare <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32>, <32 x i32>) #1<br>+<br>+; Function Attrs: nounwind readnone<br>+declare <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32>, <32 x i32>, i32) #1<br>+<br>+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-double,-long-calls" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>+attributes #1 = { nounwind readnone }<br>+<br>+!llvm.ident = !{!0}<br>+<br>+!0 = !{!"QuIC LLVM Hexagon Clang version hexagon-clang-82-2622 (based on LLVM 5.0.0)"}<br>+!1 = !{!2, !2, i64 0}<br>+!2 = !{!"int", !3, i64 0}<br>+!3 = !{!"omnipotent char", !4, i64 0}<br>+!4 = !{!"Simple C/C++ TBAA"}<br>+!5 = !{!3, !3, i64 0}<br><br><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a><br><a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><o:p></o:p></p></blockquote></div><p class=MsoNormal><o:p> </o:p></p></div></div></body></html>