<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">This breaks a test on our backend, but I suspect the patch is slightly bugged. Note the following:<div class=""><br class=""></div><div class=""><div style="margin: 0px; font-size: 11px; line-height: normal; font-family: Menlo; color: rgb(0, 132, 0); background-color: rgb(255, 255, 255);" class=""><span style="color: #000000" class="">  </span>// Skip bitcasting</div><div style="margin: 0px; font-size: 11px; line-height: normal; font-family: Menlo; color: rgb(49, 89, 93); background-color: rgb(255, 255, 255);" class=""><span style="color: #000000" class="">  V = </span>peekThroughBitcast<span style="color: #000000" class="">(V);</span></div><div style="margin: 0px; line-height: normal; background-color: rgb(255, 255, 255); min-height: 14px;" class=""><br class=""></div><div style="margin: 0px; font-size: 11px; line-height: normal; font-family: Menlo; color: rgb(0, 132, 0); background-color: rgb(255, 255, 255);" class=""><span style="color: #000000" class="">  </span>// If the input is a build vector. Try to make a smaller build vector.</div><div style="margin: 0px; font-size: 11px; line-height: normal; font-family: Menlo; color: rgb(49, 89, 93); background-color: rgb(255, 255, 255);" class=""><span style="color: #000000" class="">  </span><span style="color: #ba2da2" class="">if</span><span style="color: #000000" class=""> (V-></span>getOpcode<span style="color: #000000" class="">() == </span><span style="color: #4f8187" class="">ISD</span><span style="color: #000000" class="">::</span>BUILD_VECTOR<span style="color: #000000" class="">) {</span></div></div><div class=""><div style="margin: 0px; font-size: 11px; line-height: normal; font-family: Menlo; background-color: rgb(255, 255, 255);" class="">    <span style="color: #ba2da2" class="">if</span> (<span style="color: #ba2da2" class="">auto</span> *Idx = dyn_cast<ConstantSDNode>(N->getOperand(<span style="color: #272ad8" class="">1</span>))) {</div><div style="margin: 0px; font-size: 11px; line-height: normal; font-family: Menlo; background-color: rgb(255, 255, 255);" class="">      <span style="color: #4f8187" class="">EVT</span> InVT = V-><span style="color: #31595d" class="">getValueType</span>(<span style="color: #272ad8" class="">0</span>);</div><div style="margin: 0px; font-size: 11px; line-height: normal; font-family: Menlo; background-color: rgb(255, 255, 255);" class=""><div style="margin: 0px; line-height: normal;" class="">      <span style="color: #ba2da2" class="">unsigned</span> NumElems = NVT.<span style="color: #31595d" class="">getSizeInBits</span>() / InVT.<span style="color: #31595d" class="">getScalarSizeInBits</span>();</div><div style="margin: 0px; line-height: normal;" class="">      <span style="color: #ba2da2" class="">if</span> (NumElems > <span style="color: #272ad8" class="">0</span>) {</div><div style="margin: 0px; line-height: normal;" class="">        <span style="color: #4f8187" class="">EVT</span> ExtractVT = <span style="color: #4f8187" class="">EVT</span>::<span style="color: #31595d" class="">getVectorVT</span>(*<span style="color: #4f8187" class="">DAG</span>.<span style="color: #31595d" class="">getContext</span>(),</div><div style="margin: 0px; line-height: normal;" class="">                                         InVT.<span style="color: #31595d" class="">getVectorElementType</span>(), NumElems);</div><div style="margin: 0px; line-height: normal;" class="">        <span style="color: #ba2da2" class="">if</span> (!LegalOperations ||</div><div style="margin: 0px; line-height: normal;" class="">            TLI.isOperationLegal(ISD::BUILD_VECTOR, ExtractVT)) {</div><div style="margin: 0px; line-height: normal;" class="">          <span style="color: #ba2da2" class="">unsigned</span> IdxVal = Idx->getZExtValue() * NVT.getScalarSizeInBits() /</div><div style="margin: 0px; line-height: normal;" class="">                            InVT.getScalarSizeInBits();</div><div style="margin: 0px; font-size: 12px; line-height: normal; font-family: Helvetica; min-height: 14px;" class=""><br class=""></div><div style="margin: 0px; line-height: normal; color: rgb(0, 132, 0);" class=""><span style="color: #000000" class="">          </span>// Extract the pieces from the original build_vector.</div><div style="margin: 0px; line-height: normal;" class="">          <span style="color: #4f8187" class="">SDValue</span> BuildVec = DAG.getBuildVector(ExtractVT, SDLoc(N),</div><div style="margin: 0px; line-height: normal;" class="">                                            makeArrayRef(V->op_begin() + IdxVal,</div><div style="margin: 0px; line-height: normal;" class="">                                                         NumElems));</div></div></div><div class=""><br class=""></div><div class="">Note how we peak through a bitcast, but then use the original type for much of these calculations. So if the element size changed, we break (in this case, a bitcast from v2f32 to v4f16).</div><div class=""><br class=""></div><div class="">—escha</div><div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Aug 28, 2017, at 8:28 AM, Craig Topper via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="">Author: ctopper<br class="">Date: Mon Aug 28 08:28:33 2017<br class="">New Revision: 311892<br class=""><br class="">URL: <a href="http://llvm.org/viewvc/llvm-project?rev=311892&view=rev" class="">http://llvm.org/viewvc/llvm-project?rev=311892&view=rev</a><br class="">Log:<br class="">[DAGCombiner] Teach visitEXTRACT_SUBVECTOR to turn extracts of BUILD_VECTOR into smaller BUILD_VECTORs<br class=""><br class="">Only do this before operations are legalized of BUILD_VECTOR is Legal for the target.<br class=""><br class="">Differential Revision: <a href="https://reviews.llvm.org/D37186" class="">https://reviews.llvm.org/D37186</a><br class=""><br class="">Modified:<br class="">    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br class="">    llvm/trunk/test/CodeGen/X86/fold-vector-sext-zext.ll<br class="">    llvm/trunk/test/CodeGen/X86/widen_extract-1.ll<br class=""><br class="">Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=311892&r1=311891&r2=311892&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=311892&r1=311891&r2=311892&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)<br class="">+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Aug 28 08:28:33 2017<br class="">@@ -15157,6 +15157,29 @@ SDValue DAGCombiner::visitEXTRACT_SUBVEC<br class="">   // Skip bitcasting<br class="">   V = peekThroughBitcast(V);<br class=""><br class="">+  // If the input is a build vector. Try to make a smaller build vector.<br class="">+  if (V->getOpcode() == ISD::BUILD_VECTOR) {<br class="">+    if (auto *Idx = dyn_cast<ConstantSDNode>(N->getOperand(1))) {<br class="">+      EVT InVT = V->getValueType(0);<br class="">+      unsigned NumElems = NVT.getSizeInBits() / InVT.getScalarSizeInBits();<br class="">+      if (NumElems > 0) {<br class="">+        EVT ExtractVT = EVT::getVectorVT(*DAG.getContext(),<br class="">+                                         InVT.getVectorElementType(), NumElems);<br class="">+        if (!LegalOperations ||<br class="">+            TLI.isOperationLegal(ISD::BUILD_VECTOR, ExtractVT)) {<br class="">+          unsigned IdxVal = Idx->getZExtValue() * NVT.getScalarSizeInBits() /<br class="">+                            InVT.getScalarSizeInBits();<br class="">+<br class="">+          // Extract the pieces from the original build_vector.<br class="">+          SDValue BuildVec = DAG.getBuildVector(ExtractVT, SDLoc(N),<br class="">+                                            makeArrayRef(V->op_begin() + IdxVal,<br class="">+                                                         NumElems));<br class="">+          return DAG.getBitcast(NVT, BuildVec);<br class="">+        }<br class="">+      }<br class="">+    }<br class="">+  }<br class="">+<br class="">   if (V->getOpcode() == ISD::INSERT_SUBVECTOR) {<br class="">     // Handle only simple case where vector being inserted and vector<br class="">     // being extracted are of same size.<br class=""><br class="">Modified: llvm/trunk/test/CodeGen/X86/fold-vector-sext-zext.ll<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-vector-sext-zext.ll?rev=311892&r1=311891&r2=311892&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-vector-sext-zext.ll?rev=311892&r1=311891&r2=311892&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/X86/fold-vector-sext-zext.ll (original)<br class="">+++ llvm/trunk/test/CodeGen/X86/fold-vector-sext-zext.ll Mon Aug 28 08:28:33 2017<br class="">@@ -83,8 +83,7 @@ define <4 x i32> @test_sext_4i8_4i32_und<br class=""> define <4 x i64> @test_sext_4i8_4i64() {<br class=""> ; X32-LABEL: test_sext_4i8_4i64:<br class=""> ; X32:       # BB#0:<br class="">-; X32-NEXT:    vmovaps {{.*#+}} xmm0 = [0,0,4294967295,4294967295]<br class="">-; X32-NEXT:    vinsertf128 $1, {{\.LCPI.*}}, %ymm0, %ymm0<br class="">+; X32-NEXT:    vmovaps {{.*#+}} ymm0 = [0,0,4294967295,4294967295,2,0,4294967293,4294967295]<br class=""> ; X32-NEXT:    retl<br class=""> ;<br class=""> ; X64-LABEL: test_sext_4i8_4i64:<br class="">@@ -102,8 +101,7 @@ define <4 x i64> @test_sext_4i8_4i64() {<br class=""> define <4 x i64> @test_sext_4i8_4i64_undef() {<br class=""> ; X32-LABEL: test_sext_4i8_4i64_undef:<br class=""> ; X32:       # BB#0:<br class="">-; X32-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0<br class="">-; X32-NEXT:    vinsertf128 $1, {{\.LCPI.*}}, %ymm0, %ymm0<br class="">+; X32-NEXT:    vmovaps {{.*#+}} ymm0 = <u,u,4294967295,4294967295,u,u,4294967293,4294967295><br class=""> ; X32-NEXT:    retl<br class=""> ;<br class=""> ; X64-LABEL: test_sext_4i8_4i64_undef:<br class="">@@ -245,8 +243,7 @@ define <4 x i32> @test_zext_4i8_4i32() {<br class=""> define <4 x i64> @test_zext_4i8_4i64() {<br class=""> ; X32-LABEL: test_zext_4i8_4i64:<br class=""> ; X32:       # BB#0:<br class="">-; X32-NEXT:    vmovaps {{.*#+}} xmm0 = [0,0,255,0]<br class="">-; X32-NEXT:    vinsertf128 $1, {{\.LCPI.*}}, %ymm0, %ymm0<br class="">+; X32-NEXT:    vmovaps {{.*#+}} ymm0 = [0,0,255,0,2,0,253,0]<br class=""> ; X32-NEXT:    retl<br class=""> ;<br class=""> ; X64-LABEL: test_zext_4i8_4i64:<br class="">@@ -300,10 +297,7 @@ define <4 x i32> @test_zext_4i8_4i32_und<br class=""> define <4 x i64> @test_zext_4i8_4i64_undef() {<br class=""> ; X32-LABEL: test_zext_4i8_4i64_undef:<br class=""> ; X32:       # BB#0:<br class="">-; X32-NEXT:    vmovaps {{.*#+}} xmm0 = <u,u,255,0><br class="">-; X32-NEXT:    movl $2, %eax<br class="">-; X32-NEXT:    vmovd %eax, %xmm1<br class="">-; X32-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0<br class="">+; X32-NEXT:    vmovaps {{.*#+}} ymm0 = <u,u,255,0,2,0,u,u><br class=""> ; X32-NEXT:    retl<br class=""> ;<br class=""> ; X64-LABEL: test_zext_4i8_4i64_undef:<br class=""><br class="">Modified: llvm/trunk/test/CodeGen/X86/widen_extract-1.ll<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_extract-1.ll?rev=311892&r1=311891&r2=311892&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/widen_extract-1.ll?rev=311892&r1=311891&r2=311892&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/X86/widen_extract-1.ll (original)<br class="">+++ llvm/trunk/test/CodeGen/X86/widen_extract-1.ll Mon Aug 28 08:28:33 2017<br class="">@@ -7,8 +7,8 @@<br class=""> define void @convert(<2 x double>* %dst.addr, <3 x double> %src)  {<br class=""> ; X32-LABEL: convert:<br class=""> ; X32:       # BB#0: # %entry<br class="">-; X32-NEXT:    movups {{[0-9]+}}(%esp), %xmm0<br class=""> ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax<br class="">+; X32-NEXT:    movups {{[0-9]+}}(%esp), %xmm0<br class=""> ; X32-NEXT:    movaps %xmm0, (%eax)<br class=""> ; X32-NEXT:    retl<br class=""> ;<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits<br class=""></div></div></blockquote></div><br class=""></div></body></html>