<div dir="ltr">Hi Jessica,<div><br></div><div>It looks like this test fails on our expensive checks bot because of "<span style="color:rgb(51,51,51);font-size:13px;white-space:pre-wrap">3 machine code errors":</span> <a href="http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-expensive/7496/testReport/junit/LLVM/CodeGen_AArch64/machine_outliner_mir/">http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-expensive/7496/testReport/junit/LLVM/CodeGen_AArch64/machine_outliner_mir/</a> . Can you please take a look?</div><div><br></div><div>Cheers,</div><div>Alex</div></div><div class="gmail_extra"><br><div class="gmail_quote">On 8 August 2017 at 22:51, Jessica Paquette via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: paquette<br>
Date: Tue Aug 8 14:51:26 2017<br>
New Revision: 310422<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=310422&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project?rev=310422&view=rev</a><br>
Log:<br>
[MachineOutliner] Ensure AArch64 outliner doesn't mess with W30 or LR<br>
<br>
Before, the outliner would mark all instructions that read from/modify LR as<br>
illegal. This doesn't handle W30, which overlaps with LR. This shouldn't be<br>
outlined.<br>
<br>
This commit fixes that by making modifiesRegister() and readsRegister() look at<br>
W30 + take in a TRI argument. This makes sure that modifiesRegister() and<br>
readsRegister() won't outline either of W30 and LR.<br>
<br>
<a href="https://reviews.llvm.org/D36435" rel="noreferrer" target="_blank">https://reviews.llvm.org/<wbr>D36435</a><br>
<br>
<br>
Added:<br>
llvm/trunk/test/CodeGen/<wbr>AArch64/machine-outliner.mir<br>
Modified:<br>
llvm/trunk/lib/Target/AArch64/<wbr>AArch64InstrInfo.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/<wbr>AArch64InstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=310422&r1=310421&r2=310422&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>AArch64/AArch64InstrInfo.cpp?<wbr>rev=310422&r1=310421&r2=<wbr>310422&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AArch64/<wbr>AArch64InstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/<wbr>AArch64InstrInfo.cpp Tue Aug 8 14:51:26 2017<br>
@@ -4495,16 +4495,17 @@ AArch64InstrInfo::<wbr>getOutliningType(Machi<br>
if (MI.isPosition())<br>
return MachineOutlinerInstrType::<wbr>Illegal;<br>
<br>
+ // Don't touch the link register or W30.<br>
+ if (MI.readsRegister(AArch64::<wbr>W30, &getRegisterInfo()) ||<br>
+ MI.modifiesRegister(AArch64::<wbr>W30, &getRegisterInfo()))<br>
+ return MachineOutlinerInstrType::<wbr>Illegal;<br>
+<br>
// Make sure none of the operands are un-outlinable.<br>
- for (const MachineOperand &MOP : MI.operands())<br>
+ for (const MachineOperand &MOP : MI.operands()) {<br>
if (MOP.isCPI() || MOP.isJTI() || MOP.isCFIIndex() || MOP.isFI() ||<br>
MOP.isTargetIndex())<br>
return MachineOutlinerInstrType::<wbr>Illegal;<br>
-<br>
- // Don't outline anything that uses the link register.<br>
- if (MI.modifiesRegister(AArch64::<wbr>LR, &RI) ||<br>
- MI.readsRegister(AArch64::LR, &RI))<br>
- return MachineOutlinerInstrType::<wbr>Illegal;<br>
+ }<br>
<br>
// Does this use the stack?<br>
if (MI.modifiesRegister(AArch64::<wbr>SP, &RI) ||<br>
<br>
Added: llvm/trunk/test/CodeGen/<wbr>AArch64/machine-outliner.mir<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/machine-outliner.mir?rev=310422&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>CodeGen/AArch64/machine-<wbr>outliner.mir?rev=310422&view=<wbr>auto</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/<wbr>AArch64/machine-outliner.mir (added)<br>
+++ llvm/trunk/test/CodeGen/<wbr>AArch64/machine-outliner.mir Tue Aug 8 14:51:26 2017<br>
@@ -0,0 +1,81 @@<br>
+# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner %s -o - | FileCheck %s<br>
+--- |<br>
+ target triple = "aarch64---"<br>
+<br>
+ define i32 @main() #0 {<br>
+ entry:<br>
+ ret i32 0<br>
+ }<br>
+<br>
+ attributes #0 = { noinline noredzone nounwind optnone ssp uwtable }<br>
+<br>
+# CHECK-LABEL: @OUTLINED_FUNCTION_0<br>
+<br>
+...<br>
+---<br>
+# This test ensures that we<br>
+# - Create outlined functions<br>
+# - Don't outline anything to do with LR or W30<br>
+#<br>
+# CHECK-LABEL: name: main<br>
+# CHECK: BL @OUTLINED_FUNCTION_0<br>
+# CHECK: STRHHroW %w16, %x9, %w30, 1, 1<br>
+# CHECK: %lr = ORRXri %xzr, 1<br>
+# CHECK: BL @OUTLINED_FUNCTION_0<br>
+# CHECK: STRHHroW %w16, %x9, %w30, 1, 1<br>
+# CHECK: %lr = ORRXri %xzr, 1<br>
+# CHECK: BL @OUTLINED_FUNCTION_0<br>
+# CHECK: STRHHroW %w16, %x9, %w30, 1, 1<br>
+# CHECK: %lr = ORRXri %xzr, 1<br>
+name: main<br>
+alignment: 2<br>
+tracksRegLiveness: true<br>
+frameInfo:<br>
+ stackSize: 16<br>
+ maxAlignment: 4<br>
+ maxCallFrameSize: 0<br>
+<br>
+body: |<br>
+ bb.0.entry:<br>
+ %sp = frame-setup SUBXri %sp, 16, 0<br>
+ %x9 = ORRXri %xzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w30 = ORRWri %wzr, 1<br>
+ %lr = ORRXri %xzr, 1<br>
+<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ STRHHroW %w16, %x9, %w30, 1, 1<br>
+ %lr = ORRXri %xzr, 1<br>
+<br>
+ %w3 = ORRWri %wzr, 1993<br>
+<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ STRHHroW %w16, %x9, %w30, 1, 1<br>
+ %lr = ORRXri %xzr, 1<br>
+<br>
+ %w4 = ORRWri %wzr, 1994<br>
+<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ %w16 = ORRWri %wzr, 1<br>
+ STRHHroW %w16, %x9, %w30, 1, 1<br>
+ %lr = ORRXri %xzr, 1<br>
+<br>
+ %w5 = ORRWri %wzr, 1995<br>
+<br>
+ %sp = ADDXri %sp, 16, 0<br>
+ RET undef %lr<br>
+<br>
\ No newline at end of file<br>
<br>
<br>
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</blockquote></div><br></div>