<div dir="ltr">This broke the WebAssembly target. Could you build that if you make similar changes going forward? I have hopefully fixed it in r309922, could you double-check I did the right thing?<div><br></div><div>Cheers,<br>Daniel</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Aug 3, 2017 at 4:16 AM, Rafael Espindola via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: rafael<br>
Date: Wed Aug 2 19:16:21 2017<br>
New Revision: 309911<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=309911&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project?rev=309911&view=rev</a><br>
Log:<br>
Delete Default and JITDefault code models<br>
<br>
IMHO it is an antipattern to have a enum value that is Default.<br>
<br>
At any given piece of code it is not clear if we have to handle<br>
Default or if has already been mapped to a concrete value. In this<br>
case in particular, only the target can do the mapping and it is nice<br>
to make sure it is always done.<br>
<br>
This deletes the two default enum values of CodeModel and uses an<br>
explicit Optional<CodeModel> when it is possible that it is<br>
unspecified.<br>
<br>
Modified:<br>
llvm/trunk/include/llvm/<wbr>CodeGen/CommandFlags.h<br>
llvm/trunk/include/llvm/<wbr>ExecutionEngine/<wbr>ExecutionEngine.h<br>
llvm/trunk/include/llvm/LTO/<wbr>Config.h<br>
llvm/trunk/include/llvm/<wbr>Support/CodeGen.h<br>
llvm/trunk/include/llvm/<wbr>Support/CodeGenCWrappers.h<br>
llvm/trunk/include/llvm/<wbr>Support/TargetRegistry.h<br>
llvm/trunk/include/llvm/<wbr>Target/TargetMachine.h<br>
llvm/trunk/lib/CodeGen/<wbr>LLVMTargetMachine.cpp<br>
llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngine.cpp<br>
llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngineBindings.cpp<br>
llvm/trunk/lib/<wbr>ExecutionEngine/TargetSelect.<wbr>cpp<br>
llvm/trunk/lib/LTO/LTO.cpp<br>
llvm/trunk/lib/LTO/<wbr>LTOCodeGenerator.cpp<br>
llvm/trunk/lib/LTO/<wbr>ThinLTOCodeGenerator.cpp<br>
llvm/trunk/lib/Target/AArch64/<wbr>AArch64TargetMachine.cpp<br>
llvm/trunk/lib/Target/AArch64/<wbr>AArch64TargetMachine.h<br>
llvm/trunk/lib/Target/AArch64/<wbr>MCTargetDesc/<wbr>AArch64MCTargetDesc.cpp<br>
llvm/trunk/lib/Target/AMDGPU/<wbr>AMDGPUTargetMachine.cpp<br>
llvm/trunk/lib/Target/AMDGPU/<wbr>AMDGPUTargetMachine.h<br>
llvm/trunk/lib/Target/ARM/<wbr>ARMFrameLowering.cpp<br>
llvm/trunk/lib/Target/ARM/<wbr>ARMISelLowering.cpp<br>
llvm/trunk/lib/Target/ARM/<wbr>ARMTargetMachine.cpp<br>
llvm/trunk/lib/Target/ARM/<wbr>ARMTargetMachine.h<br>
llvm/trunk/lib/Target/BPF/<wbr>BPFTargetMachine.cpp<br>
llvm/trunk/lib/Target/BPF/<wbr>BPFTargetMachine.h<br>
llvm/trunk/lib/Target/Hexagon/<wbr>HexagonTargetMachine.cpp<br>
llvm/trunk/lib/Target/Hexagon/<wbr>HexagonTargetMachine.h<br>
llvm/trunk/lib/Target/Lanai/<wbr>LanaiTargetMachine.cpp<br>
llvm/trunk/lib/Target/Lanai/<wbr>LanaiTargetMachine.h<br>
llvm/trunk/lib/Target/MSP430/<wbr>MSP430TargetMachine.cpp<br>
llvm/trunk/lib/Target/MSP430/<wbr>MSP430TargetMachine.h<br>
llvm/trunk/lib/Target/Mips/<wbr>MipsTargetMachine.cpp<br>
llvm/trunk/lib/Target/Mips/<wbr>MipsTargetMachine.h<br>
llvm/trunk/lib/Target/NVPTX/<wbr>NVPTXTargetMachine.cpp<br>
llvm/trunk/lib/Target/NVPTX/<wbr>NVPTXTargetMachine.h<br>
llvm/trunk/lib/Target/PowerPC/<wbr>MCTargetDesc/PPCMCTargetDesc.<wbr>cpp<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPCFastISel.cpp<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPCISelLowering.cpp<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPCTargetMachine.cpp<br>
llvm/trunk/lib/Target/PowerPC/<wbr>PPCTargetMachine.h<br>
llvm/trunk/lib/Target/RISCV/<wbr>RISCVTargetMachine.cpp<br>
llvm/trunk/lib/Target/RISCV/<wbr>RISCVTargetMachine.h<br>
llvm/trunk/lib/Target/Sparc/<wbr>MCTargetDesc/<wbr>SparcMCTargetDesc.cpp<br>
llvm/trunk/lib/Target/Sparc/<wbr>SparcTargetMachine.cpp<br>
llvm/trunk/lib/Target/Sparc/<wbr>SparcTargetMachine.h<br>
llvm/trunk/lib/Target/SystemZ/<wbr>MCTargetDesc/<wbr>SystemZMCTargetDesc.cpp<br>
llvm/trunk/lib/Target/SystemZ/<wbr>SystemZTargetMachine.cpp<br>
llvm/trunk/lib/Target/SystemZ/<wbr>SystemZTargetMachine.h<br>
llvm/trunk/lib/Target/<wbr>TargetMachineC.cpp<br>
llvm/trunk/lib/Target/X86/<wbr>MCTargetDesc/X86MCTargetDesc.<wbr>cpp<br>
llvm/trunk/lib/Target/X86/<wbr>X86TargetMachine.cpp<br>
llvm/trunk/lib/Target/X86/<wbr>X86TargetMachine.h<br>
llvm/trunk/lib/Target/XCore/<wbr>MCTargetDesc/<wbr>XCoreMCTargetDesc.cpp<br>
llvm/trunk/lib/Target/XCore/<wbr>XCoreTargetMachine.cpp<br>
llvm/trunk/lib/Target/XCore/<wbr>XCoreTargetMachine.h<br>
llvm/trunk/test/CodeGen/ARM/<wbr>legalize-unaligned-load.ll<br>
llvm/trunk/test/CodeGen/XCore/<wbr>codemodel.ll<br>
llvm/trunk/tools/llc/llc.cpp<br>
llvm/trunk/tools/lli/lli.cpp<br>
llvm/trunk/tools/llvm-lto2/<wbr>llvm-lto2.cpp<br>
llvm/trunk/tools/opt/opt.cpp<br>
llvm/trunk/unittests/<wbr>ExecutionEngine/MCJIT/<wbr>MCJITTestBase.h<br>
llvm/trunk/unittests/MI/<wbr>LiveIntervalTest.cpp<br>
llvm/trunk/unittests/Target/<wbr>AArch64/InstSizes.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/<wbr>CodeGen/CommandFlags.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/CommandFlags.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/include/<wbr>llvm/CodeGen/CommandFlags.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/include/llvm/<wbr>CodeGen/CommandFlags.h (original)<br>
+++ llvm/trunk/include/llvm/<wbr>CodeGen/CommandFlags.h Wed Aug 2 19:16:21 2017<br>
@@ -77,20 +77,20 @@ TMModel("thread-model",<br>
clEnumValN(ThreadModel::<wbr>Single, "single",<br>
"Single thread model")));<br>
<br>
-cl::opt<llvm::CodeModel::<wbr>Model><br>
-CMModel("code-model",<br>
- cl::desc("Choose code model"),<br>
- cl::init(CodeModel::Default),<br>
- cl::values(clEnumValN(<wbr>CodeModel::Default, "default",<br>
- "Target default code model"),<br>
- clEnumValN(CodeModel::Small, "small",<br>
- "Small code model"),<br>
- clEnumValN(CodeModel::Kernel, "kernel",<br>
- "Kernel code model"),<br>
- clEnumValN(CodeModel::Medium, "medium",<br>
- "Medium code model"),<br>
- clEnumValN(CodeModel::Large, "large",<br>
- "Large code model")));<br>
+cl::opt<llvm::CodeModel::<wbr>Model> CMModel(<br>
+ "code-model", cl::desc("Choose code model"),<br>
+ cl::values(clEnumValN(<wbr>CodeModel::Small, "small", "Small code model"),<br>
+ clEnumValN(CodeModel::Kernel, "kernel", "Kernel code model"),<br>
+ clEnumValN(CodeModel::Medium, "medium", "Medium code model"),<br>
+ clEnumValN(CodeModel::Large, "large", "Large code model")));<br>
+<br>
+static inline Optional<CodeModel::Model> getCodeModel() {<br>
+ if (CMModel.getNumOccurrences()) {<br>
+ CodeModel::Model M = CMModel;<br>
+ return M;<br>
+ }<br>
+ return None;<br>
+}<br>
<br>
cl::opt<llvm::<wbr>ExceptionHandling><br>
ExceptionModel("exception-<wbr>model",<br>
<br>
Modified: llvm/trunk/include/llvm/<wbr>ExecutionEngine/<wbr>ExecutionEngine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ExecutionEngine/ExecutionEngine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/include/<wbr>llvm/ExecutionEngine/<wbr>ExecutionEngine.h?rev=309911&<wbr>r1=309910&r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/include/llvm/<wbr>ExecutionEngine/<wbr>ExecutionEngine.h (original)<br>
+++ llvm/trunk/include/llvm/<wbr>ExecutionEngine/<wbr>ExecutionEngine.h Wed Aug 2 19:16:21 2017<br>
@@ -535,7 +535,7 @@ private:<br>
std::shared_ptr<<wbr>JITSymbolResolver> Resolver;<br>
TargetOptions Options;<br>
Optional<Reloc::Model> RelocModel;<br>
- CodeModel::Model CMModel;<br>
+ Optional<CodeModel::Model> CMModel;<br>
std::string MArch;<br>
std::string MCPU;<br>
SmallVector<std::string, 4> MAttrs;<br>
<br>
Modified: llvm/trunk/include/llvm/LTO/<wbr>Config.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/LTO/Config.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/include/<wbr>llvm/LTO/Config.h?rev=309911&<wbr>r1=309910&r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/include/llvm/LTO/<wbr>Config.h (original)<br>
+++ llvm/trunk/include/llvm/LTO/<wbr>Config.h Wed Aug 2 19:16:21 2017<br>
@@ -40,7 +40,7 @@ struct Config {<br>
TargetOptions Options;<br>
std::vector<std::string> MAttrs;<br>
Optional<Reloc::Model> RelocModel = Reloc::PIC_;<br>
- CodeModel::Model CodeModel = CodeModel::Default;<br>
+ Optional<CodeModel::Model> CodeModel = None;<br>
CodeGenOpt::Level CGOptLevel = CodeGenOpt::Default;<br>
TargetMachine::CodeGenFileType CGFileType = TargetMachine::CGFT_<wbr>ObjectFile;<br>
unsigned OptLevel = 2;<br>
<br>
Modified: llvm/trunk/include/llvm/<wbr>Support/CodeGen.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CodeGen.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/include/<wbr>llvm/Support/CodeGen.h?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/include/llvm/<wbr>Support/CodeGen.h (original)<br>
+++ llvm/trunk/include/llvm/<wbr>Support/CodeGen.h Wed Aug 2 19:16:21 2017<br>
@@ -25,7 +25,7 @@ namespace llvm {<br>
// Code model types.<br>
namespace CodeModel {<br>
// Sync changes with CodeGenCWrappers.h.<br>
- enum Model { Default, JITDefault, Small, Kernel, Medium, Large };<br>
+ enum Model { Small, Kernel, Medium, Large };<br>
}<br>
<br>
namespace PICLevel {<br>
<br>
Modified: llvm/trunk/include/llvm/<wbr>Support/CodeGenCWrappers.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/CodeGenCWrappers.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/include/<wbr>llvm/Support/CodeGenCWrappers.<wbr>h?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/include/llvm/<wbr>Support/CodeGenCWrappers.h (original)<br>
+++ llvm/trunk/include/llvm/<wbr>Support/CodeGenCWrappers.h Wed Aug 2 19:16:21 2017<br>
@@ -22,12 +22,13 @@<br>
<br>
namespace llvm {<br>
<br>
-inline CodeModel::Model unwrap(LLVMCodeModel Model) {<br>
+inline Optional<CodeModel::Model> unwrap(LLVMCodeModel Model, bool &JIT) {<br>
+ JIT = false;<br>
switch (Model) {<br>
- case LLVMCodeModelDefault:<br>
- return CodeModel::Default;<br>
case LLVMCodeModelJITDefault:<br>
- return CodeModel::JITDefault;<br>
+ JIT = true;<br>
+ case LLVMCodeModelDefault:<br>
+ return None;<br>
case LLVMCodeModelSmall:<br>
return CodeModel::Small;<br>
case LLVMCodeModelKernel:<br>
@@ -37,15 +38,11 @@ inline CodeModel::Model unwrap(LLVMCodeM<br>
case LLVMCodeModelLarge:<br>
return CodeModel::Large;<br>
}<br>
- return CodeModel::Default;<br>
+ return CodeModel::Small;<br>
}<br>
<br>
inline LLVMCodeModel wrap(CodeModel::Model Model) {<br>
switch (Model) {<br>
- case CodeModel::Default:<br>
- return LLVMCodeModelDefault;<br>
- case CodeModel::JITDefault:<br>
- return LLVMCodeModelJITDefault;<br>
case CodeModel::Small:<br>
return LLVMCodeModelSmall;<br>
case CodeModel::Kernel:<br>
<br>
Modified: llvm/trunk/include/llvm/<wbr>Support/TargetRegistry.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetRegistry.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/include/<wbr>llvm/Support/TargetRegistry.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/include/llvm/<wbr>Support/TargetRegistry.h (original)<br>
+++ llvm/trunk/include/llvm/<wbr>Support/TargetRegistry.h Wed Aug 2 19:16:21 2017<br>
@@ -101,19 +101,16 @@ public:<br>
<br>
using MCAsmInfoCtorFnTy = MCAsmInfo *(*)(const MCRegisterInfo &MRI,<br>
const Triple &TT);<br>
- using MCAdjustCodeGenOptsFnTy = void (*)(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM);<br>
-<br>
using MCInstrInfoCtorFnTy = MCInstrInfo *(*)();<br>
using MCInstrAnalysisCtorFnTy = MCInstrAnalysis *(*)(const MCInstrInfo *Info);<br>
using MCRegInfoCtorFnTy = MCRegisterInfo *(*)(const Triple &TT);<br>
using MCSubtargetInfoCtorFnTy = MCSubtargetInfo *(*)(const Triple &TT,<br>
StringRef CPU,<br>
StringRef Features);<br>
- using TargetMachineCtorTy = TargetMachine *(*)(<br>
- const Target &T, const Triple &TT, StringRef CPU, StringRef Features,<br>
- const TargetOptions &Options, Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL);<br>
+ using TargetMachineCtorTy = TargetMachine<br>
+ *(*)(const Target &T, const Triple &TT, StringRef CPU, StringRef Features,<br>
+ const TargetOptions &Options, Optional<Reloc::Model> RM,<br>
+ Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT);<br>
// If it weren't for layering issues (this header is in llvm/Support, but<br>
// depends on MC?) this should take the Streamer by value rather than rvalue<br>
// reference.<br>
@@ -191,8 +188,6 @@ private:<br>
/// registered.<br>
MCAsmInfoCtorFnTy MCAsmInfoCtorFn;<br>
<br>
- MCAdjustCodeGenOptsFnTy MCAdjustCodeGenOptsFn;<br>
-<br>
/// MCInstrInfoCtorFn - Constructor function for this target's MCInstrInfo,<br>
/// if registered.<br>
MCInstrInfoCtorFnTy MCInstrInfoCtorFn;<br>
@@ -312,12 +307,6 @@ public:<br>
return MCAsmInfoCtorFn(MRI, Triple(TheTriple));<br>
}<br>
<br>
- void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM) const {<br>
- if (MCAdjustCodeGenOptsFn)<br>
- MCAdjustCodeGenOptsFn(TT, RM, CM);<br>
- }<br>
-<br>
/// createMCInstrInfo - Create a MCInstrInfo implementation.<br>
///<br>
MCInstrInfo *createMCInstrInfo() const {<br>
@@ -365,15 +354,17 @@ public:<br>
/// feature set; it should always be provided. Generally this should be<br>
/// either the target triple from the module, or the target triple of the<br>
/// host if that does not exist.<br>
- TargetMachine *<br>
- createTargetMachine(StringRef TT, StringRef CPU, StringRef Features,<br>
- const TargetOptions &Options, Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM = CodeModel::Default,<br>
- CodeGenOpt::Level OL = CodeGenOpt::Default) const {<br>
+ TargetMachine *createTargetMachine(StringRef TT, StringRef CPU,<br>
+ StringRef Features,<br>
+ const TargetOptions &Options,<br>
+ Optional<Reloc::Model> RM,<br>
+ Optional<CodeModel::Model> CM = None,<br>
+ CodeGenOpt::Level OL = CodeGenOpt::Default,<br>
+ bool JIT = false) const {<br>
if (!TargetMachineCtorFn)<br>
return nullptr;<br>
return TargetMachineCtorFn(*this, Triple(TT), CPU, Features, Options, RM,<br>
- CM, OL);<br>
+ CM, OL, JIT);<br>
}<br>
<br>
/// createMCAsmBackend - Create a target specific assembly parser.<br>
@@ -663,11 +654,6 @@ struct TargetRegistry {<br>
T.MCAsmInfoCtorFn = Fn;<br>
}<br>
<br>
- static void registerMCAdjustCodeGenOpts(<wbr>Target &T,<br>
- Target::<wbr>MCAdjustCodeGenOptsFnTy Fn) {<br>
- T.MCAdjustCodeGenOptsFn = Fn;<br>
- }<br>
-<br>
/// RegisterMCInstrInfo - Register a MCInstrInfo implementation for the<br>
/// given target.<br>
///<br>
@@ -929,12 +915,6 @@ struct RegisterMCAsmInfoFn {<br>
}<br>
};<br>
<br>
-struct RegisterMCAdjustCodeGenOptsFn {<br>
- RegisterMCAdjustCodeGenOptsFn(<wbr>Target &T, Target::<wbr>MCAdjustCodeGenOptsFnTy Fn) {<br>
- TargetRegistry::<wbr>registerMCAdjustCodeGenOpts(T, Fn);<br>
- }<br>
-};<br>
-<br>
/// RegisterMCInstrInfo - Helper template for registering a target instruction<br>
/// info implementation. This invokes the static "Create" method on the class<br>
/// to actually do the construction. Usage:<br>
@@ -1080,12 +1060,11 @@ template <class TargetMachineImpl> struc<br>
}<br>
<br>
private:<br>
- static TargetMachine *Allocator(const Target &T, const Triple &TT,<br>
- StringRef CPU, StringRef FS,<br>
- const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL) {<br>
- return new TargetMachineImpl(T, TT, CPU, FS, Options, RM, CM, OL);<br>
+ static TargetMachine *<br>
+ Allocator(const Target &T, const Triple &TT, StringRef CPU, StringRef FS,<br>
+ const TargetOptions &Options, Optional<Reloc::Model> RM,<br>
+ Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) {<br>
+ return new TargetMachineImpl(T, TT, CPU, FS, Options, RM, CM, OL, JIT);<br>
}<br>
};<br>
<br>
<br>
Modified: llvm/trunk/include/llvm/<wbr>Target/TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/include/<wbr>llvm/Target/TargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/include/llvm/<wbr>Target/TargetMachine.h (original)<br>
+++ llvm/trunk/include/llvm/<wbr>Target/TargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -78,7 +78,7 @@ protected: // Can only create subclasses<br>
std::string TargetFS;<br>
<br>
Reloc::Model RM = Reloc::Static;<br>
- CodeModel::Model CMModel = CodeModel::Default;<br>
+ CodeModel::Model CMModel = CodeModel::Small;<br>
CodeGenOpt::Level OptLevel = CodeGenOpt::Default;<br>
<br>
/// Contains target specific asm information.<br>
<br>
Modified: llvm/trunk/lib/CodeGen/<wbr>LLVMTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/<wbr>CodeGen/LLVMTargetMachine.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/CodeGen/<wbr>LLVMTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/<wbr>LLVMTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -77,7 +77,6 @@ LLVMTargetMachine::<wbr>LLVMTargetMachine(con<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL)<br>
: TargetMachine(T, DataLayoutString, TT, CPU, FS, Options) {<br>
- T.adjustCodeGenOpts(TT, RM, CM);<br>
this->RM = RM;<br>
this->CMModel = CM;<br>
this->OptLevel = OL;<br>
<br>
Modified: llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngine.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngine.cpp (original)<br>
+++ llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -476,7 +476,7 @@ EngineBuilder::EngineBuilder() : EngineB<br>
EngineBuilder::EngineBuilder(<wbr>std::unique_ptr<Module> M)<br>
: M(std::move(M)), WhichEngine(EngineKind::<wbr>Either), ErrorStr(nullptr),<br>
OptLevel(CodeGenOpt::Default), MemMgr(nullptr), Resolver(nullptr),<br>
- CMModel(CodeModel::JITDefault)<wbr>, UseOrcMCJITReplacement(false) {<br>
+ UseOrcMCJITReplacement(false) {<br>
// IR module verification is enabled by default in debug builds, and disabled<br>
// by default in release builds.<br>
#ifndef NDEBUG<br>
<br>
Modified: llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngineBindings.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngineBindings.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngineBindings.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngineBindings.cpp (original)<br>
+++ llvm/trunk/lib/<wbr>ExecutionEngine/<wbr>ExecutionEngineBindings.cpp Wed Aug 2 19:16:21 2017<br>
@@ -198,8 +198,10 @@ LLVMBool LLVMCreateMCJITCompilerForModu<wbr>l<br>
builder.setEngineKind(<wbr>EngineKind::JIT)<br>
.setErrorStr(&Error)<br>
.setOptLevel((CodeGenOpt::<wbr>Level)options.OptLevel)<br>
- .setCodeModel(unwrap(options.<wbr>CodeModel))<br>
.setTargetOptions(<wbr>targetOptions);<br>
+ bool JIT;<br>
+ if (Optional<CodeModel::Model> CM = unwrap(options.CodeModel, JIT))<br>
+ builder.setCodeModel(*CM);<br>
if (options.MCJMM)<br>
builder.setMCJITMemoryManager(<br>
std::unique_ptr<<wbr>RTDyldMemoryManager>(unwrap(<wbr>options.MCJMM)));<br>
<br>
Modified: llvm/trunk/lib/<wbr>ExecutionEngine/TargetSelect.<wbr>cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/TargetSelect.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/<wbr>ExecutionEngine/TargetSelect.<wbr>cpp?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/<wbr>ExecutionEngine/TargetSelect.<wbr>cpp (original)<br>
+++ llvm/trunk/lib/<wbr>ExecutionEngine/TargetSelect.<wbr>cpp Wed Aug 2 19:16:21 2017<br>
@@ -92,11 +92,10 @@ TargetMachine *EngineBuilder::selectTarg<br>
}<br>
<br>
// Allocate a target...<br>
- TargetMachine *Target = TheTarget-><wbr>createTargetMachine(TheTriple.<wbr>getTriple(),<br>
- MCPU, FeaturesStr,<br>
- Options,<br>
- RelocModel, CMModel,<br>
- OptLevel);<br>
+ TargetMachine *Target =<br>
+ TheTarget-><wbr>createTargetMachine(TheTriple.<wbr>getTriple(), MCPU, FeaturesStr,<br>
+ Options, RelocModel, CMModel, OptLevel,<br>
+ /*JIT*/ true);<br>
assert(Target && "Could not allocate target machine!");<br>
return Target;<br>
}<br>
<br>
Modified: llvm/trunk/lib/LTO/LTO.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/LTO/LTO.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/LTO/<wbr>LTO.cpp?rev=309911&r1=309910&<wbr>r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/LTO/LTO.cpp (original)<br>
+++ llvm/trunk/lib/LTO/LTO.cpp Wed Aug 2 19:16:21 2017<br>
@@ -118,7 +118,10 @@ static void computeCacheKey(<br>
AddUnsigned(*Conf.RelocModel);<br>
else<br>
AddUnsigned(-1);<br>
- AddUnsigned(Conf.CodeModel);<br>
+ if (Conf.CodeModel)<br>
+ AddUnsigned(*Conf.CodeModel);<br>
+ else<br>
+ AddUnsigned(-1);<br>
AddUnsigned(Conf.CGOptLevel);<br>
AddUnsigned(Conf.CGFileType);<br>
AddUnsigned(Conf.OptLevel);<br>
<br>
Modified: llvm/trunk/lib/LTO/<wbr>LTOCodeGenerator.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/LTO/LTOCodeGenerator.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/LTO/<wbr>LTOCodeGenerator.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/LTO/<wbr>LTOCodeGenerator.cpp (original)<br>
+++ llvm/trunk/lib/LTO/<wbr>LTOCodeGenerator.cpp Wed Aug 2 19:16:21 2017<br>
@@ -368,9 +368,8 @@ bool LTOCodeGenerator::<wbr>determineTarget()<br>
}<br>
<br>
std::unique_ptr<TargetMachine> LTOCodeGenerator::<wbr>createTargetMachine() {<br>
- return std::unique_ptr<TargetMachine><wbr>(<br>
- MArch->createTargetMachine(<wbr>TripleStr, MCpu, FeatureStr, Options,<br>
- RelocModel, CodeModel::Default, CGOptLevel));<br>
+ return std::unique_ptr<TargetMachine><wbr>(MArch->createTargetMachine(<br>
+ TripleStr, MCpu, FeatureStr, Options, RelocModel, None, CGOptLevel));<br>
}<br>
<br>
// If a linkonce global is present in the MustPreserveSymbols, we need to make<br>
<br>
Modified: llvm/trunk/lib/LTO/<wbr>ThinLTOCodeGenerator.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/LTO/ThinLTOCodeGenerator.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/LTO/<wbr>ThinLTOCodeGenerator.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/LTO/<wbr>ThinLTOCodeGenerator.cpp (original)<br>
+++ llvm/trunk/lib/LTO/<wbr>ThinLTOCodeGenerator.cpp Wed Aug 2 19:16:21 2017<br>
@@ -583,9 +583,9 @@ std::unique_ptr<TargetMachine> TargetMac<br>
Features.<wbr>getDefaultSubtargetFeatures(<wbr>TheTriple);<br>
std::string FeatureStr = Features.getString();<br>
<br>
- return std::unique_ptr<TargetMachine><wbr>(TheTarget-><wbr>createTargetMachine(<br>
- TheTriple.str(), MCpu, FeatureStr, Options, RelocModel,<br>
- CodeModel::Default, CGOptLevel));<br>
+ return std::unique_ptr<TargetMachine><wbr>(<br>
+ TheTarget-><wbr>createTargetMachine(TheTriple.<wbr>str(), MCpu, FeatureStr, Options,<br>
+ RelocModel, None, CGOptLevel));<br>
}<br>
<br>
/**<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/<wbr>AArch64TargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>AArch64/AArch64TargetMachine.<wbr>cpp?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AArch64/<wbr>AArch64TargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/<wbr>AArch64TargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -206,18 +206,42 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(const Triple &TT,<br>
+ Optional<CodeModel::Model> CM,<br>
+ bool JIT) {<br>
+ if (CM) {<br>
+ if (*CM != CodeModel::Small && *CM != CodeModel::Large) {<br>
+ if (!TT.isOSFuchsia())<br>
+ report_fatal_error(<br>
+ "Only small and large code models are allowed on AArch64");<br>
+ else if (CM != CodeModel::Kernel)<br>
+ report_fatal_error(<br>
+ "Only small, kernel, and large code models are allowed on AArch64");<br>
+ }<br>
+ return *CM;<br>
+ }<br>
+ // The default MCJIT memory managers make no guarantees about where they can<br>
+ // find an executable page; JITed code needs to be able to refer to globals<br>
+ // no matter how far away they are.<br>
+ if (JIT)<br>
+ return CodeModel::Large;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
/// Create an AArch64 architecture model.<br>
///<br>
-AArch64TargetMachine::<wbr>AArch64TargetMachine(<br>
- const Target &T, const Triple &TT, StringRef CPU, StringRef FS,<br>
- const TargetOptions &Options, Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL, bool LittleEndian)<br>
- : LLVMTargetMachine(T, computeDataLayout(TT, Options.MCOptions,<br>
- LittleEndian),<br>
- TT, CPU, FS, Options,<br>
- getEffectiveRelocModel(TT, RM), CM, OL),<br>
- TLOF(createTLOF(<wbr>getTargetTriple())),<br>
- isLittle(LittleEndian) {<br>
+AArch64TargetMachine::<wbr>AArch64TargetMachine(const Target &T, const Triple &TT,<br>
+ StringRef CPU, StringRef FS,<br>
+ const TargetOptions &Options,<br>
+ Optional<Reloc::Model> RM,<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT,<br>
+ bool LittleEndian)<br>
+ : LLVMTargetMachine(T,<br>
+ computeDataLayout(TT, Options.MCOptions, LittleEndian),<br>
+ TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM),<br>
+ getEffectiveCodeModel(TT, CM, JIT), OL),<br>
+ TLOF(createTLOF(<wbr>getTargetTriple())), isLittle(LittleEndian) {<br>
initAsmInfo();<br>
}<br>
<br>
@@ -252,16 +276,16 @@ void AArch64leTargetMachine::<wbr>anchor() {<br>
AArch64leTargetMachine::<wbr>AArch64leTargetMachine(<br>
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,<br>
const TargetOptions &Options, Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL)<br>
- : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}<br>
+ Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)<br>
+ : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}<br>
<br>
void AArch64beTargetMachine::<wbr>anchor() { }<br>
<br>
AArch64beTargetMachine::<wbr>AArch64beTargetMachine(<br>
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,<br>
const TargetOptions &Options, Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL)<br>
- : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}<br>
+ Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)<br>
+ : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}<br>
<br>
namespace {<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/<wbr>AArch64TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>AArch64/AArch64TargetMachine.<wbr>h?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AArch64/<wbr>AArch64TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/AArch64/<wbr>AArch64TargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -31,8 +31,8 @@ protected:<br>
public:<br>
AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL, bool IsLittleEndian);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT, bool IsLittleEndian);<br>
<br>
~AArch64TargetMachine() override;<br>
const AArch64Subtarget *getSubtargetImpl(const Function &F) const override;<br>
@@ -62,8 +62,9 @@ class AArch64leTargetMachine : public AA<br>
public:<br>
AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM,<br>
+ Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,<br>
+ bool JIT);<br>
};<br>
<br>
// AArch64 big endian target machine.<br>
@@ -73,8 +74,9 @@ class AArch64beTargetMachine : public AA<br>
public:<br>
AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM,<br>
+ Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,<br>
+ bool JIT);<br>
};<br>
<br>
} // end namespace llvm<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/<wbr>MCTargetDesc/<wbr>AArch64MCTargetDesc.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>AArch64/MCTargetDesc/<wbr>AArch64MCTargetDesc.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AArch64/<wbr>MCTargetDesc/<wbr>AArch64MCTargetDesc.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/<wbr>MCTargetDesc/<wbr>AArch64MCTargetDesc.cpp Wed Aug 2 19:16:21 2017<br>
@@ -84,28 +84,6 @@ static MCAsmInfo *createAArch64MCAsmInfo<br>
return MAI;<br>
}<br>
<br>
-static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM) {<br>
- assert((TT.isOSBinFormatELF() || TT.isOSBinFormatMachO() ||<br>
- TT.isOSBinFormatCOFF()) && "Invalid target");<br>
-<br>
- if (CM == CodeModel::Default)<br>
- CM = CodeModel::Small;<br>
- // The default MCJIT memory managers make no guarantees about where they can<br>
- // find an executable page; JITed code needs to be able to refer to globals<br>
- // no matter how far away they are.<br>
- else if (CM == CodeModel::JITDefault)<br>
- CM = CodeModel::Large;<br>
- else if (CM != CodeModel::Small && CM != CodeModel::Large) {<br>
- if (!TT.isOSFuchsia())<br>
- report_fatal_error(<br>
- "Only small and large code models are allowed on AArch64");<br>
- else if (CM != CodeModel::Kernel)<br>
- report_fatal_error(<br>
- "Only small, kernel, and large code models are allowed on AArch64");<br>
- }<br>
-}<br>
-<br>
static MCInstPrinter *createAArch64MCInstPrinter(<wbr>const Triple &T,<br>
unsigned SyntaxVariant,<br>
const MCAsmInfo &MAI,<br>
@@ -153,9 +131,6 @@ extern "C" void LLVMInitializeAArch64Tar<br>
// Register the MC asm info.<br>
RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);<br>
<br>
- // Register the MC codegen info.<br>
- TargetRegistry::<wbr>registerMCAdjustCodeGenOpts(*<wbr>T, adjustCodeGenOpts);<br>
-<br>
// Register the MC instruction info.<br>
TargetRegistry::<wbr>RegisterMCInstrInfo(*T, createAArch64MCInstrInfo);<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/<wbr>AMDGPUTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>AMDGPU/AMDGPUTargetMachine.<wbr>cpp?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/<wbr>AMDGPUTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/<wbr>AMDGPUTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -266,15 +266,22 @@ static Reloc::Model getEffectiveRelocMod<br>
return Reloc::PIC_;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
AMDGPUTargetMachine::<wbr>AMDGPUTargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
TargetOptions Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
+ Optional<CodeModel::Model> CM,<br>
CodeGenOpt::Level OptLevel)<br>
- : LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU),<br>
- FS, Options, getEffectiveRelocModel(RM), CM, OptLevel),<br>
- TLOF(createTLOF(<wbr>getTargetTriple())) {<br>
+ : LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU),<br>
+ FS, Options, getEffectiveRelocModel(RM),<br>
+ getEffectiveCodeModel(CM), OptLevel),<br>
+ TLOF(createTLOF(<wbr>getTargetTriple())) {<br>
AS = AMDGPU::getAMDGPUAS(TT);<br>
initAsmInfo();<br>
}<br>
@@ -378,8 +385,9 @@ R600TargetMachine::<wbr>R600TargetMachine(con<br>
StringRef CPU, StringRef FS,<br>
TargetOptions Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL)<br>
- : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {<br>
setRequiresStructuredCFG(true)<wbr>;<br>
}<br>
<br>
@@ -411,8 +419,9 @@ GCNTargetMachine::<wbr>GCNTargetMachine(const<br>
StringRef CPU, StringRef FS,<br>
TargetOptions Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL)<br>
- : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {}<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {}<br>
<br>
const SISubtarget *GCNTargetMachine::<wbr>getSubtargetImpl(const Function &F) const {<br>
StringRef GPU = getGPUName(F);<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/<wbr>AMDGPUTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>AMDGPU/AMDGPUTargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/AMDGPU/<wbr>AMDGPUTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/<wbr>AMDGPUTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -43,7 +43,7 @@ protected:<br>
public:<br>
AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, TargetOptions Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
CodeGenOpt::Level OL);<br>
~AMDGPUTargetMachine() override;<br>
<br>
@@ -85,8 +85,8 @@ private:<br>
public:<br>
R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, TargetOptions Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
<br>
TargetPassConfig *createPassConfig(<wbr>PassManagerBase &PM) override;<br>
<br>
@@ -108,8 +108,8 @@ private:<br>
public:<br>
GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, TargetOptions Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
<br>
TargetPassConfig *createPassConfig(<wbr>PassManagerBase &PM) override;<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/<wbr>ARMFrameLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>ARM/ARMFrameLowering.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/ARM/<wbr>ARMFrameLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/<wbr>ARMFrameLowering.cpp Wed Aug 2 19:16:21 2017<br>
@@ -512,7 +512,6 @@ void ARMFrameLowering::<wbr>emitPrologue(Mach<br>
switch (TM.getCodeModel()) {<br>
case CodeModel::Small:<br>
case CodeModel::Medium:<br>
- case CodeModel::Default:<br>
case CodeModel::Kernel:<br>
BuildMI(MBB, MBBI, dl, TII.get(ARM::tBL))<br>
.add(predOps(ARMCC::AL))<br>
@@ -521,7 +520,6 @@ void ARMFrameLowering::<wbr>emitPrologue(Mach<br>
.setMIFlags(MachineInstr::<wbr>FrameSetup);<br>
break;<br>
case CodeModel::Large:<br>
- case CodeModel::JITDefault:<br>
BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ARM::R12)<br>
.addExternalSymbol("__chkstk")<br>
.setMIFlags(MachineInstr::<wbr>FrameSetup);<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/<wbr>ARMISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>ARM/ARMISelLowering.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/ARM/<wbr>ARMISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/<wbr>ARMISelLowering.cpp Wed Aug 2 19:16:21 2017<br>
@@ -8783,7 +8783,6 @@ ARMTargetLowering::<wbr>EmitLowered__chkstk(M<br>
switch (TM.getCodeModel()) {<br>
case CodeModel::Small:<br>
case CodeModel::Medium:<br>
- case CodeModel::Default:<br>
case CodeModel::Kernel:<br>
BuildMI(*MBB, MI, DL, TII.get(ARM::tBL))<br>
.add(predOps(ARMCC::AL))<br>
@@ -8793,8 +8792,7 @@ ARMTargetLowering::<wbr>EmitLowered__chkstk(M<br>
.addReg(ARM::R12,<br>
RegState::Implicit | RegState::Define | RegState::Dead);<br>
break;<br>
- case CodeModel::Large:<br>
- case CodeModel::JITDefault: {<br>
+ case CodeModel::Large: {<br>
MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo()<wbr>;<br>
unsigned Reg = MRI.createVirtualRegister(&<wbr>ARM::rGPRRegClass);<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/<wbr>ARMTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>ARM/ARMTargetMachine.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/ARM/<wbr>ARMTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/<wbr>ARMTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -190,17 +190,23 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
/// Create an ARM architecture model.<br>
///<br>
ARMBaseTargetMachine::<wbr>ARMBaseTargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
+ Optional<CodeModel::Model> CM,<br>
CodeGenOpt::Level OL, bool isLittle)<br>
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,<br>
- CPU, FS, Options, getEffectiveRelocModel(TT, RM), CM,<br>
- OL),<br>
+ CPU, FS, Options, getEffectiveRelocModel(TT, RM),<br>
+ getEffectiveCodeModel(CM), OL),<br>
TargetABI(computeTargetABI(TT, CPU, Options)),<br>
TLOF(createTLOF(<wbr>getTargetTriple())), isLittle(isLittle) {<br>
<br>
@@ -276,21 +282,20 @@ TargetIRAnalysis ARMBaseTargetMachine::g<br>
});<br>
}<br>
<br>
-<br>
ARMLETargetMachine::<wbr>ARMLETargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}<br>
<br>
ARMBETargetMachine::<wbr>ARMBETargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}<br>
<br>
namespace {<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/<wbr>ARMTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>ARM/ARMTargetMachine.h?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/ARM/<wbr>ARMTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/ARM/<wbr>ARMTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -42,7 +42,7 @@ protected:<br>
public:<br>
ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
CodeGenOpt::Level OL, bool isLittle);<br>
~ARMBaseTargetMachine() override;<br>
<br>
@@ -74,8 +74,8 @@ class ARMLETargetMachine : public ARMBas<br>
public:<br>
ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
/// ARM/Thumb big endian target machine.<br>
@@ -84,8 +84,8 @@ class ARMBETargetMachine : public ARMBas<br>
public:<br>
ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
} // end namespace llvm<br>
<br>
Modified: llvm/trunk/lib/Target/BPF/<wbr>BPFTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/BPFTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>BPF/BPFTargetMachine.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/BPF/<wbr>BPFTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/BPF/<wbr>BPFTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -43,13 +43,21 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
BPFTargetMachine::<wbr>BPFTargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,<br>
- getEffectiveRelocModel(RM), CM, OL),<br>
+ getEffectiveRelocModel(RM), getEffectiveCodeModel(CM),<br>
+ OL),<br>
TLOF(make_unique<<wbr>TargetLoweringObjectFileELF>()<wbr>),<br>
Subtarget(TT, CPU, FS, *this) {<br>
initAsmInfo();<br>
<br>
Modified: llvm/trunk/lib/Target/BPF/<wbr>BPFTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/BPFTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>BPF/BPFTargetMachine.h?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/BPF/<wbr>BPFTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/BPF/<wbr>BPFTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -25,8 +25,8 @@ class BPFTargetMachine : public LLVMTarg<br>
public:<br>
BPFTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
<br>
const BPFSubtarget *getSubtargetImpl() const { return &Subtarget; }<br>
const BPFSubtarget *getSubtargetImpl(const Function &) const override {<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/<wbr>HexagonTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Hexagon/HexagonTargetMachine.<wbr>cpp?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Hexagon/<wbr>HexagonTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/<wbr>HexagonTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -152,6 +152,12 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
extern "C" void LLVMInitializeHexagonTarget() {<br>
// Register the target.<br>
RegisterTargetMachine<<wbr>HexagonTargetMachine> X(getTheHexagonTarget());<br>
@@ -168,17 +174,18 @@ HexagonTargetMachine::<wbr>HexagonTargetMachi<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
// Specify the vector alignment explicitly. For v512x1, the calculated<br>
// alignment would be 512*alignment(i1), which is 512 bytes, instead of<br>
// the required minimum of 64 bytes.<br>
: LLVMTargetMachine(<br>
- T, "e-m:e-p:32:32:32-a:0-n16:32-"<br>
- "i64:64:64-i32:32:32-i16:16:<wbr>16-i1:8:8-f32:32:32-f64:64:64-<wbr>"<br>
- "v32:32:32-v64:64:64-v512:512:<wbr>512-v1024:1024:1024-v2048:<wbr>2048:2048",<br>
- TT, CPU, FS, Options, getEffectiveRelocModel(RM), CM,<br>
- (HexagonNoOpt ? CodeGenOpt::None : OL)),<br>
+ T,<br>
+ "e-m:e-p:32:32:32-a:0-n16:32-"<br>
+ "i64:64:64-i32:32:32-i16:16:<wbr>16-i1:8:8-f32:32:32-f64:64:64-<wbr>"<br>
+ "v32:32:32-v64:64:64-v512:512:<wbr>512-v1024:1024:1024-v2048:<wbr>2048:2048",<br>
+ TT, CPU, FS, Options, getEffectiveRelocModel(RM),<br>
+ getEffectiveCodeModel(CM), (HexagonNoOpt ? CodeGenOpt::None : OL)),<br>
TLOF(make_unique<<wbr>HexagonTargetObjectFile>()) {<br>
initializeHexagonExpandCondset<wbr>sPass(*PassRegistry::<wbr>getPassRegistry());<br>
initAsmInfo();<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/<wbr>HexagonTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Hexagon/HexagonTargetMachine.<wbr>h?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Hexagon/<wbr>HexagonTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/<wbr>HexagonTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -30,8 +30,8 @@ class HexagonTargetMachine : public LLVM<br>
public:<br>
HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
~HexagonTargetMachine() override;<br>
const HexagonSubtarget *getSubtargetImpl(const Function &F) const override;<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/Lanai/<wbr>LanaiTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Lanai/LanaiTargetMachine.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Lanai/<wbr>LanaiTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/Lanai/<wbr>LanaiTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -53,15 +53,23 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Medium;<br>
+}<br>
+<br>
LanaiTargetMachine::<wbr>LanaiTargetMachine(const Target &T, const Triple &TT,<br>
StringRef Cpu, StringRef FeatureString,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CodeModel,<br>
- CodeGenOpt::Level OptLevel)<br>
+ Optional<CodeModel::Model> CodeModel,<br>
+ CodeGenOpt::Level OptLevel, bool JIT)<br>
: LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,<br>
- getEffectiveRelocModel(RM), CodeModel, OptLevel),<br>
- Subtarget(TT, Cpu, FeatureString, *this, Options, CodeModel, OptLevel),<br>
+ getEffectiveRelocModel(RM),<br>
+ getEffectiveCodeModel(<wbr>CodeModel), OptLevel),<br>
+ Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),<br>
+ OptLevel),<br>
TLOF(new LanaiTargetObjectFile()) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Lanai/<wbr>LanaiTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/LanaiTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Lanai/LanaiTargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Lanai/<wbr>LanaiTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Lanai/<wbr>LanaiTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -34,7 +34,8 @@ public:<br>
StringRef Cpu, StringRef FeatureString,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RelocationModel,<br>
- CodeModel::Model CodeModel, CodeGenOpt::Level OptLevel);<br>
+ Optional<CodeModel::Model> CodeModel,<br>
+ CodeGenOpt::Level OptLevel, bool JIT);<br>
<br>
const LanaiSubtarget *<br>
getSubtargetImpl(const llvm::Function & /*Fn*/) const override {<br>
<br>
Modified: llvm/trunk/lib/Target/MSP430/<wbr>MSP430TargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>MSP430/MSP430TargetMachine.<wbr>cpp?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/MSP430/<wbr>MSP430TargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/MSP430/<wbr>MSP430TargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -32,6 +32,12 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
static std::string computeDataLayout(const Triple &TT, StringRef CPU,<br>
const TargetOptions &Options) {<br>
return "e-m:e-p:16:16-i32:16-i64:16-<wbr>f32:16-f64:16-a:8-n8:16-S16";<br>
@@ -41,10 +47,11 @@ MSP430TargetMachine::<wbr>MSP430TargetMachine<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,<br>
- Options, getEffectiveRelocModel(RM), CM, OL),<br>
+ Options, getEffectiveRelocModel(RM),<br>
+ getEffectiveCodeModel(CM), OL),<br>
TLOF(make_unique<<wbr>TargetLoweringObjectFileELF>()<wbr>),<br>
Subtarget(TT, CPU, FS, *this) {<br>
initAsmInfo();<br>
<br>
Modified: llvm/trunk/lib/Target/MSP430/<wbr>MSP430TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>MSP430/MSP430TargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/MSP430/<wbr>MSP430TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/MSP430/<wbr>MSP430TargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -30,8 +30,8 @@ class MSP430TargetMachine : public LLVMT<br>
public:<br>
MSP430TargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
~MSP430TargetMachine() override;<br>
<br>
const MSP430Subtarget *getSubtargetImpl(const Function &F) const override {<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/<wbr>MipsTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Mips/MipsTargetMachine.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Mips/<wbr>MipsTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/<wbr>MipsTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -84,13 +84,19 @@ static std::string computeDataLayout(con<br>
return Ret;<br>
}<br>
<br>
-static Reloc::Model getEffectiveRelocModel(<wbr>CodeModel::Model CM,<br>
+static Reloc::Model getEffectiveRelocModel(bool JIT,<br>
Optional<Reloc::Model> RM) {<br>
- if (!RM.hasValue() || CM == CodeModel::JITDefault)<br>
+ if (!RM.hasValue() || JIT)<br>
return Reloc::Static;<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
// On function prologue, the stack is created by decrementing<br>
// its pointer. Once decremented, all references are done with positive<br>
// offset from the stack/frame pointer, using StackGrowsUp enables<br>
@@ -100,11 +106,12 @@ MipsTargetMachine::<wbr>MipsTargetMachine(con<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL,<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT,<br>
bool isLittle)<br>
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,<br>
- CPU, FS, Options, getEffectiveRelocModel(CM, RM), CM,<br>
- OL),<br>
+ CPU, FS, Options, getEffectiveRelocModel(JIT, RM),<br>
+ getEffectiveCodeModel(CM), OL),<br>
isLittle(isLittle), TLOF(llvm::make_unique<<wbr>MipsTargetObjectFile>()),<br>
ABI(MipsABIInfo::<wbr>computeTargetABI(TT, CPU, Options.MCOptions)),<br>
Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this),<br>
@@ -124,9 +131,9 @@ MipsebTargetMachine::<wbr>MipsebTargetMachine<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
- : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}<br>
<br>
void MipselTargetMachine::anchor() {}<br>
<br>
@@ -134,9 +141,9 @@ MipselTargetMachine::<wbr>MipselTargetMachine<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
- : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}<br>
<br>
const MipsSubtarget *<br>
MipsTargetMachine::<wbr>getSubtargetImpl(const Function &F) const {<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/<wbr>MipsTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Mips/MipsTargetMachine.h?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Mips/<wbr>MipsTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Mips/<wbr>MipsTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -40,8 +40,8 @@ class MipsTargetMachine : public LLVMTar<br>
public:<br>
MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL, bool isLittle);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT, bool isLittle);<br>
~MipsTargetMachine() override;<br>
<br>
TargetIRAnalysis getTargetIRAnalysis() override;<br>
@@ -80,8 +80,8 @@ class MipsebTargetMachine : public MipsT<br>
public:<br>
MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
/// Mips32/64 little endian target machine.<br>
@@ -92,8 +92,8 @@ class MipselTargetMachine : public MipsT<br>
public:<br>
MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
} // end namespace llvm<br>
<br>
Modified: llvm/trunk/lib/Target/NVPTX/<wbr>NVPTXTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>NVPTX/NVPTXTargetMachine.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/NVPTX/<wbr>NVPTXTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/NVPTX/<wbr>NVPTXTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -86,18 +86,23 @@ static std::string computeDataLayout(boo<br>
return Ret;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
NVPTXTargetMachine::<wbr>NVPTXTargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
+ Optional<CodeModel::Model> CM,<br>
CodeGenOpt::Level OL, bool is64bit)<br>
// The pic relocation model is used regardless of what the client has<br>
// specified, as it is the only relocation model currently supported.<br>
: LLVMTargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options,<br>
- Reloc::PIC_, CM, OL),<br>
- is64bit(is64bit),<br>
- TLOF(llvm::make_unique<<wbr>NVPTXTargetObjectFile>()),<br>
+ Reloc::PIC_, getEffectiveCodeModel(CM), OL),<br>
+ is64bit(is64bit), TLOF(llvm::make_unique<<wbr>NVPTXTargetObjectFile>()),<br>
Subtarget(TT, CPU, FS, *this) {<br>
if (TT.getOS() == Triple::NVCL)<br>
drvInterface = NVPTX::NVCL;<br>
@@ -114,8 +119,8 @@ NVPTXTargetMachine32::<wbr>NVPTXTargetMachine<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}<br>
<br>
void NVPTXTargetMachine64::anchor() {}<br>
@@ -124,8 +129,8 @@ NVPTXTargetMachine64::<wbr>NVPTXTargetMachine<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}<br>
<br>
namespace {<br>
<br>
Modified: llvm/trunk/lib/Target/NVPTX/<wbr>NVPTXTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>NVPTX/NVPTXTargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/NVPTX/<wbr>NVPTXTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/NVPTX/<wbr>NVPTXTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -36,7 +36,7 @@ class NVPTXTargetMachine : public LLVMTa<br>
public:<br>
NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
CodeGenOpt::Level OP, bool is64bit);<br>
<br>
~NVPTXTargetMachine() override;<br>
@@ -75,8 +75,8 @@ class NVPTXTargetMachine32 : public NVPT<br>
public:<br>
NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
class NVPTXTargetMachine64 : public NVPTXTargetMachine {<br>
@@ -84,8 +84,8 @@ class NVPTXTargetMachine64 : public NVPT<br>
public:<br>
NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
} // end namespace llvm<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>MCTargetDesc/PPCMCTargetDesc.<wbr>cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>PowerPC/MCTargetDesc/<wbr>PPCMCTargetDesc.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>MCTargetDesc/PPCMCTargetDesc.<wbr>cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>MCTargetDesc/PPCMCTargetDesc.<wbr>cpp Wed Aug 2 19:16:21 2017<br>
@@ -94,15 +94,6 @@ static MCAsmInfo *createPPCMCAsmInfo(con<br>
return MAI;<br>
}<br>
<br>
-static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM) {<br>
- if (CM == CodeModel::Default) {<br>
- if (!TT.isOSDarwin() &&<br>
- (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le))<br>
- CM = CodeModel::Medium;<br>
- }<br>
-}<br>
-<br>
namespace {<br>
<br>
class PPCTargetAsmStreamer : public PPCTargetStreamer {<br>
@@ -257,9 +248,6 @@ extern "C" void LLVMInitializePowerPCTar<br>
// Register the MC asm info.<br>
RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo);<br>
<br>
- // Register the MC codegen info.<br>
- TargetRegistry::<wbr>registerMCAdjustCodeGenOpts(*<wbr>T, adjustCodeGenOpts);<br>
-<br>
// Register the MC instruction info.<br>
TargetRegistry::<wbr>RegisterMCInstrInfo(*T, createPPCMCInstrInfo);<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPCFastISel.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>PowerPC/PPCFastISel.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPCFastISel.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPCFastISel.cpp Wed Aug 2 19:16:21 2017<br>
@@ -1930,7 +1930,7 @@ unsigned PPCFastISel::PPCMaterializeFP(<wbr>c<br>
<br>
PPCFuncInfo-><wbr>setUsesTOCBasePtr();<br>
// For small code model, generate a LF[SD](0, LDtocCPT(Idx, X2)).<br>
- if (CModel == CodeModel::Small || CModel == CodeModel::JITDefault) {<br>
+ if (CModel == CodeModel::Small) {<br>
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::LDtocCPT),<br>
TmpReg)<br>
.addConstantPoolIndex(Idx).<wbr>addReg(PPC::X2);<br>
@@ -1981,7 +1981,7 @@ unsigned PPCFastISel::PPCMaterializeGV(<wbr>c<br>
<br>
PPCFuncInfo-><wbr>setUsesTOCBasePtr();<br>
// For small code model, generate a simple TOC load.<br>
- if (CModel == CodeModel::Small || CModel == CodeModel::JITDefault)<br>
+ if (CModel == CodeModel::Small)<br>
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::LDtoc),<br>
DestReg)<br>
.addGlobalAddress(GV)<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPCISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>PowerPC/PPCISelLowering.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPCISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPCISelLowering.cpp Wed Aug 2 19:16:21 2017<br>
@@ -2476,7 +2476,6 @@ SDValue PPCTargetLowering::<wbr>getPICJumpTab<br>
return TargetLowering::<wbr>getPICJumpTableRelocBase(<wbr>Table, DAG);<br>
<br>
switch (getTargetMachine().<wbr>getCodeModel()) {<br>
- case CodeModel::Default:<br>
case CodeModel::Small:<br>
case CodeModel::Medium:<br>
return TargetLowering::<wbr>getPICJumpTableRelocBase(<wbr>Table, DAG);<br>
@@ -2494,7 +2493,6 @@ PPCTargetLowering::<wbr>getPICJumpTableRelocB<br>
return TargetLowering::<wbr>getPICJumpTableRelocBaseExpr(<wbr>MF, JTI, Ctx);<br>
<br>
switch (getTargetMachine().<wbr>getCodeModel()) {<br>
- case CodeModel::Default:<br>
case CodeModel::Small:<br>
case CodeModel::Medium:<br>
return TargetLowering::<wbr>getPICJumpTableRelocBaseExpr(<wbr>MF, JTI, Ctx);<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPCTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>PowerPC/PPCTargetMachine.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPCTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPCTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -208,6 +208,16 @@ static Reloc::Model getEffectiveRelocMod<br>
return Reloc::Static;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(const Triple &TT,<br>
+ Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ if (!TT.isOSDarwin() &&<br>
+ (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le))<br>
+ return CodeModel::Medium;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
// The FeatureString here is a little subtle. We are modifying the feature<br>
// string with what are (currently) non-function specific overrides as it goes<br>
// into the LLVMTargetMachine constructor and then using the stored value in the<br>
@@ -216,10 +226,12 @@ PPCTargetMachine::<wbr>PPCTargetMachine(const<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU,<br>
computeFSAdditions(FS, OL, TT), Options,<br>
- getEffectiveRelocModel(TT, RM), CM, OL),<br>
+ getEffectiveRelocModel(TT, RM),<br>
+ getEffectiveCodeModel(TT, CM), OL),<br>
TLOF(createTLOF(<wbr>getTargetTriple())),<br>
TargetABI(computeTargetABI(TT, Options)) {<br>
initAsmInfo();<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/<wbr>PPCTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>PowerPC/PPCTargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/PowerPC/<wbr>PPCTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/<wbr>PPCTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -35,8 +35,8 @@ private:<br>
public:<br>
PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
<br>
~PPCTargetMachine() override;<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/RISCV/<wbr>RISCVTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>RISCV/RISCVTargetMachine.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/RISCV/<wbr>RISCVTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/RISCV/<wbr>RISCVTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -43,14 +43,21 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
RISCVTargetMachine::<wbr>RISCVTargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,<br>
- getEffectiveRelocModel(TT, RM), CM, OL),<br>
+ getEffectiveRelocModel(TT, RM),<br>
+ getEffectiveCodeModel(CM), OL),<br>
TLOF(make_unique<<wbr>TargetLoweringObjectFileELF>()<wbr>) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/RISCV/<wbr>RISCVTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>RISCV/RISCVTargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/RISCV/<wbr>RISCVTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/RISCV/<wbr>RISCVTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -26,8 +26,8 @@ class RISCVTargetMachine : public LLVMTa<br>
public:<br>
RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
<br>
TargetPassConfig *createPassConfig(<wbr>PassManagerBase &PM) override;<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/<wbr>MCTargetDesc/<wbr>SparcMCTargetDesc.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Sparc/MCTargetDesc/<wbr>SparcMCTargetDesc.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Sparc/<wbr>MCTargetDesc/<wbr>SparcMCTargetDesc.cpp (original)<br>
+++ llvm/trunk/lib/Target/Sparc/<wbr>MCTargetDesc/<wbr>SparcMCTargetDesc.cpp Wed Aug 2 19:16:21 2017<br>
@@ -69,43 +69,6 @@ createSparcMCSubtargetInfo(<wbr>const Triple<br>
return createSparcMCSubtargetInfoImpl<wbr>(TT, CPU, FS);<br>
}<br>
<br>
-// Code models. Some only make sense for 64-bit code.<br>
-//<br>
-// SunCC Reloc CodeModel Constraints<br>
-// abs32 Static Small text+data+bss linked below 2^32 bytes<br>
-// abs44 Static Medium text+data+bss linked below 2^44 bytes<br>
-// abs64 Static Large text smaller than 2^31 bytes<br>
-// pic13 PIC_ Small GOT < 2^13 bytes<br>
-// pic32 PIC_ Medium GOT < 2^32 bytes<br>
-//<br>
-// All code models require that the text segment is smaller than 2GB.<br>
-<br>
-static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM) {<br>
- // The default 32-bit code model is abs32/pic32 and the default 32-bit<br>
- // code model for JIT is abs32.<br>
- switch (CM) {<br>
- default: break;<br>
- case CodeModel::Default:<br>
- case CodeModel::JITDefault: CM = CodeModel::Small; break;<br>
- }<br>
-}<br>
-<br>
-static void adjustCodeGenOptsV9(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM) {<br>
- // The default 64-bit code model is abs44/pic32 and the default 64-bit<br>
- // code model for JIT is abs64.<br>
- switch (CM) {<br>
- default: break;<br>
- case CodeModel::Default:<br>
- CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;<br>
- break;<br>
- case CodeModel::JITDefault:<br>
- CM = CodeModel::Large;<br>
- break;<br>
- }<br>
-}<br>
-<br>
static MCTargetStreamer *<br>
createObjectTargetStreamer(<wbr>MCStreamer &S, const MCSubtargetInfo &STI) {<br>
return new SparcTargetELFStreamer(S);<br>
@@ -159,12 +122,4 @@ extern "C" void LLVMInitializeSparcTarge<br>
// Register the MCInstPrinter<br>
TargetRegistry::<wbr>RegisterMCInstPrinter(*T, createSparcMCInstPrinter);<br>
}<br>
-<br>
- // Register the MC codegen info.<br>
- TargetRegistry::<wbr>registerMCAdjustCodeGenOpts(<wbr>getTheSparcTarget(),<br>
- adjustCodeGenOpts);<br>
- TargetRegistry::<wbr>registerMCAdjustCodeGenOpts(<wbr>getTheSparcV9Target(),<br>
- adjustCodeGenOptsV9);<br>
- TargetRegistry::<wbr>registerMCAdjustCodeGenOpts(<wbr>getTheSparcelTarget(),<br>
- adjustCodeGenOpts);<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/<wbr>SparcTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Sparc/SparcTargetMachine.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Sparc/<wbr>SparcTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/Sparc/<wbr>SparcTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -60,15 +60,39 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+// Code models. Some only make sense for 64-bit code.<br>
+//<br>
+// SunCC Reloc CodeModel Constraints<br>
+// abs32 Static Small text+data+bss linked below 2^32 bytes<br>
+// abs44 Static Medium text+data+bss linked below 2^44 bytes<br>
+// abs64 Static Large text smaller than 2^31 bytes<br>
+// pic13 PIC_ Small GOT < 2^13 bytes<br>
+// pic32 PIC_ Medium GOT < 2^32 bytes<br>
+//<br>
+// All code models require that the text segment is smaller than 2GB.<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM,<br>
+ Reloc::Model RM, bool Is64Bit,<br>
+ bool JIT) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ if (Is64Bit) {<br>
+ if (JIT)<br>
+ return CodeModel::Large;<br>
+ return RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;<br>
+ }<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
/// Create an ILP32 architecture model<br>
-SparcTargetMachine::<wbr>SparcTargetMachine(const Target &T, const Triple &TT,<br>
- StringRef CPU, StringRef FS,<br>
- const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL, bool is64bit)<br>
- : LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options,<br>
- getEffectiveRelocModel(RM), CM, OL),<br>
+SparcTargetMachine::<wbr>SparcTargetMachine(<br>
+ const Target &T, const Triple &TT, StringRef CPU, StringRef FS,<br>
+ const TargetOptions &Options, Optional<Reloc::Model> RM,<br>
+ Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit)<br>
+ : LLVMTargetMachine(<br>
+ T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options,<br>
+ getEffectiveRelocModel(RM),<br>
+ getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), is64bit, JIT),<br>
+ OL),<br>
TLOF(make_unique<<wbr>SparcELFTargetObjectFile>()),<br>
Subtarget(TT, CPU, FS, *this, is64bit), is64Bit(is64bit) {<br>
initAsmInfo();<br>
@@ -164,9 +188,9 @@ SparcV8TargetMachine::<wbr>SparcV8TargetMachi<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
- : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}<br>
<br>
void SparcV9TargetMachine::anchor() { }<br>
<br>
@@ -174,9 +198,9 @@ SparcV9TargetMachine::<wbr>SparcV9TargetMachi<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
- : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {}<br>
<br>
void SparcelTargetMachine::anchor() {}<br>
<br>
@@ -184,6 +208,6 @@ SparcelTargetMachine::<wbr>SparcelTargetMachi<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
- : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {}<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/<wbr>SparcTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>Sparc/SparcTargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/Sparc/<wbr>SparcTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Sparc/<wbr>SparcTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -28,8 +28,8 @@ class SparcTargetMachine : public LLVMTa<br>
public:<br>
SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL, bool is64bit);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT, bool is64bit);<br>
~SparcTargetMachine() override;<br>
<br>
const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; }<br>
@@ -53,8 +53,8 @@ class SparcV8TargetMachine : public Spar<br>
public:<br>
SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
/// Sparc 64-bit target machine<br>
@@ -64,8 +64,8 @@ class SparcV9TargetMachine : public Spar<br>
public:<br>
SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
class SparcelTargetMachine : public SparcTargetMachine {<br>
@@ -74,8 +74,8 @@ class SparcelTargetMachine : public Spar<br>
public:<br>
SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
};<br>
<br>
} // end namespace llvm<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/<wbr>MCTargetDesc/<wbr>SystemZMCTargetDesc.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>SystemZ/MCTargetDesc/<wbr>SystemZMCTargetDesc.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/SystemZ/<wbr>MCTargetDesc/<wbr>SystemZMCTargetDesc.cpp (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/<wbr>MCTargetDesc/<wbr>SystemZMCTargetDesc.cpp Wed Aug 2 19:16:21 2017<br>
@@ -173,43 +173,6 @@ createSystemZMCSubtargetInfo(<wbr>const Tripl<br>
return createSystemZMCSubtargetInfoIm<wbr>pl(TT, CPU, FS);<br>
}<br>
<br>
-static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM) {<br>
- // For SystemZ we define the models as follows:<br>
- //<br>
- // Small: BRASL can call any function and will use a stub if necessary.<br>
- // Locally-binding symbols will always be in range of LARL.<br>
- //<br>
- // Medium: BRASL can call any function and will use a stub if necessary.<br>
- // GOT slots and locally-defined text will always be in range<br>
- // of LARL, but other symbols might not be.<br>
- //<br>
- // Large: Equivalent to Medium for now.<br>
- //<br>
- // Kernel: Equivalent to Medium for now.<br>
- //<br>
- // This means that any PIC module smaller than 4GB meets the<br>
- // requirements of Small, so Small seems like the best default there.<br>
- //<br>
- // All symbols bind locally in a non-PIC module, so the choice is less<br>
- // obvious. There are two cases:<br>
- //<br>
- // - When creating an executable, PLTs and copy relocations allow<br>
- // us to treat external symbols as part of the executable.<br>
- // Any executable smaller than 4GB meets the requirements of Small,<br>
- // so that seems like the best default.<br>
- //<br>
- // - When creating JIT code, stubs will be in range of BRASL if the<br>
- // image is less than 4GB in size. GOT entries will likewise be<br>
- // in range of LARL. However, the JIT environment has no equivalent<br>
- // of copy relocs, so locally-binding data symbols might not be in<br>
- // the range of LARL. We need the Medium model in that case.<br>
- if (CM == CodeModel::Default)<br>
- CM = CodeModel::Small;<br>
- else if (CM == CodeModel::JITDefault)<br>
- CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;<br>
-}<br>
-<br>
static MCInstPrinter *createSystemZMCInstPrinter(<wbr>const Triple &T,<br>
unsigned SyntaxVariant,<br>
const MCAsmInfo &MAI,<br>
@@ -223,10 +186,6 @@ extern "C" void LLVMInitializeSystemZTar<br>
TargetRegistry::<wbr>RegisterMCAsmInfo(<wbr>getTheSystemZTarget(),<br>
createSystemZMCAsmInfo);<br>
<br>
- // Register the adjustCodeGenOpts.<br>
- TargetRegistry::<wbr>registerMCAdjustCodeGenOpts(<wbr>getTheSystemZTarget(),<br>
- adjustCodeGenOpts);<br>
-<br>
// Register the MCCodeEmitter.<br>
TargetRegistry::<wbr>RegisterMCCodeEmitter(<wbr>getTheSystemZTarget(),<br>
createSystemZMCCodeEmitter);<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/<wbr>SystemZTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>SystemZ/SystemZTargetMachine.<wbr>cpp?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/SystemZ/<wbr>SystemZTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/<wbr>SystemZTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -99,14 +99,54 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+// For SystemZ we define the models as follows:<br>
+//<br>
+// Small: BRASL can call any function and will use a stub if necessary.<br>
+// Locally-binding symbols will always be in range of LARL.<br>
+//<br>
+// Medium: BRASL can call any function and will use a stub if necessary.<br>
+// GOT slots and locally-defined text will always be in range<br>
+// of LARL, but other symbols might not be.<br>
+//<br>
+// Large: Equivalent to Medium for now.<br>
+//<br>
+// Kernel: Equivalent to Medium for now.<br>
+//<br>
+// This means that any PIC module smaller than 4GB meets the<br>
+// requirements of Small, so Small seems like the best default there.<br>
+//<br>
+// All symbols bind locally in a non-PIC module, so the choice is less<br>
+// obvious. There are two cases:<br>
+//<br>
+// - When creating an executable, PLTs and copy relocations allow<br>
+// us to treat external symbols as part of the executable.<br>
+// Any executable smaller than 4GB meets the requirements of Small,<br>
+// so that seems like the best default.<br>
+//<br>
+// - When creating JIT code, stubs will be in range of BRASL if the<br>
+// image is less than 4GB in size. GOT entries will likewise be<br>
+// in range of LARL. However, the JIT environment has no equivalent<br>
+// of copy relocs, so locally-binding data symbols might not be in<br>
+// the range of LARL. We need the Medium model in that case.<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM,<br>
+ Reloc::Model RM, bool JIT) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ if (JIT)<br>
+ return RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
SystemZTargetMachine::<wbr>SystemZTargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
- : LLVMTargetMachine(T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options,<br>
- getEffectiveRelocModel(RM), CM, OL),<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : LLVMTargetMachine(<br>
+ T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options,<br>
+ getEffectiveRelocModel(RM),<br>
+ getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), JIT), OL),<br>
TLOF(llvm::make_unique<<wbr>TargetLoweringObjectFileELF>()<wbr>),<br>
Subtarget(TT, CPU, FS, *this) {<br>
initAsmInfo();<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/<wbr>SystemZTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>SystemZ/SystemZTargetMachine.<wbr>h?rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/SystemZ/<wbr>SystemZTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/<wbr>SystemZTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -32,8 +32,8 @@ class SystemZTargetMachine : public LLVM<br>
public:<br>
SystemZTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
~SystemZTargetMachine() override;<br>
<br>
const SystemZSubtarget *getSubtargetImpl() const { return &Subtarget; }<br>
<br>
Modified: llvm/trunk/lib/Target/<wbr>TargetMachineC.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachineC.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>TargetMachineC.cpp?rev=309911&<wbr>r1=309910&r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/<wbr>TargetMachineC.cpp (original)<br>
+++ llvm/trunk/lib/Target/<wbr>TargetMachineC.cpp Wed Aug 2 19:16:21 2017<br>
@@ -119,7 +119,8 @@ LLVMTargetMachineRef LLVMCreateTargetMac<br>
break;<br>
}<br>
<br>
- CodeModel::Model CM = unwrap(CodeModel);<br>
+ bool JIT;<br>
+ Optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);<br>
<br>
CodeGenOpt::Level OL;<br>
switch (Level) {<br>
@@ -138,8 +139,8 @@ LLVMTargetMachineRef LLVMCreateTargetMac<br>
}<br>
<br>
TargetOptions opt;<br>
- return wrap(unwrap(T)-><wbr>createTargetMachine(Triple, CPU, Features, opt, RM,<br>
- CM, OL));<br>
+ return wrap(unwrap(T)-><wbr>createTargetMachine(Triple, CPU, Features, opt, RM, CM,<br>
+ OL, JIT));<br>
}<br>
<br>
void LLVMDisposeTargetMachine(<wbr>LLVMTargetMachineRef T) { delete unwrap(T); }<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>MCTargetDesc/X86MCTargetDesc.<wbr>cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/MCTargetDesc/<wbr>X86MCTargetDesc.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>MCTargetDesc/X86MCTargetDesc.<wbr>cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>MCTargetDesc/X86MCTargetDesc.<wbr>cpp Wed Aug 2 19:16:21 2017<br>
@@ -198,18 +198,6 @@ static MCAsmInfo *createX86MCAsmInfo(con<br>
return MAI;<br>
}<br>
<br>
-static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM) {<br>
- bool is64Bit = TT.getArch() == Triple::x86_64;<br>
-<br>
- // For static codegen, if we're not already set, use Small codegen.<br>
- if (CM == CodeModel::Default)<br>
- CM = CodeModel::Small;<br>
- else if (CM == CodeModel::JITDefault)<br>
- // 64-bit JIT places everything in the same buffer except external funcs.<br>
- CM = is64Bit ? CodeModel::Large : CodeModel::Small;<br>
-}<br>
-<br>
static MCInstPrinter *createX86MCInstPrinter(const Triple &T,<br>
unsigned SyntaxVariant,<br>
const MCAsmInfo &MAI,<br>
@@ -238,9 +226,6 @@ extern "C" void LLVMInitializeX86TargetM<br>
// Register the MC asm info.<br>
RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo);<br>
<br>
- // Register the MC codegen info.<br>
- RegisterMCAdjustCodeGenOptsFn Y(*T, adjustCodeGenOpts);<br>
-<br>
// Register the MC instruction info.<br>
TargetRegistry::<wbr>RegisterMCInstrInfo(*T, createX86MCInstrInfo);<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>X86TargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86TargetMachine.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>X86TargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>X86TargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -181,15 +181,27 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM,<br>
+ bool JIT, bool Is64Bit) {<br>
+ if (CM)<br>
+ return *CM;<br>
+ if (JIT)<br>
+ return Is64Bit ? CodeModel::Large : CodeModel::Small;<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
/// Create an X86 target.<br>
///<br>
X86TargetMachine::<wbr>X86TargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM, CodeGenOpt::Level OL)<br>
- : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options,<br>
- getEffectiveRelocModel(TT, RM), CM, OL),<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
+ : LLVMTargetMachine(<br>
+ T, computeDataLayout(TT), TT, CPU, FS, Options,<br>
+ getEffectiveRelocModel(TT, RM),<br>
+ getEffectiveCodeModel(CM, JIT, TT.getArch() == Triple::x86_64), OL),<br>
TLOF(createTLOF(<wbr>getTargetTriple())) {<br>
// Windows stack unwinder gets confused when execution flow "falls through"<br>
// after a call to 'noreturn' function.<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<wbr>X86TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86TargetMachine.h?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/X86/<wbr>X86TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/X86/<wbr>X86TargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -35,8 +35,8 @@ class X86TargetMachine final : public LL<br>
public:<br>
X86TargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
~X86TargetMachine() override;<br>
<br>
const X86Subtarget *getSubtargetImpl(const Function &F) const override;<br>
<br>
Modified: llvm/trunk/lib/Target/XCore/<wbr>MCTargetDesc/<wbr>XCoreMCTargetDesc.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>XCore/MCTargetDesc/<wbr>XCoreMCTargetDesc.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/XCore/<wbr>MCTargetDesc/<wbr>XCoreMCTargetDesc.cpp (original)<br>
+++ llvm/trunk/lib/Target/XCore/<wbr>MCTargetDesc/<wbr>XCoreMCTargetDesc.cpp Wed Aug 2 19:16:21 2017<br>
@@ -65,15 +65,6 @@ static MCAsmInfo *createXCoreMCAsmInfo(c<br>
return MAI;<br>
}<br>
<br>
-static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,<br>
- CodeModel::Model &CM) {<br>
- if (CM == CodeModel::Default) {<br>
- CM = CodeModel::Small;<br>
- }<br>
- if (CM != CodeModel::Small && CM != CodeModel::Large)<br>
- report_fatal_error("Target only supports CodeModel Small or Large");<br>
-}<br>
-<br>
static MCInstPrinter *createXCoreMCInstPrinter(<wbr>const Triple &T,<br>
unsigned SyntaxVariant,<br>
const MCAsmInfo &MAI,<br>
@@ -134,10 +125,6 @@ extern "C" void LLVMInitializeXCoreTarge<br>
// Register the MC asm info.<br>
RegisterMCAsmInfoFn X(getTheXCoreTarget(), createXCoreMCAsmInfo);<br>
<br>
- // Register the MC codegen info.<br>
- TargetRegistry::<wbr>registerMCAdjustCodeGenOpts(<wbr>getTheXCoreTarget(),<br>
- adjustCodeGenOpts);<br>
-<br>
// Register the MC instruction info.<br>
TargetRegistry::<wbr>RegisterMCInstrInfo(<wbr>getTheXCoreTarget(),<br>
createXCoreMCInstrInfo);<br>
<br>
Modified: llvm/trunk/lib/Target/XCore/<wbr>XCoreTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>XCore/XCoreTargetMachine.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/XCore/<wbr>XCoreTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/XCore/<wbr>XCoreTargetMachine.cpp Wed Aug 2 19:16:21 2017<br>
@@ -31,17 +31,27 @@ static Reloc::Model getEffectiveRelocMod<br>
return *RM;<br>
}<br>
<br>
+static CodeModel::Model getEffectiveCodeModel(<wbr>Optional<CodeModel::Model> CM) {<br>
+ if (CM) {<br>
+ if (*CM != CodeModel::Small && *CM != CodeModel::Large)<br>
+ report_fatal_error("Target only supports CodeModel Small or Large");<br>
+ return *CM;<br>
+ }<br>
+ return CodeModel::Small;<br>
+}<br>
+<br>
/// Create an ILP32 architecture model<br>
///<br>
XCoreTargetMachine::<wbr>XCoreTargetMachine(const Target &T, const Triple &TT,<br>
StringRef CPU, StringRef FS,<br>
const TargetOptions &Options,<br>
Optional<Reloc::Model> RM,<br>
- CodeModel::Model CM,<br>
- CodeGenOpt::Level OL)<br>
+ Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT)<br>
: LLVMTargetMachine(<br>
T, "e-m:e-p:32:32-i1:8:32-i8:8:<wbr>32-i16:16:32-i64:32-f64:32-a:<wbr>0:32-n32",<br>
- TT, CPU, FS, Options, getEffectiveRelocModel(RM), CM, OL),<br>
+ TT, CPU, FS, Options, getEffectiveRelocModel(RM),<br>
+ getEffectiveCodeModel(CM), OL),<br>
TLOF(llvm::make_unique<<wbr>XCoreTargetObjectFile>()),<br>
Subtarget(TT, CPU, FS, *this) {<br>
initAsmInfo();<br>
<br>
Modified: llvm/trunk/lib/Target/XCore/<wbr>XCoreTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>XCore/XCoreTargetMachine.h?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/lib/Target/XCore/<wbr>XCoreTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/XCore/<wbr>XCoreTargetMachine.h Wed Aug 2 19:16:21 2017<br>
@@ -31,8 +31,8 @@ class XCoreTargetMachine : public LLVMTa<br>
public:<br>
XCoreTargetMachine(const Target &T, const Triple &TT, StringRef CPU,<br>
StringRef FS, const TargetOptions &Options,<br>
- Optional<Reloc::Model> RM, CodeModel::Model CM,<br>
- CodeGenOpt::Level OL);<br>
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,<br>
+ CodeGenOpt::Level OL, bool JIT);<br>
~XCoreTargetMachine() override;<br>
<br>
const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; }<br>
<br>
Modified: llvm/trunk/test/CodeGen/ARM/<wbr>legalize-unaligned-load.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/legalize-unaligned-load.ll?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>CodeGen/ARM/legalize-<wbr>unaligned-load.ll?rev=309911&<wbr>r1=309910&r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/ARM/<wbr>legalize-unaligned-load.ll (original)<br>
+++ llvm/trunk/test/CodeGen/ARM/<wbr>legalize-unaligned-load.ll Wed Aug 2 19:16:21 2017<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc -O3 -code-model=default -mtriple=armv7l-unknown-linux-<wbr>gnueabihf -mcpu=generic %s -o - | FileCheck %s<br>
+; RUN: llc -O3 -mtriple=armv7l-unknown-linux-<wbr>gnueabihf -mcpu=generic %s -o - | FileCheck %s<br>
; Check that we respect the existing chain between loads and stores when we<br>
; legalize unaligned loads.<br>
; Test case from PR24669.<br>
<br>
Modified: llvm/trunk/test/CodeGen/XCore/<wbr>codemodel.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/codemodel.ll?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>CodeGen/XCore/codemodel.ll?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/test/CodeGen/XCore/<wbr>codemodel.ll (original)<br>
+++ llvm/trunk/test/CodeGen/XCore/<wbr>codemodel.ll Wed Aug 2 19:16:21 2017<br>
@@ -4,7 +4,7 @@<br>
; BAD_CM: Target only supports CodeModel Small or Large<br>
<br>
<br>
-; RUN: llc < %s -march=xcore -code-model=default | FileCheck %s<br>
+; RUN: llc < %s -march=xcore | FileCheck %s<br>
; RUN: llc < %s -march=xcore -code-model=small | FileCheck %s<br>
; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE<br>
<br>
<br>
Modified: llvm/trunk/tools/llc/llc.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/tools/llc/<wbr>llc.cpp?rev=309911&r1=309910&<wbr>r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/tools/llc/llc.cpp (original)<br>
+++ llvm/trunk/tools/llc/llc.cpp Wed Aug 2 19:16:21 2017<br>
@@ -448,9 +448,9 @@ static int compileModule(char **argv, LL<br>
Options.MCOptions.<wbr>IASSearchPaths = IncludeDirs;<br>
Options.MCOptions.<wbr>SplitDwarfFile = SplitDwarfFile;<br>
<br>
- std::unique_ptr<TargetMachine> Target(<br>
- TheTarget-><wbr>createTargetMachine(TheTriple.<wbr>getTriple(), CPUStr, FeaturesStr,<br>
- Options, getRelocModel(), CMModel, OLvl));<br>
+ std::unique_ptr<TargetMachine> Target(TheTarget-><wbr>createTargetMachine(<br>
+ TheTriple.getTriple(), CPUStr, FeaturesStr, Options, getRelocModel(),<br>
+ getCodeModel(), OLvl));<br>
<br>
assert(Target && "Could not allocate target machine!");<br>
<br>
<br>
Modified: llvm/trunk/tools/lli/lli.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lli/lli.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/tools/lli/<wbr>lli.cpp?rev=309911&r1=309910&<wbr>r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/tools/lli/lli.cpp (original)<br>
+++ llvm/trunk/tools/lli/lli.cpp Wed Aug 2 19:16:21 2017<br>
@@ -15,20 +15,21 @@<br>
<br>
#include "OrcLazyJIT.h"<br>
#include "RemoteJITUtils.h"<br>
-#include "llvm/IR/LLVMContext.h"<br>
#include "llvm/ADT/StringExtras.h"<br>
#include "llvm/ADT/Triple.h"<br>
#include "llvm/Bitcode/BitcodeReader.h"<br>
+#include "llvm/CodeGen/CommandFlags.h"<br>
#include "llvm/CodeGen/<wbr>LinkAllCodegenComponents.h"<br>
#include "llvm/ExecutionEngine/<wbr>GenericValue.h"<br>
#include "llvm/ExecutionEngine/<wbr>Interpreter.h"<br>
#include "llvm/ExecutionEngine/<wbr>JITEventListener.h"<br>
#include "llvm/ExecutionEngine/MCJIT.h"<br>
#include "llvm/ExecutionEngine/<wbr>ObjectCache.h"<br>
+#include "llvm/ExecutionEngine/Orc/<wbr>OrcRemoteTargetClient.h"<br>
#include "llvm/ExecutionEngine/<wbr>OrcMCJITReplacement.h"<br>
#include "llvm/ExecutionEngine/<wbr>SectionMemoryManager.h"<br>
-#include "llvm/ExecutionEngine/Orc/<wbr>OrcRemoteTargetClient.h"<br>
#include "llvm/IR/IRBuilder.h"<br>
+#include "llvm/IR/LLVMContext.h"<br>
#include "llvm/IR/Module.h"<br>
#include "llvm/IR/Type.h"<br>
#include "llvm/IR/TypeBuilder.h"<br>
@@ -124,22 +125,6 @@ namespace {<br>
TargetTriple("mtriple", cl::desc("Override target triple for module"));<br>
<br>
cl::opt<std::string><br>
- MArch("march",<br>
- cl::desc("Architecture to generate assembly for (see --version)"));<br>
-<br>
- cl::opt<std::string><br>
- MCPU("mcpu",<br>
- cl::desc("Target a specific cpu type (-mcpu=help for details)"),<br>
- cl::value_desc("cpu-name"),<br>
- cl::init(""));<br>
-<br>
- cl::list<std::string><br>
- MAttrs("mattr",<br>
- cl::CommaSeparated,<br>
- cl::desc("Target specific attributes (-mattr=help for details)"),<br>
- cl::value_desc("a1,+a2,-a3,...<wbr>"));<br>
-<br>
- cl::opt<std::string><br>
EntryFunc("entry-function",<br>
cl::desc("Specify the entry function (default = 'main') "<br>
"of the executable"),<br>
@@ -186,47 +171,11 @@ namespace {<br>
cl::desc("Disable JIT lazy compilation"),<br>
cl::init(false));<br>
<br>
- cl::opt<Reloc::Model> RelocModel(<br>
- "relocation-model", cl::desc("Choose relocation model"),<br>
- cl::values(<br>
- clEnumValN(Reloc::Static, "static", "Non-relocatable code"),<br>
- clEnumValN(Reloc::PIC_, "pic",<br>
- "Fully relocatable, position independent code"),<br>
- clEnumValN(Reloc::<wbr>DynamicNoPIC, "dynamic-no-pic",<br>
- "Relocatable external references, non-relocatable code")));<br>
-<br>
- cl::opt<llvm::CodeModel::<wbr>Model><br>
- CMModel("code-model",<br>
- cl::desc("Choose code model"),<br>
- cl::init(CodeModel::<wbr>JITDefault),<br>
- cl::values(clEnumValN(<wbr>CodeModel::JITDefault, "default",<br>
- "Target default JIT code model"),<br>
- clEnumValN(CodeModel::Small, "small",<br>
- "Small code model"),<br>
- clEnumValN(CodeModel::Kernel, "kernel",<br>
- "Kernel code model"),<br>
- clEnumValN(CodeModel::Medium, "medium",<br>
- "Medium code model"),<br>
- clEnumValN(CodeModel::Large, "large",<br>
- "Large code model")));<br>
-<br>
cl::opt<bool><br>
GenerateSoftFloatCalls("soft-<wbr>float",<br>
cl::desc("Generate software floating point library calls"),<br>
cl::init(false));<br>
<br>
- cl::opt<llvm::FloatABI::<wbr>ABIType><br>
- FloatABIForCalls("float-abi",<br>
- cl::desc("Choose float ABI type"),<br>
- cl::init(FloatABI::Default),<br>
- cl::values(<br>
- clEnumValN(FloatABI::Default, "default",<br>
- "Target default float ABI type"),<br>
- clEnumValN(FloatABI::Soft, "soft",<br>
- "Soft float ABI (implied by -soft-float)"),<br>
- clEnumValN(FloatABI::Hard, "hard",<br>
- "Hard float ABI (uses FP registers)")));<br>
-<br>
ExitOnError ExitOnErr;<br>
}<br>
<br>
@@ -433,7 +382,8 @@ int main(int argc, char **argv, char * c<br>
builder.setMAttrs(MAttrs);<br>
if (RelocModel.getNumOccurrences(<wbr>))<br>
builder.setRelocationModel(<wbr>RelocModel);<br>
- builder.setCodeModel(CMModel);<br>
+ if (CMModel.getNumOccurrences())<br>
+ builder.setCodeModel(CMModel);<br>
builder.setErrorStr(&ErrorMsg)<wbr>;<br>
builder.setEngineKind(<wbr>ForceInterpreter<br>
? EngineKind::Interpreter<br>
<br>
Modified: llvm/trunk/tools/llvm-lto2/<wbr>llvm-lto2.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-lto2/llvm-lto2.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/tools/llvm-<wbr>lto2/llvm-lto2.cpp?rev=309911&<wbr>r1=309910&r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/tools/llvm-lto2/<wbr>llvm-lto2.cpp (original)<br>
+++ llvm/trunk/tools/llvm-lto2/<wbr>llvm-lto2.cpp Wed Aug 2 19:16:21 2017<br>
@@ -197,7 +197,7 @@ static int run(int argc, char **argv) {<br>
Conf.MAttrs = MAttrs;<br>
if (auto RM = getRelocModel())<br>
Conf.RelocModel = *RM;<br>
- Conf.CodeModel = CMModel;<br>
+ Conf.CodeModel = getCodeModel();<br>
<br>
Conf.DebugPassManager = DebugPassManager;<br>
<br>
<br>
Modified: llvm/trunk/tools/opt/opt.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/opt/opt.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/tools/opt/<wbr>opt.cpp?rev=309911&r1=309910&<wbr>r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/tools/opt/opt.cpp (original)<br>
+++ llvm/trunk/tools/opt/opt.cpp Wed Aug 2 19:16:21 2017<br>
@@ -349,7 +349,7 @@ static TargetMachine* GetTargetMachine(T<br>
<br>
return TheTarget-><wbr>createTargetMachine(TheTriple.<wbr>getTriple(), CPUStr,<br>
FeaturesStr, Options, getRelocModel(),<br>
- CMModel, GetCodeGenOptLevel());<br>
+ getCodeModel(), GetCodeGenOptLevel());<br>
}<br>
<br>
#ifdef LINK_POLLY_INTO_TOOLS<br>
<br>
Modified: llvm/trunk/unittests/<wbr>ExecutionEngine/MCJIT/<wbr>MCJITTestBase.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/ExecutionEngine/MCJIT/MCJITTestBase.h?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/unittests/<wbr>ExecutionEngine/MCJIT/<wbr>MCJITTestBase.h?rev=309911&r1=<wbr>309910&r2=309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/unittests/<wbr>ExecutionEngine/MCJIT/<wbr>MCJITTestBase.h (original)<br>
+++ llvm/trunk/unittests/<wbr>ExecutionEngine/MCJIT/<wbr>MCJITTestBase.h Wed Aug 2 19:16:21 2017<br>
@@ -278,14 +278,9 @@ protected:<br>
<br>
class MCJITTestBase : public MCJITTestAPICommon, public TrivialModuleBuilder {<br>
protected:<br>
-<br>
MCJITTestBase()<br>
- : TrivialModuleBuilder(<wbr>HostTriple)<br>
- , OptLevel(CodeGenOpt::None)<br>
- , CodeModel(CodeModel::Default)<br>
- , MArch("")<br>
- , MM(new SectionMemoryManager)<br>
- {<br>
+ : TrivialModuleBuilder(<wbr>HostTriple), OptLevel(CodeGenOpt::None),<br>
+ CodeModel(CodeModel::Small), MArch(""), MM(new SectionMemoryManager) {<br>
// The architectures below are known to be compatible with MCJIT as they<br>
// are copied from test/ExecutionEngine/MCJIT/<wbr>lit.local.cfg and should be<br>
// kept in sync.<br>
@@ -320,7 +315,6 @@ protected:<br>
.setMCJITMemoryManager(std::<wbr>move(MM))<br>
.setErrorStr(&Error)<br>
.setOptLevel(CodeGenOpt::None)<br>
- .setCodeModel(CodeModel::<wbr>JITDefault)<br>
.setMArch(MArch)<br>
.setMCPU(sys::getHostCPUName()<wbr>)<br>
//.setMAttrs(MAttrs)<br>
<br>
Modified: llvm/trunk/unittests/MI/<wbr>LiveIntervalTest.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/MI/LiveIntervalTest.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/unittests/<wbr>MI/LiveIntervalTest.cpp?rev=<wbr>309911&r1=309910&r2=309911&<wbr>view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/unittests/MI/<wbr>LiveIntervalTest.cpp (original)<br>
+++ llvm/trunk/unittests/MI/<wbr>LiveIntervalTest.cpp Wed Aug 2 19:16:21 2017<br>
@@ -45,9 +45,8 @@ std::unique_ptr<TargetMachine> createTar<br>
return nullptr;<br>
<br>
TargetOptions Options;<br>
- return std::unique_ptr<TargetMachine><wbr>(<br>
- T->createTargetMachine("<wbr>AMDGPU", "", "", Options, None,<br>
- CodeModel::Default, CodeGenOpt::Aggressive));<br>
+ return std::unique_ptr<TargetMachine><wbr>(T->createTargetMachine(<br>
+ "AMDGPU", "", "", Options, None, None, CodeGenOpt::Aggressive));<br>
}<br>
<br>
std::unique_ptr<Module> parseMIR(LLVMContext &Context,<br>
<br>
Modified: llvm/trunk/unittests/Target/<wbr>AArch64/InstSizes.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/Target/AArch64/InstSizes.cpp?rev=309911&r1=309910&r2=309911&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/unittests/<wbr>Target/AArch64/InstSizes.cpp?<wbr>rev=309911&r1=309910&r2=<wbr>309911&view=diff</a><br>
==============================<wbr>==============================<wbr>==================<br>
--- llvm/trunk/unittests/Target/<wbr>AArch64/InstSizes.cpp (original)<br>
+++ llvm/trunk/unittests/Target/<wbr>AArch64/InstSizes.cpp Wed Aug 2 19:16:21 2017<br>
@@ -22,9 +22,8 @@ std::unique_ptr<TargetMachine> createTar<br>
std::string Error;<br>
const Target *TheTarget = TargetRegistry::lookupTarget(<wbr>TT, Error);<br>
<br>
- return std::unique_ptr<TargetMachine><wbr>(<br>
- TheTarget-><wbr>createTargetMachine(TT, CPU, FS, TargetOptions(), None,<br>
- CodeModel::Default, CodeGenOpt::Default));<br>
+ return std::unique_ptr<TargetMachine><wbr>(TheTarget-><wbr>createTargetMachine(<br>
+ TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default));<br>
}<br>
<br>
std::unique_ptr<<wbr>AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {<br>
<br>
<br>
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