<div dir="ltr">Thanks, this is a bug exposed by this patch. A fix has been proposed in <a href="https://reviews.llvm.org/D34641">https://reviews.llvm.org/D34641</a><div><br></div><div>Dehao</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Jun 26, 2017 at 9:36 AM, Diana Picus <span dir="ltr"><<a href="mailto:diana.picus@linaro.org" target="_blank">diana.picus@linaro.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Dehao,<br>
<br>
I attached the preprocessed input file and the script to reproduce the<br>
assertion. Feel free to ask if you need anything else.<br>
<br>
Regards,<br>
Diana<br>
<div class="HOEnZb"><div class="h5"><br>
On 26 June 2017 at 17:48, Dehao Chen <<a href="mailto:dehao@google.com">dehao@google.com</a>> wrote:<br>
> Hi, Diana,<br>
><br>
> Could you help extract a reproducible? It would best it can be an IR file<br>
> and an "opt" or "clang" command that would trigger the assertion with this<br>
> patch?<br>
><br>
> Thanks,<br>
> Dehao<br>
><br>
> On Thu, Jun 22, 2017 at 3:02 AM, Diana Picus <<a href="mailto:diana.picus@linaro.org">diana.picus@linaro.org</a>> wrote:<br>
>><br>
>> Hi,<br>
>><br>
>> I had to revert this because it broke self-hosting on AArch64:<br>
>> <a href="http://lab.llvm.org:8011/builders/clang-cmake-aarch64-lld/builds/1707" rel="noreferrer" target="_blank">http://lab.llvm.org:8011/<wbr>builders/clang-cmake-aarch64-<wbr>lld/builds/1707</a><br>
>><br>
>> Please let me know if there's anything I can do to help you reproduce<br>
>> or debug this.<br>
>><br>
>> Cheers,<br>
>> Diana<br>
>><br>
>> On 22 June 2017 at 00:01, Dehao Chen via llvm-commits<br>
>> <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br>
>> > Author: dehao<br>
>> > Date: Wed Jun 21 17:01:32 2017<br>
>> > New Revision: 305960<br>
>> ><br>
>> > URL: <a href="http://llvm.org/viewvc/llvm-project?rev=305960&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project?rev=305960&view=rev</a><br>
>> > Log:<br>
>> > Enable vectorizer-maximize-bandwidth by default.<br>
>> ><br>
>> > Summary:<br>
>> > vectorizer-maximize-bandwidth is generally useful in terms of<br>
>> > performance. I've tested the impact of changing this to default on speccpu<br>
>> > benchmarks on sandybridge machines. The result shows non-negative impact:<br>
>> ><br>
>> > spec/2006/fp/C++/444.namd 26.84 -0.31%<br>
>> > spec/2006/fp/C++/447.dealII 46.19 +0.89%<br>
>> > spec/2006/fp/C++/450.soplex 42.92 -0.44%<br>
>> > spec/2006/fp/C++/453.povray 38.57 -2.25%<br>
>> > spec/2006/fp/C/433.milc 24.54 -0.76%<br>
>> > spec/2006/fp/C/470.lbm 41.08 +0.26%<br>
>> > spec/2006/fp/C/482.sphinx3 47.58 -0.99%<br>
>> > spec/2006/int/C++/471.omnetpp 22.06 +1.87%<br>
>> > spec/2006/int/C++/473.astar 22.65 -0.12%<br>
>> > spec/2006/int/C++/483.<wbr>xalancbmk 33.69 +4.97%<br>
>> > spec/2006/int/C/400.perlbench 33.43 +1.70%<br>
>> > spec/2006/int/C/401.bzip2 23.02 -0.19%<br>
>> > spec/2006/int/C/403.gcc 32.57 -0.43%<br>
>> > spec/2006/int/C/429.mcf 40.35 +0.27%<br>
>> > spec/2006/int/C/445.gobmk 26.96 +0.06%<br>
>> > spec/2006/int/C/456.hmmer 24.4 +0.19%<br>
>> > spec/2006/int/C/458.sjeng 27.91 -0.08%<br>
>> > spec/2006/int/C/462.libquantum 57.47 -0.20%<br>
>> > spec/2006/int/C/464.h264ref 46.52 +1.35%<br>
>> ><br>
>> > geometric mean +0.29%<br>
>> ><br>
>> > The regression on 453.povray seems real, but is due to secondary effects<br>
>> > as all hot functions are bit-identical with and without the flag.<br>
>> ><br>
>> > I started this patch to consult upstream opinions on this. It will be<br>
>> > greatly appreciated if the community can help test the performance impact of<br>
>> > this change on other architectures so that we can decided if this should be<br>
>> > target-dependent.<br>
>> ><br>
>> > Reviewers: hfinkel, mkuper, davidxl, chandlerc<br>
>> ><br>
>> > Reviewed By: chandlerc<br>
>> ><br>
>> > Subscribers: rengolin, sanjoy, javed.absar, bjope, dorit, magabari,<br>
>> > RKSimon, llvm-commits, mzolotukhin<br>
>> ><br>
>> > Differential Revision: <a href="https://reviews.llvm.org/D33341" rel="noreferrer" target="_blank">https://reviews.llvm.org/<wbr>D33341</a><br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/lib/Transforms/<wbr>Vectorize/LoopVectorize.cpp<br>
>> ><br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/AArch64/loop-<wbr>vectorization-factors.ll<br>
>> ><br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/AArch64/<wbr>reduction-small-size.ll<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/ARM/gcc-<wbr>examples.ll<br>
>> ><br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/fp64_to_<wbr>uint32-cost-model.ll<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/gcc-<wbr>examples.ll<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/masked_load_<wbr>store.ll<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/no_fpmath.ll<br>
>> ><br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/no_fpmath_<wbr>with_hotness.ll<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/reduction-<wbr>crash.ll<br>
>> ><br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/<wbr>vectorization-remarks-loopid-<wbr>dbg.ll<br>
>> ><br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/<wbr>vectorization-remarks.ll<br>
>> ><br>
>> > Modified: llvm/trunk/lib/Transforms/<wbr>Vectorize/LoopVectorize.cpp<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/<wbr>Transforms/Vectorize/<wbr>LoopVectorize.cpp?rev=305960&<wbr>r1=305959&r2=305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > --- llvm/trunk/lib/Transforms/<wbr>Vectorize/LoopVectorize.cpp (original)<br>
>> > +++ llvm/trunk/lib/Transforms/<wbr>Vectorize/LoopVectorize.cpp Wed Jun 21<br>
>> > 17:01:32 2017<br>
>> > @@ -122,7 +122,7 @@ static cl::opt<unsigned> TinyTripCountVe<br>
>> > "value."));<br>
>> ><br>
>> > static cl::opt<bool> MaximizeBandwidth(<br>
>> > - "vectorizer-maximize-<wbr>bandwidth", cl::init(false), cl::Hidden,<br>
>> > + "vectorizer-maximize-<wbr>bandwidth", cl::init(true), cl::Hidden,<br>
>> > cl::desc("Maximize bandwidth when selecting vectorization factor<br>
>> > which "<br>
>> > "will be determined by the smallest type in loop."));<br>
>> ><br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/AArch64/loop-<wbr>vectorization-factors.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/<wbr>AArch64/loop-vectorization-<wbr>factors.ll?rev=305960&r1=<wbr>305959&r2=305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > ---<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/AArch64/loop-<wbr>vectorization-factors.ll<br>
>> > (original)<br>
>> > +++<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/AArch64/loop-<wbr>vectorization-factors.ll<br>
>> > Wed Jun 21 17:01:32 2017<br>
>> > @@ -88,9 +88,9 @@ for.body:<br>
>> > }<br>
>> ><br>
>> > ; CHECK-LABEL: @add_c(<br>
>> > -; CHECK: load <8 x i8>, <8 x i8>*<br>
>> > -; CHECK: add <8 x i16><br>
>> > -; CHECK: store <8 x i16><br>
>> > +; CHECK: load <16 x i8>, <16 x i8>*<br>
>> > +; CHECK: add <16 x i16><br>
>> > +; CHECK: store <16 x i16><br>
>> > ; Function Attrs: nounwind<br>
>> > define void @add_c(i8* noalias nocapture readonly %p, i16* noalias<br>
>> > nocapture %q, i32 %len) #0 {<br>
>> > entry:<br>
>> > @@ -116,9 +116,9 @@ for.body:<br>
>> > }<br>
>> ><br>
>> > ; CHECK-LABEL: @add_d(<br>
>> > -; CHECK: load <4 x i16><br>
>> > -; CHECK: add nsw <4 x i32><br>
>> > -; CHECK: store <4 x i32><br>
>> > +; CHECK: load <8 x i16><br>
>> > +; CHECK: add nsw <8 x i32><br>
>> > +; CHECK: store <8 x i32><br>
>> > define void @add_d(i16* noalias nocapture readonly %p, i32* noalias<br>
>> > nocapture %q, i32 %len) #0 {<br>
>> > entry:<br>
>> > %cmp7 = icmp sgt i32 %len, 0<br>
>> > @@ -187,16 +187,16 @@ for.body:<br>
>> > }<br>
>> ><br>
>> > ; CHECK-LABEL: @add_f<br>
>> > -; CHECK: load <8 x i16><br>
>> > -; CHECK: trunc <8 x i16><br>
>> > -; CHECK: shl <8 x i8><br>
>> > -; CHECK: add <8 x i8><br>
>> > -; CHECK: or <8 x i8><br>
>> > -; CHECK: mul <8 x i8><br>
>> > -; CHECK: and <8 x i8><br>
>> > -; CHECK: xor <8 x i8><br>
>> > -; CHECK: mul <8 x i8><br>
>> > -; CHECK: store <8 x i8><br>
>> > +; CHECK: load <16 x i16><br>
>> > +; CHECK: trunc <16 x i16><br>
>> > +; CHECK: shl <16 x i8><br>
>> > +; CHECK: add <16 x i8><br>
>> > +; CHECK: or <16 x i8><br>
>> > +; CHECK: mul <16 x i8><br>
>> > +; CHECK: and <16 x i8><br>
>> > +; CHECK: xor <16 x i8><br>
>> > +; CHECK: mul <16 x i8><br>
>> > +; CHECK: store <16 x i8><br>
>> > define void @add_f(i16* noalias nocapture readonly %p, i8* noalias<br>
>> > nocapture %q, i8 %arg1, i8 %arg2, i32 %len) #0 {<br>
>> > entry:<br>
>> > %cmp.32 = icmp sgt i32 %len, 0<br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/AArch64/<wbr>reduction-small-size.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/<wbr>AArch64/reduction-small-size.<wbr>ll?rev=305960&r1=305959&r2=<wbr>305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > ---<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/AArch64/<wbr>reduction-small-size.ll<br>
>> > (original)<br>
>> > +++<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/AArch64/<wbr>reduction-small-size.ll Wed<br>
>> > Jun 21 17:01:32 2017<br>
>> > @@ -123,16 +123,16 @@ for.body:<br>
>> > ; }<br>
>> > ;<br>
>> > ; CHECK: vector.body:<br>
>> > -; CHECK: phi <8 x i16><br>
>> > -; CHECK: [[Ld1:%[a-zA-Z0-9.]+]] = load <8 x i8><br>
>> > -; CHECK: zext <8 x i8> [[Ld1]] to <8 x i16><br>
>> > -; CHECK: [[Ld2:%[a-zA-Z0-9.]+]] = load <8 x i8><br>
>> > -; CHECK: zext <8 x i8> [[Ld2]] to <8 x i16><br>
>> > -; CHECK: add <8 x i16><br>
>> > -; CHECK: add <8 x i16><br>
>> > +; CHECK: phi <16 x i16><br>
>> > +; CHECK: [[Ld1:%[a-zA-Z0-9.]+]] = load <16 x i8><br>
>> > +; CHECK: zext <16 x i8> [[Ld1]] to <16 x i16><br>
>> > +; CHECK: [[Ld2:%[a-zA-Z0-9.]+]] = load <16 x i8><br>
>> > +; CHECK: zext <16 x i8> [[Ld2]] to <16 x i16><br>
>> > +; CHECK: add <16 x i16><br>
>> > +; CHECK: add <16 x i16><br>
>> > ;<br>
>> > ; CHECK: middle.block:<br>
>> > -; CHECK: [[Rdx:%[a-zA-Z0-9.]+]] = call i16<br>
>> > @llvm.experimental.vector.<wbr>reduce.add.i16.v8i16(<8 x i16><br>
>> > +; CHECK: [[Rdx:%[a-zA-Z0-9.]+]] = call i16<br>
>> > @llvm.experimental.vector.<wbr>reduce.add.i16.v16i16(<16 x i16><br>
>> > ; CHECK: zext i16 [[Rdx]] to i32<br>
>> > ;<br>
>> > define i16 @reduction_i16_2(i8* nocapture readonly %a, i8* nocapture<br>
>> > readonly %b, i32 %n) {<br>
>> ><br>
>> > Modified: llvm/trunk/test/Transforms/<wbr>LoopVectorize/ARM/gcc-<wbr>examples.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/ARM/gcc-examples.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/ARM/<wbr>gcc-examples.ll?rev=305960&r1=<wbr>305959&r2=305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > --- llvm/trunk/test/Transforms/<wbr>LoopVectorize/ARM/gcc-<wbr>examples.ll<br>
>> > (original)<br>
>> > +++ llvm/trunk/test/Transforms/<wbr>LoopVectorize/ARM/gcc-<wbr>examples.ll Wed Jun<br>
>> > 21 17:01:32 2017<br>
>> > @@ -35,9 +35,9 @@ define void @example1() nounwind uwtable<br>
>> > }<br>
>> ><br>
>> > ;CHECK-LABEL: @example10b(<br>
>> > -;CHECK: load <4 x i16><br>
>> > -;CHECK: sext <4 x i16><br>
>> > -;CHECK: store <4 x i32><br>
>> > +;CHECK: load <8 x i16><br>
>> > +;CHECK: sext <8 x i16><br>
>> > +;CHECK: store <8 x i32><br>
>> > ;CHECK: ret void<br>
>> > define void @example10b(i16* noalias nocapture %sa, i16* noalias<br>
>> > nocapture %sb, i16* noalias nocapture %sc, i32* noalias nocapture %ia, i32*<br>
>> > noalias nocapture %ib, i32* noalias nocapture %ic) nounwind uwtable ssp {<br>
>> > br label %1<br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/fp64_to_<wbr>uint32-cost-model.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/fp64_to_uint32-cost-model.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>fp64_to_uint32-cost-model.ll?<wbr>rev=305960&r1=305959&r2=<wbr>305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > ---<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/fp64_to_<wbr>uint32-cost-model.ll<br>
>> > (original)<br>
>> > +++<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/fp64_to_<wbr>uint32-cost-model.ll<br>
>> > Wed Jun 21 17:01:32 2017<br>
>> > @@ -9,7 +9,9 @@ target triple = "x86_64-apple-macosx"<br>
>> ><br>
>> > ; If we need to scalarize the fptoui and then use inserts to build up<br>
>> > the<br>
>> > ; vector again, then there is certainly no value in going 256-bit wide.<br>
>> > -; CHECK-NOT: vpinsrd<br>
>> > +; But as we default to maximize bandwidth, we should convert it to<br>
>> > 256-bit<br>
>> > +; anyway.<br>
>> > +; CHECK: vpinsrd<br>
>> ><br>
>> > define void @convert() {<br>
>> > entry:<br>
>> ><br>
>> > Modified: llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/gcc-<wbr>examples.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/gcc-examples.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>gcc-examples.ll?rev=305960&r1=<wbr>305959&r2=305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > --- llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/gcc-<wbr>examples.ll<br>
>> > (original)<br>
>> > +++ llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/gcc-<wbr>examples.ll Wed Jun<br>
>> > 21 17:01:32 2017<br>
>> > @@ -44,17 +44,16 @@ define void @example1() nounwind uwtable<br>
>> > ret void<br>
>> > }<br>
>> ><br>
>> > -; Select VF=4 because sext <8 x i1> to <8 x i32> is expensive.<br>
>> > ;CHECK-LABEL: @example10b(<br>
>> > -;CHECK: load <4 x i16><br>
>> > -;CHECK: sext <4 x i16><br>
>> > -;CHECK: store <4 x i32><br>
>> > +;CHECK: load <8 x i16><br>
>> > +;CHECK: sext <8 x i16><br>
>> > +;CHECK: store <8 x i32><br>
>> > ;CHECK: ret void<br>
>> > ;UNROLL-LABEL: @example10b(<br>
>> > -;UNROLL: load <4 x i16><br>
>> > -;UNROLL: load <4 x i16><br>
>> > -;UNROLL: store <4 x i32><br>
>> > -;UNROLL: store <4 x i32><br>
>> > +;UNROLL: load <8 x i16><br>
>> > +;UNROLL: load <8 x i16><br>
>> > +;UNROLL: store <8 x i32><br>
>> > +;UNROLL: store <8 x i32><br>
>> > ;UNROLL: ret void<br>
>> > define void @example10b(i16* noalias nocapture %sa, i16* noalias<br>
>> > nocapture %sb, i16* noalias nocapture %sc, i32* noalias nocapture %ia, i32*<br>
>> > noalias nocapture %ib, i32* noalias nocapture %ic) nounwind uwtable ssp {<br>
>> > br label %1<br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/masked_load_<wbr>store.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/masked_load_store.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>masked_load_store.ll?rev=<wbr>305960&r1=305959&r2=305960&<wbr>view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > --- llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/masked_load_<wbr>store.ll<br>
>> > (original)<br>
>> > +++ llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/masked_load_<wbr>store.ll<br>
>> > Wed Jun 21 17:01:32 2017<br>
>> > @@ -260,20 +260,28 @@ for.end:<br>
>> > ; }<br>
>> > ;}<br>
>> ><br>
>> > -;AVX-LABEL: @foo3<br>
>> > -;AVX: icmp slt <4 x i32> %wide.load, <i32 100, i32 100,<br>
>> > -;AVX: call <4 x double> @llvm.masked.load.v4f64.<wbr>p0v4f64<br>
>> > -;AVX: sitofp <4 x i32> %wide.load to <4 x double><br>
>> > -;AVX: fadd <4 x double><br>
>> > -;AVX: call void @llvm.masked.store.v4f64.<wbr>p0v4f64<br>
>> > -;AVX: ret void<br>
>> > +;AVX1-LABEL: @foo3<br>
>> > +;AVX1: icmp slt <4 x i32> %wide.load, <i32 100, i32 100,<br>
>> > +;AVX1: call <4 x double> @llvm.masked.load.v4f64.<wbr>p0v4f64<br>
>> > +;AVX1: sitofp <4 x i32> %wide.load to <4 x double><br>
>> > +;AVX1: fadd <4 x double><br>
>> > +;AVX1: call void @llvm.masked.store.v4f64.<wbr>p0v4f64<br>
>> > +;AVX1: ret void<br>
>> > +<br>
>> > +;AVX2-LABEL: @foo3<br>
>> > +;AVX2: icmp slt <8 x i32> %wide.load, <i32 100, i32 100,<br>
>> > +;AVX2: call <8 x double> @llvm.masked.load.v8f64.<wbr>p0v8f64<br>
>> > +;AVX2: sitofp <8 x i32> %wide.load to <8 x double><br>
>> > +;AVX2: fadd <8 x double><br>
>> > +;AVX2: call void @llvm.masked.store.v8f64.<wbr>p0v8f64<br>
>> > +;AVX2: ret void<br>
>> ><br>
>> > ;AVX512-LABEL: @foo3<br>
>> > -;AVX512: icmp slt <8 x i32> %wide.load, <i32 100, i32 100,<br>
>> > -;AVX512: call <8 x double> @llvm.masked.load.v8f64.<wbr>p0v8f64<br>
>> > -;AVX512: sitofp <8 x i32> %wide.load to <8 x double><br>
>> > -;AVX512: fadd <8 x double><br>
>> > -;AVX512: call void @llvm.masked.store.v8f64.<wbr>p0v8f64<br>
>> > +;AVX512: icmp slt <16 x i32> %wide.load, <i32 100, i32 100,<br>
>> > +;AVX512: call <16 x double> @llvm.masked.load.v16f64.<wbr>p0v16f64<br>
>> > +;AVX512: sitofp <16 x i32> %wide.load to <16 x double><br>
>> > +;AVX512: fadd <16 x double><br>
>> > +;AVX512: call void @llvm.masked.store.v16f64.<wbr>p0v16f64<br>
>> > ;AVX512: ret void<br>
>> ><br>
>> ><br>
>> > @@ -502,19 +510,19 @@ for.end:<br>
>> > ; }<br>
>> > ;}<br>
>> > ;AVX2-LABEL: @foo6<br>
>> > -;AVX2: icmp sgt <4 x i32> %reverse, zeroinitializer<br>
>> > -;AVX2: shufflevector <4 x i1>{{.*}}<4 x i32> <i32 3, i32 2, i32 1, i32<br>
>> > 0><br>
>> > -;AVX2: call <4 x double> @llvm.masked.load.v4f64.<wbr>p0v4f64<br>
>> > -;AVX2: fadd <4 x double><br>
>> > -;AVX2: call void @llvm.masked.store.v4f64.<wbr>p0v4f64<br>
>> > +;AVX2: icmp sgt <8 x i32> %reverse, zeroinitializer<br>
>> > +;AVX2: shufflevector <8 x i1>{{.*}}<8 x i32> <i32 7, i32 6, i32 5, i32<br>
>> > 4<br>
>> > +;AVX2: call <8 x double> @llvm.masked.load.v8f64.<wbr>p0v8f64<br>
>> > +;AVX2: fadd <8 x double><br>
>> > +;AVX2: call void @llvm.masked.store.v8f64.<wbr>p0v8f64<br>
>> > ;AVX2: ret void<br>
>> ><br>
>> > ;AVX512-LABEL: @foo6<br>
>> > -;AVX512: icmp sgt <8 x i32> %reverse, zeroinitializer<br>
>> > -;AVX512: shufflevector <8 x i1>{{.*}}<8 x i32> <i32 7, i32 6, i32 5,<br>
>> > i32 4<br>
>> > -;AVX512: call <8 x double> @llvm.masked.load.v8f64.<wbr>p0v8f64<br>
>> > -;AVX512: fadd <8 x double><br>
>> > -;AVX512: call void @llvm.masked.store.v8f64.<wbr>p0v8f64<br>
>> > +;AVX512: icmp sgt <16 x i32> %reverse, zeroinitializer<br>
>> > +;AVX512: shufflevector <16 x i1>{{.*}}<16 x i32> <i32 15, i32 14, i32<br>
>> > 13, i32 12<br>
>> > +;AVX512: call <16 x double> @llvm.masked.load.v16f64.<wbr>p0v16f64<br>
>> > +;AVX512: fadd <16 x double><br>
>> > +;AVX512: call void @llvm.masked.store.v16f64.<wbr>p0v16f64<br>
>> > ;AVX512: ret void<br>
>> ><br>
>> ><br>
>> > @@ -582,8 +590,8 @@ for.end:<br>
>> > ; }<br>
>> ><br>
>> > ;AVX512-LABEL: @foo7<br>
>> > -;AVX512: call <8 x double*> @llvm.masked.load.v8p0f64.<wbr>p0v8p0f64(<8 x<br>
>> > double*>*<br>
>> > -;AVX512: call void @llvm.masked.store.v8f64.<wbr>p0v8f64<br>
>> > +;AVX512: call <64 x double*> @llvm.masked.load.v64p0f64.<wbr>p0v64p0f64(<64<br>
>> > x double*>*<br>
>> > +;AVX512: call void @llvm.masked.store.v64f64.<wbr>p0v64f64<br>
>> > ;AVX512: ret void<br>
>> ><br>
>> > define void @foo7(double* noalias %out, double** noalias %in, i8*<br>
>> > noalias %trigger, i32 %size) #0 {<br>
>> > @@ -654,8 +662,8 @@ for.end:<br>
>> > ;}<br>
>> ><br>
>> > ;AVX512-LABEL: @foo8<br>
>> > -;AVX512: call <8 x i32 ()*><br>
>> > @llvm.masked.load.v8p0f_i32f.<wbr>p0v8p0f_i32f(<8 x i32 ()*>* %<br>
>> > -;AVX512: call void @llvm.masked.store.v8f64.<wbr>p0v8f64<br>
>> > +;AVX512: call <64 x i32 ()*><br>
>> > @llvm.masked.load.v64p0f_i32f.<wbr>p0v64p0f_i32f(<64 x i32 ()*>* %<br>
>> > +;AVX512: call void @llvm.masked.store.v64f64.<wbr>p0v64f64<br>
>> > ;AVX512: ret void<br>
>> ><br>
>> > define void @foo8(double* noalias %out, i32 ()** noalias %in, i8*<br>
>> > noalias %trigger, i32 %size) #0 {<br>
>> ><br>
>> > Modified: llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/no_fpmath.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/no_fpmath.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>no_fpmath.ll?rev=305960&r1=<wbr>305959&r2=305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > --- llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/no_fpmath.ll (original)<br>
>> > +++ llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/no_fpmath.ll Wed Jun 21<br>
>> > 17:01:32 2017<br>
>> > @@ -2,7 +2,7 @@<br>
>> ><br>
>> > ; CHECK: remark: no_fpmath.c:6:11: loop not vectorized: cannot prove it<br>
>> > is safe to reorder floating-point operations<br>
>> > ; CHECK: remark: no_fpmath.c:6:14: loop not vectorized<br>
>> > -; CHECK: remark: no_fpmath.c:17:14: vectorized loop (vectorization<br>
>> > width: 2, interleaved count: 2)<br>
>> > +; CHECK: remark: no_fpmath.c:17:14: vectorized loop (vectorization<br>
>> > width: 4, interleaved count: 2)<br>
>> ><br>
>> > target datalayout = "e-m:o-i64:64-f80:128-n8:16:<wbr>32:64-S128"<br>
>> > target triple = "x86_64-apple-macosx10.10.0"<br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/no_fpmath_<wbr>with_hotness.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/no_fpmath_with_hotness.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>no_fpmath_with_hotness.ll?rev=<wbr>305960&r1=305959&r2=305960&<wbr>view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > ---<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/no_fpmath_<wbr>with_hotness.ll<br>
>> > (original)<br>
>> > +++<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/no_fpmath_<wbr>with_hotness.ll Wed<br>
>> > Jun 21 17:01:32 2017<br>
>> > @@ -3,7 +3,7 @@<br>
>> ><br>
>> > ; CHECK: remark: no_fpmath.c:6:11: loop not vectorized: cannot prove it<br>
>> > is safe to reorder floating-point operations (hotness: 300)<br>
>> > ; CHECK: remark: no_fpmath.c:6:14: loop not vectorized<br>
>> > -; CHECK: remark: no_fpmath.c:17:14: vectorized loop (vectorization<br>
>> > width: 2, interleaved count: 2) (hotness: 300)<br>
>> > +; CHECK: remark: no_fpmath.c:17:14: vectorized loop (vectorization<br>
>> > width: 4, interleaved count: 2) (hotness: 300)<br>
>> ><br>
>> > target datalayout = "e-m:o-i64:64-f80:128-n8:16:<wbr>32:64-S128"<br>
>> > target triple = "x86_64-apple-macosx10.10.0"<br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/reduction-<wbr>crash.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/reduction-crash.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>reduction-crash.ll?rev=305960&<wbr>r1=305959&r2=305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > --- llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/reduction-<wbr>crash.ll<br>
>> > (original)<br>
>> > +++ llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/reduction-<wbr>crash.ll Wed<br>
>> > Jun 21 17:01:32 2017<br>
>> > @@ -7,7 +7,7 @@ target triple = "i386-apple-darwin"<br>
>> > define void @test1(float* nocapture %arg, i32 %arg1) nounwind {<br>
>> > ; CHECK-LABEL: @test1(<br>
>> > ; CHECK: preheader<br>
>> > -; CHECK: insertelement <2 x double> zeroinitializer, double %tmp, i32 0<br>
>> > +; CHECK: insertelement <4 x double> zeroinitializer, double %tmp, i32 0<br>
>> > ; CHECK: vector.memcheck<br>
>> ><br>
>> > bb:<br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/<wbr>vectorization-remarks-loopid-<wbr>dbg.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/vectorization-remarks-loopid-dbg.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>vectorization-remarks-loopid-<wbr>dbg.ll?rev=305960&r1=305959&<wbr>r2=305960&view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > ---<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/<wbr>vectorization-remarks-loopid-<wbr>dbg.ll<br>
>> > (original)<br>
>> > +++<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/<wbr>vectorization-remarks-loopid-<wbr>dbg.ll<br>
>> > Wed Jun 21 17:01:32 2017<br>
>> > @@ -6,7 +6,7 @@<br>
>> > ; DEBUG-OUTPUT-NOT: .loc<br>
>> > ; DEBUG-OUTPUT-NOT: {{.*}}.debug_info<br>
>> ><br>
>> > -; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop<br>
>> > (vectorization width: 4, interleaved count: 1)<br>
>> > +; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop<br>
>> > (vectorization width: 16, interleaved count: 1)<br>
>> > ; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved loop<br>
>> > (interleaved count: 4)<br>
>> > ; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized:<br>
>> > vectorization and interleaving are explicitly disabled, or vectorize width<br>
>> > and interleave count are both set to 1<br>
>> ><br>
>> ><br>
>> > Modified:<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/<wbr>vectorization-remarks.ll<br>
>> > URL:<br>
>> > <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/vectorization-remarks.ll?rev=305960&r1=305959&r2=305960&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>vectorization-remarks.ll?rev=<wbr>305960&r1=305959&r2=305960&<wbr>view=diff</a><br>
>> ><br>
>> > ==============================<wbr>==============================<wbr>==================<br>
>> > ---<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/<wbr>vectorization-remarks.ll<br>
>> > (original)<br>
>> > +++<br>
>> > llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/<wbr>vectorization-remarks.ll Wed<br>
>> > Jun 21 17:01:32 2017<br>
>> > @@ -6,7 +6,7 @@<br>
>> > ; DEBUG-OUTPUT-NOT: .loc<br>
>> > ; DEBUG-OUTPUT-NOT: {{.*}}.debug_info<br>
>> ><br>
>> > -; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop<br>
>> > (vectorization width: 4, interleaved count: 1)<br>
>> > +; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop<br>
>> > (vectorization width: 16, interleaved count: 1)<br>
>> > ; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved loop<br>
>> > (interleaved count: 4)<br>
>> > ; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized:<br>
>> > vectorization and interleaving are explicitly disabled, or vectorize width<br>
>> > and interleave count are both set to 1<br>
>> ><br>
>> ><br>
>> ><br>
>> > ______________________________<wbr>_________________<br>
>> > llvm-commits mailing list<br>
>> > <a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a><br>
>> > <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/<wbr>mailman/listinfo/llvm-commits</a><br>
><br>
><br>
</div></div></blockquote></div><br></div>