<div dir="ltr"><div class="gmail_quote"><div dir="ltr">On Tue, Jun 6, 2017 at 3:23 PM Eugene Zelenko via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: eugenezelenko<br>
Date: Tue Jun  6 17:22:41 2017<br>
New Revision: 304839<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=304839&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=304839&view=rev</a><br>
Log:<br>
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).<br></blockquote><div><br></div><div>LLVM has (rightly or wrongly) policy against trying to maintain strict IWYU stuff. These kinds of changes tend to have little benefit locally and a high cost for outstanding patches, so I'm not sure you should really prioritize them.</div><div><br></div><div>I think it makes much more sense to clean up *specific files* that you are going to be making very substantial changes to. There are some exceptions, but they're fairly rare...</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
Modified:<br>
    llvm/trunk/include/llvm/CodeGen/RegisterPressure.h<br>
    llvm/trunk/include/llvm/CodeGen/RegisterUsageInfo.h<br>
    llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h<br>
    llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp<br>
    llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.h<br>
    llvm/trunk/lib/CodeGen/BranchFolding.cpp<br>
    llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp<br>
    llvm/trunk/lib/CodeGen/MIRParser/MIParser.h<br>
    llvm/trunk/lib/CodeGen/MIRPrinter.cpp<br>
    llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp<br>
    llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp<br>
    llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp<br>
    llvm/trunk/lib/CodeGen/XRayInstrumentation.cpp<br>
    llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/RegisterPressure.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterPressure.h?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterPressure.h?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/RegisterPressure.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/RegisterPressure.h Tue Jun  6 17:22:41 2017<br>
@@ -32,7 +32,9 @@<br>
 namespace llvm {<br>
<br>
 class LiveIntervals;<br>
+class MachineFunction;<br>
 class MachineInstr;<br>
+class MachineRegisterInfo;<br>
 class RegisterClassInfo;<br>
<br>
 struct RegisterMaskPair {<br>
@@ -147,12 +149,14 @@ class PressureDiff {<br>
<br>
   PressureChange PressureChanges[MaxPSets];<br>
<br>
-  typedef PressureChange* iterator;<br>
+  using iterator = PressureChange *;<br>
+<br>
   iterator nonconst_begin() { return &PressureChanges[0]; }<br>
   iterator nonconst_end() { return &PressureChanges[MaxPSets]; }<br>
<br>
 public:<br>
-  typedef const PressureChange* const_iterator;<br>
+  using const_iterator = const PressureChange *;<br>
+<br>
   const_iterator begin() const { return &PressureChanges[0]; }<br>
   const_iterator end() const { return &PressureChanges[MaxPSets]; }<br>
<br>
@@ -269,7 +273,7 @@ private:<br>
     }<br>
   };<br>
<br>
-  typedef SparseSet<IndexMaskPair> RegSet;<br>
+  using RegSet = SparseSet<IndexMaskPair>;<br>
   RegSet Regs;<br>
   unsigned NumRegUnits;<br>
<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/RegisterUsageInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterUsageInfo.h?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterUsageInfo.h?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/RegisterUsageInfo.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/RegisterUsageInfo.h Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//==- RegisterUsageInfo.h - Register Usage Informartion Storage -*- C++ -*-===//<br>
+//==- RegisterUsageInfo.h - Register Usage Informartion Storage --*- C++ -*-==//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -20,15 +20,15 @@<br>
 #define LLVM_CODEGEN_PHYSICALREGISTERUSAGEINFO_H<br>
<br>
 #include "llvm/ADT/DenseMap.h"<br>
-#include "llvm/CodeGen/MachineRegisterInfo.h"<br>
-#include "llvm/IR/Function.h"<br>
-#include "llvm/IR/Module.h"<br>
 #include "llvm/Pass.h"<br>
-#include "llvm/Support/CommandLine.h"<br>
-#include "llvm/Support/raw_ostream.h"<br>
+#include <cstdint><br>
+#include <vector><br>
<br>
 namespace llvm {<br>
<br>
+class Function;<br>
+class TargetMachine;<br>
+<br>
 class PhysicalRegisterUsageInfo : public ImmutablePass {<br>
   virtual void anchor();<br>
<br>
@@ -70,6 +70,7 @@ private:<br>
<br>
   const TargetMachine *TM;<br>
 };<br>
-}<br>
<br>
-#endif<br>
+} // end namespace llvm<br>
+<br>
+#endif // LLVM_CODEGEN_PHYSICALREGISTERUSAGEINFO_H<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===-- llvm/CodeGen/SchedulerRegistry.h ------------------------*- C++ -*-===//<br>
+//===- llvm/CodeGen/SchedulerRegistry.h -------------------------*- C++ -*-===//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -16,7 +16,7 @@<br>
 #define LLVM_CODEGEN_SCHEDULERREGISTRY_H<br>
<br>
 #include "llvm/CodeGen/MachinePassRegistry.h"<br>
-#include "llvm/Target/TargetMachine.h"<br>
+#include "llvm/Support/CodeGen.h"<br>
<br>
 namespace llvm {<br>
<br>
@@ -26,15 +26,13 @@ namespace llvm {<br>
 ///<br>
 //===----------------------------------------------------------------------===//<br>
<br>
-class SelectionDAGISel;<br>
 class ScheduleDAGSDNodes;<br>
-class SelectionDAG;<br>
-class MachineBasicBlock;<br>
+class SelectionDAGISel;<br>
<br>
 class RegisterScheduler : public MachinePassRegistryNode {<br>
 public:<br>
-  typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*,<br>
-                                                  CodeGenOpt::Level);<br>
+  using FunctionPassCtor = ScheduleDAGSDNodes *(*)(SelectionDAGISel*,<br>
+                                                   CodeGenOpt::Level);<br>
<br>
   static MachinePassRegistry Registry;<br>
<br>
@@ -45,13 +43,14 @@ public:<br>
<br>
<br>
   // Accessors.<br>
-  //<br>
   RegisterScheduler *getNext() const {<br>
     return (RegisterScheduler *)MachinePassRegistryNode::getNext();<br>
   }<br>
+<br>
   static RegisterScheduler *getList() {<br>
     return (RegisterScheduler *)Registry.getList();<br>
   }<br>
+<br>
   static void setListener(MachinePassRegistryListener *L) {<br>
     Registry.setListener(L);<br>
   }<br>
@@ -103,4 +102,4 @@ ScheduleDAGSDNodes *createDAGLinearizer(<br>
<br>
 } // end namespace llvm<br>
<br>
-#endif<br>
+#endif // LLVM_CODEGEN_SCHEDULERREGISTRY_H<br>
<br>
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===-- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp --*- C++ -*--===//<br>
+//===- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp ----------------------===//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -12,37 +12,80 @@<br>
 //===----------------------------------------------------------------------===//<br>
<br>
 #include "CodeViewDebug.h"<br>
+#include "llvm/ADT/APSInt.h"<br>
+#include "llvm/ADT/ArrayRef.h"<br>
+#include "llvm/ADT/DenseMap.h"<br>
+#include "llvm/ADT/DenseSet.h"<br>
+#include "llvm/ADT/MapVector.h"<br>
+#include "llvm/ADT/None.h"<br>
+#include "llvm/ADT/Optional.h"<br>
+#include "llvm/ADT/SmallString.h"<br>
+#include "llvm/ADT/SmallVector.h"<br>
+#include "llvm/ADT/STLExtras.h"<br>
+#include "llvm/ADT/StringRef.h"<br>
 #include "llvm/ADT/TinyPtrVector.h"<br>
+#include "llvm/ADT/Triple.h"<br>
+#include "llvm/ADT/Twine.h"<br>
+#include "llvm/CodeGen/AsmPrinter.h"<br>
+#include "llvm/CodeGen/LexicalScopes.h"<br>
+#include "llvm/CodeGen/MachineFunction.h"<br>
+#include "llvm/CodeGen/MachineInstr.h"<br>
+#include "llvm/CodeGen/MachineModuleInfo.h"<br>
+#include "llvm/CodeGen/MachineOperand.h"<br>
+#include "llvm/Config/llvm-config.h"<br>
 #include "llvm/DebugInfo/CodeView/CVTypeVisitor.h"<br>
 #include "llvm/DebugInfo/CodeView/CodeView.h"<br>
 #include "llvm/DebugInfo/CodeView/DebugInlineeLinesSubsection.h"<br>
 #include "llvm/DebugInfo/CodeView/Line.h"<br>
 #include "llvm/DebugInfo/CodeView/SymbolRecord.h"<br>
-#include "llvm/DebugInfo/CodeView/TypeDatabase.h"<br>
 #include "llvm/DebugInfo/CodeView/TypeDumpVisitor.h"<br>
 #include "llvm/DebugInfo/CodeView/TypeIndex.h"<br>
 #include "llvm/DebugInfo/CodeView/TypeRecord.h"<br>
 #include "llvm/DebugInfo/CodeView/TypeTableCollection.h"<br>
-#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"<br>
 #include "llvm/IR/Constants.h"<br>
+#include "llvm/IR/DataLayout.h"<br>
+#include "llvm/IR/DebugInfoMetadata.h"<br>
+#include "llvm/IR/DebugLoc.h"<br>
+#include "llvm/IR/Function.h"<br>
+#include "llvm/IR/GlobalValue.h"<br>
+#include "llvm/IR/GlobalVariable.h"<br>
+#include "llvm/IR/Metadata.h"<br>
+#include "llvm/IR/Module.h"<br>
 #include "llvm/MC/MCAsmInfo.h"<br>
-#include "llvm/MC/MCExpr.h"<br>
+#include "llvm/MC/MCContext.h"<br>
 #include "llvm/MC/MCSectionCOFF.h"<br>
+#include "llvm/MC/MCStreamer.h"<br>
 #include "llvm/MC/MCSymbol.h"<br>
-#include "llvm/Support/BinaryByteStream.h"<br>
-#include "llvm/Support/BinaryStreamReader.h"<br>
+#include "llvm/Support/Casting.h"<br>
 #include "llvm/Support/COFF.h"<br>
+#include "llvm/Support/Compiler.h"<br>
+#include "llvm/Support/Dwarf.h"<br>
+#include "llvm/Support/Endian.h"<br>
+#include "llvm/Support/Error.h"<br>
+#include "llvm/Support/ErrorHandling.h"<br>
 #include "llvm/Support/ScopedPrinter.h"<br>
+#include "llvm/Support/SMLoc.h"<br>
 #include "llvm/Target/TargetFrameLowering.h"<br>
+#include "llvm/Target/TargetLoweringObjectFile.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
 #include "llvm/Target/TargetRegisterInfo.h"<br>
 #include "llvm/Target/TargetSubtargetInfo.h"<br>
+#include <algorithm><br>
+#include <cassert><br>
+#include <cctype><br>
+#include <cstddef><br>
+#include <cstdint><br>
+#include <iterator><br>
+#include <limits><br>
+#include <string><br>
+#include <utility><br>
+#include <vector><br>
<br>
 using namespace llvm;<br>
 using namespace llvm::codeview;<br>
<br>
 CodeViewDebug::CodeViewDebug(AsmPrinter *AP)<br>
-    : DebugHandlerBase(AP), OS(*Asm->OutStreamer), Allocator(),<br>
-      TypeTable(Allocator), CurFn(nullptr) {<br>
+    : DebugHandlerBase(AP), OS(*Asm->OutStreamer), TypeTable(Allocator) {<br>
   // If module doesn't have named metadata anchors or COFF debug section<br>
   // is not available, skip any debug info related stuff.<br>
   if (!MMI->getModule()->getNamedMetadata("<a href="http://llvm.dbg.cu" rel="noreferrer" target="_blank">llvm.dbg.cu</a>") ||<br>
@@ -178,7 +221,8 @@ static const DISubprogram *getQualifiedN<br>
 static std::string getQualifiedName(ArrayRef<StringRef> QualifiedNameComponents,<br>
                                     StringRef TypeName) {<br>
   std::string FullyQualifiedName;<br>
-  for (StringRef QualifiedNameComponent : reverse(QualifiedNameComponents)) {<br>
+  for (StringRef QualifiedNameComponent :<br>
+       llvm::reverse(QualifiedNameComponents)) {<br>
     FullyQualifiedName.append(QualifiedNameComponent);<br>
     FullyQualifiedName.append("::");<br>
   }<br>
@@ -571,7 +615,7 @@ static CPUType mapArchToCVCPUType(Triple<br>
   }<br>
 }<br>
<br>
-}  // anonymous namespace<br>
+} // end anonymous namespace<br>
<br>
 void CodeViewDebug::emitCompilerInformation() {<br>
   MCContext &Context = MMI->getContext();<br>
@@ -1581,11 +1625,11 @@ struct llvm::ClassInfo {<br>
     uint64_t BaseOffset;<br>
   };<br>
   // [MemberInfo]<br>
-  typedef std::vector<MemberInfo> MemberList;<br>
+  using MemberList = std::vector<MemberInfo>;<br>
<br>
-  typedef TinyPtrVector<const DISubprogram *> MethodsList;<br>
+  using MethodsList = TinyPtrVector<const DISubprogram *>;<br>
   // MethodName -> MethodsList<br>
-  typedef MapVector<MDString *, MethodsList> MethodsMap;<br>
+  using MethodsMap = MapVector<MDString *, MethodsList>;<br>
<br>
   /// Base classes.<br>
   std::vector<const DIDerivedType *> Inheritance;<br>
@@ -1850,7 +1894,7 @@ CodeViewDebug::lowerRecordFieldList(cons<br>
           translateMethodOptionFlags(SP), VFTableOffset, Name));<br>
       MemberCount++;<br>
     }<br>
-    assert(Methods.size() > 0 && "Empty methods map entry");<br>
+    assert(!Methods.empty() && "Empty methods map entry");<br>
     if (Methods.size() == 1)<br>
       FLBR.writeMemberType(Methods[0]);<br>
     else {<br>
<br>
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.h?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.h?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.h (original)<br>
+++ llvm/trunk/lib/CodeGen/AsmPrinter/CodeViewDebug.h Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===-- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h ----*- C++ -*--===//<br>
+//===- llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h --------------*- C++ -*-===//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -14,29 +14,44 @@<br>
 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_CODEVIEWDEBUG_H<br>
 #define LLVM_LIB_CODEGEN_ASMPRINTER_CODEVIEWDEBUG_H<br>
<br>
+#include "DbgValueHistoryCalculator.h"<br>
 #include "DebugHandlerBase.h"<br>
+#include "llvm/ADT/ArrayRef.h"<br>
 #include "llvm/ADT/DenseMap.h"<br>
-#include "llvm/ADT/StringMap.h"<br>
-#include "llvm/CodeGen/AsmPrinter.h"<br>
-#include "llvm/CodeGen/MachineFunction.h"<br>
-#include "llvm/CodeGen/MachineModuleInfo.h"<br>
+#include "llvm/ADT/DenseSet.h"<br>
+#include "llvm/ADT/MapVector.h"<br>
+#include "llvm/ADT/SetVector.h"<br>
+#include "llvm/ADT/SmallVector.h"<br>
+#include "llvm/DebugInfo/CodeView/CodeView.h"<br>
 #include "llvm/DebugInfo/CodeView/TypeIndex.h"<br>
 #include "llvm/DebugInfo/CodeView/TypeTableBuilder.h"<br>
-#include "llvm/IR/DebugInfo.h"<br>
 #include "llvm/IR/DebugLoc.h"<br>
-#include "llvm/MC/MCStreamer.h"<br>
-#include "llvm/Target/TargetLoweringObjectFile.h"<br>
+#include "llvm/Support/Allocator.h"<br>
+#include "llvm/Support/Compiler.h"<br>
+#include <cstdint><br>
+#include <map><br>
+#include <string><br>
+#include <tuple><br>
+#include <unordered_map><br>
+#include <utility><br>
+#include <vector><br>
<br>
 namespace llvm {<br>
<br>
-class StringRef;<br>
-class LexicalScope;<br>
 struct ClassInfo;<br>
+class StringRef;<br>
+class AsmPrinter;<br>
+class Function;<br>
+class GlobalVariable;<br>
+class MCSectionCOFF;<br>
+class MCStreamer;<br>
+class MCSymbol;<br>
+class MachineFunction;<br>
<br>
 /// \brief Collects and handles line tables information in a CodeView format.<br>
 class LLVM_LIBRARY_VISIBILITY CodeViewDebug : public DebugHandlerBase {<br>
   MCStreamer &OS;<br>
-  llvm::BumpPtrAllocator Allocator;<br>
+  BumpPtrAllocator Allocator;<br>
   codeview::TypeTableBuilder TypeTable;<br>
<br>
   /// Represents the most general definition range.<br>
@@ -110,7 +125,7 @@ class LLVM_LIBRARY_VISIBILITY CodeViewDe<br>
     unsigned LastFileId = 0;<br>
     bool HaveLineInfo = false;<br>
   };<br>
-  FunctionInfo *CurFn;<br>
+  FunctionInfo *CurFn = nullptr;<br>
<br>
   /// The set of comdat .debug$S sections that we've seen so far. Each section<br>
   /// must start with a magic version number that must only be emitted once.<br>
@@ -176,8 +191,9 @@ class LLVM_LIBRARY_VISIBILITY CodeViewDe<br>
   std::vector<std::pair<std::string, codeview::TypeIndex>> LocalUDTs,<br>
       GlobalUDTs;<br>
<br>
-  typedef std::map<const DIFile *, std::string> FileToFilepathMapTy;<br>
+  using FileToFilepathMapTy = std::map<const DIFile *, std::string>;<br>
   FileToFilepathMapTy FileToFilepathMap;<br>
+<br>
   StringRef getFullFilepath(const DIFile *S);<br>
<br>
   unsigned maybeRecordFile(const DIFile *F);<br>
@@ -223,7 +239,7 @@ class LLVM_LIBRARY_VISIBILITY CodeViewDe<br>
   void emitInlinedCallSite(const FunctionInfo &FI, const DILocation *InlinedAt,<br>
                            const InlineSite &Site);<br>
<br>
-  typedef DbgValueHistoryMap::InlinedVariable InlinedVariable;<br>
+  using InlinedVariable = DbgValueHistoryMap::InlinedVariable;<br>
<br>
   void collectVariableInfo(const DISubprogram *SP);<br>
<br>
@@ -309,7 +325,7 @@ protected:<br>
 public:<br>
   CodeViewDebug(AsmPrinter *Asm);<br>
<br>
-  void setSymbolSize(const llvm::MCSymbol *, uint64_t) override {}<br>
+  void setSymbolSize(const MCSymbol *, uint64_t) override {}<br>
<br>
   /// \brief Emit the COFF section that holds the line table information.<br>
   void endModule() override;<br>
@@ -317,6 +333,7 @@ public:<br>
   /// \brief Process beginning of an instruction.<br>
   void beginInstruction(const MachineInstr *MI) override;<br>
 };<br>
-} // End of namespace llvm<br>
<br>
-#endif<br>
+} // end namespace llvm<br>
+<br>
+#endif // LLVM_LIB_CODEGEN_ASMPRINTER_CODEVIEWDEBUG_H<br>
<br>
Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===-- BranchFolding.cpp - Fold machine code branch instructions ---------===//<br>
+//===- BranchFolding.cpp - Fold machine code branch instructions ----------===//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -18,30 +18,46 @@<br>
 //===----------------------------------------------------------------------===//<br>
<br>
 #include "BranchFolding.h"<br>
-#include "llvm/ADT/STLExtras.h"<br>
+#include "llvm/ADT/BitVector.h"<br>
+#include "llvm/ADT/SmallPtrSet.h"<br>
 #include "llvm/ADT/SmallSet.h"<br>
+#include "llvm/ADT/SmallVector.h"<br>
 #include "llvm/ADT/Statistic.h"<br>
+#include "llvm/ADT/STLExtras.h"<br>
 #include "llvm/CodeGen/Analysis.h"<br>
+#include "llvm/CodeGen/MachineBasicBlock.h"<br>
 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"<br>
 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"<br>
+#include "llvm/CodeGen/MachineFunction.h"<br>
 #include "llvm/CodeGen/MachineFunctionPass.h"<br>
+#include "llvm/CodeGen/MachineInstr.h"<br>
 #include "llvm/CodeGen/MachineJumpTableInfo.h"<br>
 #include "llvm/CodeGen/MachineLoopInfo.h"<br>
-#include "llvm/CodeGen/MachineMemOperand.h"<br>
 #include "llvm/CodeGen/MachineModuleInfo.h"<br>
+#include "llvm/CodeGen/MachineOperand.h"<br>
 #include "llvm/CodeGen/MachineRegisterInfo.h"<br>
-#include "llvm/CodeGen/Passes.h"<br>
 #include "llvm/CodeGen/TargetPassConfig.h"<br>
 #include "llvm/IR/DebugInfoMetadata.h"<br>
+#include "llvm/IR/DebugLoc.h"<br>
 #include "llvm/IR/Function.h"<br>
+#include "llvm/MC/MCRegisterInfo.h"<br>
+#include "llvm/Pass.h"<br>
+#include "llvm/Support/BlockFrequency.h"<br>
+#include "llvm/Support/BranchProbability.h"<br>
 #include "llvm/Support/CommandLine.h"<br>
 #include "llvm/Support/Debug.h"<br>
 #include "llvm/Support/ErrorHandling.h"<br>
 #include "llvm/Support/raw_ostream.h"<br>
 #include "llvm/Target/TargetInstrInfo.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
 #include "llvm/Target/TargetRegisterInfo.h"<br>
 #include "llvm/Target/TargetSubtargetInfo.h"<br>
-#include <algorithm><br>
+#include <cassert><br>
+#include <cstddef><br>
+#include <iterator><br>
+#include <numeric><br>
+#include <vector><br>
+<br>
 using namespace llvm;<br>
<br>
 #define DEBUG_TYPE "branch-folder"<br>
@@ -69,10 +85,12 @@ TailMergeSize("tail-merge-size",<br>
                               cl::init(3), cl::Hidden);<br>
<br>
 namespace {<br>
+<br>
   /// BranchFolderPass - Wrap branch folder in a machine function pass.<br>
   class BranchFolderPass : public MachineFunctionPass {<br>
   public:<br>
     static char ID;<br>
+<br>
     explicit BranchFolderPass(): MachineFunctionPass(ID) {}<br>
<br>
     bool runOnMachineFunction(MachineFunction &MF) override;<br>
@@ -84,7 +102,8 @@ namespace {<br>
       MachineFunctionPass::getAnalysisUsage(AU);<br>
     }<br>
   };<br>
-}<br>
+<br>
+} // end anonymous namespace<br>
<br>
 char BranchFolderPass::ID = 0;<br>
 char &llvm::BranchFolderPassID = BranchFolderPass::ID;<br>
@@ -368,7 +387,7 @@ MachineBasicBlock *BranchFolder::SplitMB<br>
<br>
   // Create the fall-through block.<br>
   MachineFunction::iterator MBBI = CurMBB.getIterator();<br>
-  MachineBasicBlock *NewMBB =MF.CreateMachineBasicBlock(BB);<br>
+  MachineBasicBlock *NewMBB = MF.CreateMachineBasicBlock(BB);<br>
   CurMBB.getParent()->insert(++MBBI, NewMBB);<br>
<br>
   // Move all the successors of this block to the specified block.<br>
@@ -506,7 +525,7 @@ static unsigned CountTerminators(Machine<br>
                                  MachineBasicBlock::iterator &I) {<br>
   I = MBB->end();<br>
   unsigned NumTerms = 0;<br>
-  for (;;) {<br>
+  while (true) {<br>
     if (I == MBB->begin()) {<br>
       I = MBB->end();<br>
       break;<br>
@@ -1601,7 +1620,6 @@ ReoptimizeBlock:<br>
   // block doesn't fall through into some other block, see if we can find a<br>
   // place to move this block where a fall-through will happen.<br>
   if (!PrevBB.canFallThrough()) {<br>
-<br>
     // Now we know that there was no fall-through into this block, check to<br>
     // see if it has a fall-through into its successor.<br>
     bool CurFallsThru = MBB->canFallThrough();<br>
<br>
Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Tue Jun  6 17:22:41 2017<br>
@@ -11,11 +11,19 @@<br>
 //<br>
 //===----------------------------------------------------------------------===//<br>
<br>
-#include "MIParser.h"<br>
-<br>
 #include "MILexer.h"<br>
+#include "MIParser.h"<br>
+#include "llvm/ADT/APInt.h"<br>
+#include "llvm/ADT/APSInt.h"<br>
+#include "llvm/ADT/ArrayRef.h"<br>
+#include "llvm/ADT/DenseMap.h"<br>
+#include "llvm/ADT/None.h"<br>
+#include "llvm/ADT/Optional.h"<br>
+#include "llvm/ADT/SmallVector.h"<br>
 #include "llvm/ADT/StringMap.h"<br>
 #include "llvm/ADT/StringSwitch.h"<br>
+#include "llvm/ADT/StringRef.h"<br>
+#include "llvm/ADT/Twine.h"<br>
 #include "llvm/AsmParser/Parser.h"<br>
 #include "llvm/AsmParser/SlotMapping.h"<br>
 #include "llvm/CodeGen/MIRPrinter.h"<br>
@@ -26,19 +34,48 @@<br>
 #include "llvm/CodeGen/MachineInstrBuilder.h"<br>
 #include "llvm/CodeGen/MachineMemOperand.h"<br>
 #include "llvm/CodeGen/MachineModuleInfo.h"<br>
+#include "llvm/CodeGen/MachineOperand.h"<br>
 #include "llvm/CodeGen/MachineRegisterInfo.h"<br>
+#include "llvm/IR/BasicBlock.h"<br>
 #include "llvm/IR/Constants.h"<br>
+#include "llvm/IR/DataLayout.h"<br>
+#include "llvm/IR/DebugLoc.h"<br>
+#include "llvm/IR/Function.h"<br>
+#include "llvm/IR/InstrTypes.h"<br>
 #include "llvm/IR/Instructions.h"<br>
 #include "llvm/IR/Intrinsics.h"<br>
+#include "llvm/IR/Metadata.h"<br>
 #include "llvm/IR/Module.h"<br>
 #include "llvm/IR/ModuleSlotTracker.h"<br>
+#include "llvm/IR/Type.h"<br>
+#include "llvm/IR/Value.h"<br>
 #include "llvm/IR/ValueSymbolTable.h"<br>
+#include "llvm/MC/LaneBitmask.h"<br>
+#include "llvm/MC/MCDwarf.h"<br>
+#include "llvm/MC/MCInstrDesc.h"<br>
+#include "llvm/MC/MCRegisterInfo.h"<br>
+#include "llvm/Support/AtomicOrdering.h"<br>
+#include "llvm/Support/BranchProbability.h"<br>
+#include "llvm/Support/Casting.h"<br>
+#include "llvm/Support/ErrorHandling.h"<br>
+#include "llvm/Support/LowLevelTypeImpl.h"<br>
+#include "llvm/Support/MemoryBuffer.h"<br>
+#include "llvm/Support/SMLoc.h"<br>
 #include "llvm/Support/SourceMgr.h"<br>
 #include "llvm/Support/raw_ostream.h"<br>
 #include "llvm/Target/TargetInstrInfo.h"<br>
 #include "llvm/Target/TargetIntrinsicInfo.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
+#include "llvm/Target/TargetRegisterInfo.h"<br>
 #include "llvm/Target/TargetSubtargetInfo.h"<br>
+#include <algorithm><br>
+#include <cassert><br>
 #include <cctype><br>
+#include <cstddef><br>
+#include <cstdint><br>
+#include <limits><br>
+#include <string><br>
+#include <utility><br>
<br>
 using namespace llvm;<br>
<br>
@@ -2039,7 +2076,7 @@ bool MIParser::parseMemoryPseudoSourceVa<br>
     // The token was already consumed, so use return here instead of break.<br>
     return false;<br>
   }<br>
-  case MIToken::kw_call_entry: {<br>
+  case MIToken::kw_call_entry:<br>
     lex();<br>
     switch (Token.kind()) {<br>
     case MIToken::GlobalValue:<br>
@@ -2059,7 +2096,6 @@ bool MIParser::parseMemoryPseudoSourceVa<br>
           "expected a global value or an external symbol after 'call-entry'");<br>
     }<br>
     break;<br>
-  }<br>
   default:<br>
     llvm_unreachable("The current token should be pseudo source value");<br>
   }<br>
<br>
Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.h?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.h?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.h (original)<br>
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.h Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===- MIParser.h - Machine Instructions Parser ---------------------------===//<br>
+//===- MIParser.h - Machine Instructions Parser -----------------*- C++ -*-===//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -15,21 +15,19 @@<br>
 #define LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H<br>
<br>
 #include "llvm/ADT/DenseMap.h"<br>
-#include "llvm/ADT/SmallSet.h"<br>
+#include "llvm/ADT/StringMap.h"<br>
+#include "llvm/Support/Allocator.h"<br>
<br>
 namespace llvm {<br>
<br>
-class StringRef;<br>
-class BasicBlock;<br>
 class MachineBasicBlock;<br>
 class MachineFunction;<br>
-class MachineInstr;<br>
-class MachineRegisterInfo;<br>
 class MDNode;<br>
 class RegisterBank;<br>
 struct SlotMapping;<br>
 class SMDiagnostic;<br>
 class SourceMgr;<br>
+class StringRef;<br>
 class TargetRegisterClass;<br>
<br>
 struct VRegInfo {<br>
@@ -45,8 +43,8 @@ struct VRegInfo {<br>
   unsigned PreferredReg = 0;<br>
 };<br>
<br>
-typedef StringMap<const TargetRegisterClass*> Name2RegClassMap;<br>
-typedef StringMap<const RegisterBank*> Name2RegBankMap;<br>
+using Name2RegClassMap = StringMap<const TargetRegisterClass *>;<br>
+using Name2RegBankMap = StringMap<const RegisterBank *>;<br>
<br>
 struct PerFunctionMIParsingState {<br>
   BumpPtrAllocator Allocator;<br>
@@ -122,4 +120,4 @@ bool parseMDNode(PerFunctionMIParsingSta<br>
<br>
 } // end namespace llvm<br>
<br>
-#endif<br>
+#endif // LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H<br>
<br>
Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Tue Jun  6 17:22:41 2017<br>
@@ -12,36 +12,65 @@<br>
 //<br>
 //===----------------------------------------------------------------------===//<br>
<br>
-#include "llvm/CodeGen/MIRPrinter.h"<br>
-<br>
-#include "llvm/ADT/STLExtras.h"<br>
+#include "llvm/ADT/DenseMap.h"<br>
+#include "llvm/ADT/None.h"<br>
 #include "llvm/ADT/SmallBitVector.h"<br>
-#include "llvm/ADT/StringExtras.h"<br>
+#include "llvm/ADT/SmallPtrSet.h"<br>
+#include "llvm/ADT/SmallVector.h"<br>
+#include "llvm/ADT/STLExtras.h"<br>
+#include "llvm/ADT/StringRef.h"<br>
+#include "llvm/ADT/Twine.h"<br>
 #include "llvm/CodeGen/GlobalISel/RegisterBank.h"<br>
-#include "llvm/CodeGen/MIRYamlMapping.h"<br>
+#include "llvm/CodeGen/MachineBasicBlock.h"<br>
 #include "llvm/CodeGen/MachineConstantPool.h"<br>
 #include "llvm/CodeGen/MachineFrameInfo.h"<br>
 #include "llvm/CodeGen/MachineFunction.h"<br>
+#include "llvm/CodeGen/MachineInstr.h"<br>
+#include "llvm/CodeGen/MachineJumpTableInfo.h"<br>
 #include "llvm/CodeGen/MachineMemOperand.h"<br>
-#include "llvm/CodeGen/MachineModuleInfo.h"<br>
+#include "llvm/CodeGen/MachineOperand.h"<br>
 #include "llvm/CodeGen/MachineRegisterInfo.h"<br>
+#include "llvm/CodeGen/MIRPrinter.h"<br>
+#include "llvm/CodeGen/MIRYamlMapping.h"<br>
+#include "llvm/CodeGen/PseudoSourceValue.h"<br>
 #include "llvm/IR/BasicBlock.h"<br>
 #include "llvm/IR/Constants.h"<br>
 #include "llvm/IR/DebugInfo.h"<br>
-#include "llvm/IR/IRPrintingPasses.h"<br>
+#include "llvm/IR/DebugLoc.h"<br>
+#include "llvm/IR/Function.h"<br>
+#include "llvm/IR/GlobalValue.h"<br>
+#include "llvm/IR/InstrTypes.h"<br>
 #include "llvm/IR/Instructions.h"<br>
 #include "llvm/IR/Intrinsics.h"<br>
+#include "llvm/IR/IRPrintingPasses.h"<br>
 #include "llvm/IR/Module.h"<br>
 #include "llvm/IR/ModuleSlotTracker.h"<br>
+#include "llvm/IR/Value.h"<br>
+#include "llvm/MC/LaneBitmask.h"<br>
+#include "llvm/MC/MCDwarf.h"<br>
 #include "llvm/MC/MCSymbol.h"<br>
+#include "llvm/Support/AtomicOrdering.h"<br>
+#include "llvm/Support/BranchProbability.h"<br>
+#include "llvm/Support/Casting.h"<br>
+#include "llvm/Support/CommandLine.h"<br>
+#include "llvm/Support/ErrorHandling.h"<br>
 #include "llvm/Support/Format.h"<br>
-#include "llvm/Support/MemoryBuffer.h"<br>
-#include "llvm/Support/Options.h"<br>
-#include "llvm/Support/YAMLTraits.h"<br>
+#include "llvm/Support/LowLevelTypeImpl.h"<br>
 #include "llvm/Support/raw_ostream.h"<br>
+#include "llvm/Support/YAMLTraits.h"<br>
 #include "llvm/Target/TargetInstrInfo.h"<br>
 #include "llvm/Target/TargetIntrinsicInfo.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
+#include "llvm/Target/TargetRegisterInfo.h"<br>
 #include "llvm/Target/TargetSubtargetInfo.h"<br>
+#include <algorithm><br>
+#include <cassert><br>
+#include <cinttypes><br>
+#include <cstdint><br>
+#include <iterator><br>
+#include <string><br>
+#include <utility><br>
+#include <vector><br>
<br>
 using namespace llvm;<br>
<br>
@@ -148,6 +177,7 @@ template <> struct BlockScalarTraits<Mod<br>
   static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {<br>
     Mod.print(OS, nullptr);<br>
   }<br>
+<br>
   static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {<br>
     llvm_unreachable("LLVM Module is supposed to be parsed separately");<br>
     return "";<br>
@@ -519,7 +549,6 @@ bool MIPrinter::canPredictSuccessors(con<br>
   return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());<br>
 }<br>
<br>
-<br>
 void MIPrinter::print(const MachineBasicBlock &MBB) {<br>
   assert(MBB.getNumber() >= 0 && "Invalid MBB number");<br>
   OS << "bb." << MBB.getNumber();<br>
@@ -911,7 +940,7 @@ void MIPrinter::print(const MachineOpera<br>
     OS << "%const." << Op.getIndex();<br>
     printOffset(Op.getOffset());<br>
     break;<br>
-  case MachineOperand::MO_TargetIndex: {<br>
+  case MachineOperand::MO_TargetIndex:<br>
     OS << "target-index(";<br>
     if (const auto *Name = getTargetIndexName(<br>
             *Op.getParent()->getParent()->getParent(), Op.getIndex()))<br>
@@ -921,7 +950,6 @@ void MIPrinter::print(const MachineOpera<br>
     OS << ')';<br>
     printOffset(Op.getOffset());<br>
     break;<br>
-  }<br>
   case MachineOperand::MO_JumpTableIndex:<br>
     OS << "%jump-table." << Op.getIndex();<br>
     break;<br>
<br>
Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===-- RegAllocGreedy.cpp - greedy register allocator --------------------===//<br>
+//===- RegAllocGreedy.cpp - greedy register allocator ---------------------===//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -19,36 +19,63 @@<br>
 #include "SpillPlacement.h"<br>
 #include "Spiller.h"<br>
 #include "SplitKit.h"<br>
+#include "llvm/ADT/ArrayRef.h"<br>
+#include "llvm/ADT/BitVector.h"<br>
+#include "llvm/ADT/DenseMap.h"<br>
+#include "llvm/ADT/IndexedMap.h"<br>
+#include "llvm/ADT/SetVector.h"<br>
+#include "llvm/ADT/SmallPtrSet.h"<br>
+#include "llvm/ADT/SmallSet.h"<br>
+#include "llvm/ADT/SmallVector.h"<br>
 #include "llvm/ADT/Statistic.h"<br>
+#include "llvm/ADT/StringRef.h"<br>
 #include "llvm/Analysis/AliasAnalysis.h"<br>
+#include "llvm/Analysis/OptimizationDiagnosticInfo.h"<br>
 #include "llvm/CodeGen/CalcSpillWeights.h"<br>
 #include "llvm/CodeGen/EdgeBundles.h"<br>
+#include "llvm/CodeGen/LiveInterval.h"<br>
 #include "llvm/CodeGen/LiveIntervalAnalysis.h"<br>
+#include "llvm/CodeGen/LiveIntervalUnion.h"<br>
 #include "llvm/CodeGen/LiveRangeEdit.h"<br>
 #include "llvm/CodeGen/LiveRegMatrix.h"<br>
 #include "llvm/CodeGen/LiveStackAnalysis.h"<br>
+#include "llvm/CodeGen/MachineBasicBlock.h"<br>
 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"<br>
 #include "llvm/CodeGen/MachineDominators.h"<br>
 #include "llvm/CodeGen/MachineFrameInfo.h"<br>
+#include "llvm/CodeGen/MachineFunction.h"<br>
 #include "llvm/CodeGen/MachineFunctionPass.h"<br>
+#include "llvm/CodeGen/MachineInstr.h"<br>
 #include "llvm/CodeGen/MachineLoopInfo.h"<br>
+#include "llvm/CodeGen/MachineOperand.h"<br>
 #include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"<br>
 #include "llvm/CodeGen/MachineRegisterInfo.h"<br>
-#include "llvm/CodeGen/Passes.h"<br>
 #include "llvm/CodeGen/RegAllocRegistry.h"<br>
 #include "llvm/CodeGen/RegisterClassInfo.h"<br>
+#include "llvm/CodeGen/SlotIndexes.h"<br>
 #include "llvm/CodeGen/VirtRegMap.h"<br>
+#include "llvm/IR/Function.h"<br>
 #include "llvm/IR/LLVMContext.h"<br>
-#include "llvm/PassAnalysisSupport.h"<br>
+#include "llvm/MC/MCRegisterInfo.h"<br>
+#include "llvm/Pass.h"<br>
+#include "llvm/Support/BlockFrequency.h"<br>
 #include "llvm/Support/BranchProbability.h"<br>
 #include "llvm/Support/CommandLine.h"<br>
 #include "llvm/Support/Debug.h"<br>
-#include "llvm/Support/ErrorHandling.h"<br>
+#include "llvm/Support/MathExtras.h"<br>
 #include "llvm/Support/Timer.h"<br>
 #include "llvm/Support/raw_ostream.h"<br>
 #include "llvm/Target/TargetInstrInfo.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
+#include "llvm/Target/TargetRegisterInfo.h"<br>
 #include "llvm/Target/TargetSubtargetInfo.h"<br>
+#include <algorithm><br>
+#include <cassert><br>
+#include <cstdint><br>
+#include <memory><br>
 #include <queue><br>
+#include <tuple><br>
+#include <utility><br>
<br>
 using namespace llvm;<br>
<br>
@@ -106,13 +133,14 @@ static RegisterRegAlloc greedyRegAlloc("<br>
                                        createGreedyRegisterAllocator);<br>
<br>
 namespace {<br>
+<br>
 class RAGreedy : public MachineFunctionPass,<br>
                  public RegAllocBase,<br>
                  private LiveRangeEdit::Delegate {<br>
   // Convenient shortcuts.<br>
-  typedef std::priority_queue<std::pair<unsigned, unsigned> > PQueue;<br>
-  typedef SmallPtrSet<LiveInterval *, 4> SmallLISet;<br>
-  typedef SmallSet<unsigned, 16> SmallVirtRegSet;<br>
+  using PQueue = std::priority_queue<std::pair<unsigned, unsigned>>;<br>
+  using SmallLISet = SmallPtrSet<LiveInterval *, 4>;<br>
+  using SmallVirtRegSet = SmallSet<unsigned, 16>;<br>
<br>
   // context<br>
   MachineFunction *MF;<br>
@@ -201,12 +229,12 @@ class RAGreedy : public MachineFunctionP<br>
<br>
   // RegInfo - Keep additional information about each live range.<br>
   struct RegInfo {<br>
-    LiveRangeStage Stage;<br>
+    LiveRangeStage Stage = RS_New;<br>
<br>
     // Cascade - Eviction loop prevention. See canEvictInterference().<br>
-    unsigned Cascade;<br>
+    unsigned Cascade = 0;<br>
<br>
-    RegInfo() : Stage(RS_New), Cascade(0) {}<br>
+    RegInfo() = default;<br>
   };<br>
<br>
   IndexedMap<RegInfo, VirtReg2IndexFunctor> ExtraRegInfo;<br>
@@ -232,10 +260,10 @@ class RAGreedy : public MachineFunctionP<br>
<br>
   /// Cost of evicting interference.<br>
   struct EvictionCost {<br>
-    unsigned BrokenHints; ///< Total number of broken hints.<br>
-    float MaxWeight;      ///< Maximum spill weight evicted.<br>
+    unsigned BrokenHints = 0; ///< Total number of broken hints.<br>
+    float MaxWeight = 0;      ///< Maximum spill weight evicted.<br>
<br>
-    EvictionCost(): BrokenHints(0), MaxWeight(0) {}<br>
+    EvictionCost() = default;<br>
<br>
     bool isMax() const { return BrokenHints == ~0u; }<br>
<br>
@@ -413,10 +441,12 @@ private:<br>
     /// Its currently assigned register.<br>
     /// In case of a physical register Reg == PhysReg.<br>
     unsigned PhysReg;<br>
+<br>
     HintInfo(BlockFrequency Freq, unsigned Reg, unsigned PhysReg)<br>
         : Freq(Freq), Reg(Reg), PhysReg(PhysReg) {}<br>
   };<br>
-  typedef SmallVector<HintInfo, 4> HintsInfo;<br>
+  using HintsInfo = SmallVector<HintInfo, 4>;<br>
+<br>
   BlockFrequency getBrokenHintFreq(const HintsInfo &, unsigned);<br>
   void collectHintInfo(unsigned, HintsInfo &);<br>
<br>
@@ -436,6 +466,7 @@ private:<br>
     }<br>
   }<br>
 };<br>
+<br>
 } // end anonymous namespace<br>
<br>
 char RAGreedy::ID = 0;<br>
@@ -475,7 +506,6 @@ const char *const RAGreedy::StageName[]<br>
 // This helps stabilize decisions based on float comparisons.<br>
 const float Hysteresis = (2007 / 2048.0f); // 0.97998046875<br>
<br>
-<br>
 FunctionPass* llvm::createGreedyRegisterAllocator() {<br>
   return new RAGreedy();<br>
 }<br>
@@ -511,7 +541,6 @@ void RAGreedy::getAnalysisUsage(Analysis<br>
   MachineFunctionPass::getAnalysisUsage(AU);<br>
 }<br>
<br>
-<br>
 //===----------------------------------------------------------------------===//<br>
 //                     LiveRangeEdit delegate methods<br>
 //===----------------------------------------------------------------------===//<br>
@@ -634,7 +663,6 @@ LiveInterval *RAGreedy::dequeue(PQueue &<br>
   return LI;<br>
 }<br>
<br>
-<br>
 //===----------------------------------------------------------------------===//<br>
 //                            Direct Assignment<br>
 //===----------------------------------------------------------------------===//<br>
@@ -682,7 +710,6 @@ unsigned RAGreedy::tryAssign(LiveInterva<br>
   return CheapReg ? CheapReg : PhysReg;<br>
 }<br>
<br>
-<br>
 //===----------------------------------------------------------------------===//<br>
 //                         Interference eviction<br>
 //===----------------------------------------------------------------------===//<br>
@@ -954,7 +981,6 @@ unsigned RAGreedy::tryEvict(LiveInterval<br>
   return BestPhys;<br>
 }<br>
<br>
-<br>
 //===----------------------------------------------------------------------===//<br>
 //                              Region Splitting<br>
 //===----------------------------------------------------------------------===//<br>
@@ -1025,7 +1051,6 @@ bool RAGreedy::addSplitConstraints(Inter<br>
   return SpillPlacer->scanActiveBundles();<br>
 }<br>
<br>
-<br>
 /// addThroughConstraints - Add constraints and links to SpillPlacer from the<br>
 /// live-through blocks in Blocks.<br>
 void RAGreedy::addThroughConstraints(InterferenceCache::Cursor Intf,<br>
@@ -1083,7 +1108,7 @@ void RAGreedy::growRegion(GlobalSplitCan<br>
   unsigned Visited = 0;<br>
 #endif<br>
<br>
-  for (;;) {<br>
+  while (true) {<br>
     ArrayRef<unsigned> NewBundles = SpillPlacer->getRecentPositive();<br>
     // Find new through blocks in the periphery of PrefRegBundles.<br>
     for (int i = 0, e = NewBundles.size(); i != e; ++i) {<br>
@@ -1197,8 +1222,8 @@ BlockFrequency RAGreedy::calcGlobalSplit<br>
   for (unsigned i = 0; i != UseBlocks.size(); ++i) {<br>
     const SplitAnalysis::BlockInfo &BI = UseBlocks[i];<br>
     SpillPlacement::BlockConstraint &BC = SplitConstraints[i];<br>
-    bool RegIn  = LiveBundles[Bundles->getBundle(BC.Number, 0)];<br>
-    bool RegOut = LiveBundles[Bundles->getBundle(BC.Number, 1)];<br>
+    bool RegIn  = LiveBundles[Bundles->getBundle(BC.Number, false)];<br>
+    bool RegOut = LiveBundles[Bundles->getBundle(BC.Number, true)];<br>
     unsigned Ins = 0;<br>
<br>
     if (BI.LiveIn)<br>
@@ -1211,8 +1236,8 @@ BlockFrequency RAGreedy::calcGlobalSplit<br>
<br>
   for (unsigned i = 0, e = Cand.ActiveBlocks.size(); i != e; ++i) {<br>
     unsigned Number = Cand.ActiveBlocks[i];<br>
-    bool RegIn  = LiveBundles[Bundles->getBundle(Number, 0)];<br>
-    bool RegOut = LiveBundles[Bundles->getBundle(Number, 1)];<br>
+    bool RegIn  = LiveBundles[Bundles->getBundle(Number, false)];<br>
+    bool RegOut = LiveBundles[Bundles->getBundle(Number, true)];<br>
     if (!RegIn && !RegOut)<br>
       continue;<br>
     if (RegIn && RegOut) {<br>
@@ -1264,7 +1289,7 @@ void RAGreedy::splitAroundRegion(LiveRan<br>
     unsigned IntvIn = 0, IntvOut = 0;<br>
     SlotIndex IntfIn, IntfOut;<br>
     if (BI.LiveIn) {<br>
-      unsigned CandIn = BundleCand[Bundles->getBundle(Number, 0)];<br>
+      unsigned CandIn = BundleCand[Bundles->getBundle(Number, false)];<br>
       if (CandIn != NoCand) {<br>
         GlobalSplitCandidate &Cand = GlobalCand[CandIn];<br>
         IntvIn = Cand.IntvIdx;<br>
@@ -1273,7 +1298,7 @@ void RAGreedy::splitAroundRegion(LiveRan<br>
       }<br>
     }<br>
     if (BI.LiveOut) {<br>
-      unsigned CandOut = BundleCand[Bundles->getBundle(Number, 1)];<br>
+      unsigned CandOut = BundleCand[Bundles->getBundle(Number, true)];<br>
       if (CandOut != NoCand) {<br>
         GlobalSplitCandidate &Cand = GlobalCand[CandOut];<br>
         IntvOut = Cand.IntvIdx;<br>
@@ -1313,7 +1338,7 @@ void RAGreedy::splitAroundRegion(LiveRan<br>
       unsigned IntvIn = 0, IntvOut = 0;<br>
       SlotIndex IntfIn, IntfOut;<br>
<br>
-      unsigned CandIn = BundleCand[Bundles->getBundle(Number, 0)];<br>
+      unsigned CandIn = BundleCand[Bundles->getBundle(Number, false)];<br>
       if (CandIn != NoCand) {<br>
         GlobalSplitCandidate &Cand = GlobalCand[CandIn];<br>
         IntvIn = Cand.IntvIdx;<br>
@@ -1321,7 +1346,7 @@ void RAGreedy::splitAroundRegion(LiveRan<br>
         IntfIn = Cand.Intf.first();<br>
       }<br>
<br>
-      unsigned CandOut = BundleCand[Bundles->getBundle(Number, 1)];<br>
+      unsigned CandOut = BundleCand[Bundles->getBundle(Number, true)];<br>
       if (CandOut != NoCand) {<br>
         GlobalSplitCandidate &Cand = GlobalCand[CandOut];<br>
         IntvOut = Cand.IntvIdx;<br>
@@ -1533,7 +1558,6 @@ unsigned RAGreedy::doRegionSplit(LiveInt<br>
   return 0;<br>
 }<br>
<br>
-<br>
 //===----------------------------------------------------------------------===//<br>
 //                            Per-Block Splitting<br>
 //===----------------------------------------------------------------------===//<br>
@@ -1580,7 +1604,6 @@ unsigned RAGreedy::tryBlockSplit(LiveInt<br>
   return 0;<br>
 }<br>
<br>
-<br>
 //===----------------------------------------------------------------------===//<br>
 //                         Per-Instruction Splitting<br>
 //===----------------------------------------------------------------------===//<br>
@@ -1664,12 +1687,10 @@ RAGreedy::tryInstructionSplit(LiveInterv<br>
   return 0;<br>
 }<br>
<br>
-<br>
 //===----------------------------------------------------------------------===//<br>
 //                             Local Splitting<br>
 //===----------------------------------------------------------------------===//<br>
<br>
-<br>
 /// calcGapWeights - Compute the maximum spill weight that needs to be evicted<br>
 /// in order to use PhysReg between two entries in SA->UseSlots.<br>
 ///<br>
@@ -1740,7 +1761,7 @@ void RAGreedy::calcGapWeights(unsigned P<br>
         break;<br>
<br>
       for (; Gap != NumGaps; ++Gap) {<br>
-        GapWeight[Gap] = llvm::huge_valf;<br>
+        GapWeight[Gap] = huge_valf;<br>
         if (Uses[Gap+1].getBaseIndex() >= I->end)<br>
           break;<br>
       }<br>
@@ -1846,7 +1867,7 @@ unsigned RAGreedy::tryLocalSplit(LiveInt<br>
     // Remove any gaps with regmask clobbers.<br>
     if (Matrix->checkRegMaskInterference(VirtReg, PhysReg))<br>
       for (unsigned i = 0, e = RegMaskGaps.size(); i != e; ++i)<br>
-        GapWeight[RegMaskGaps[i]] = llvm::huge_valf;<br>
+        GapWeight[RegMaskGaps[i]] = huge_valf;<br>
<br>
     // Try to find the best sequence of gaps to close.<br>
     // The new spill weight must be larger than any gap interference.<br>
@@ -1858,7 +1879,7 @@ unsigned RAGreedy::tryLocalSplit(LiveInt<br>
     // It is the spill weight that needs to be evicted.<br>
     float MaxGap = GapWeight[0];<br>
<br>
-    for (;;) {<br>
+    while (true) {<br>
       // Live before/after split?<br>
       const bool LiveBefore = SplitBefore != 0 || BI.LiveIn;<br>
       const bool LiveAfter = SplitAfter != NumGaps || BI.LiveOut;<br>
@@ -1881,7 +1902,7 @@ unsigned RAGreedy::tryLocalSplit(LiveInt<br>
       // Legally, without causing looping?<br>
       bool Legal = !ProgressRequired || NewGaps < NumGaps;<br>
<br>
-      if (Legal && MaxGap < llvm::huge_valf) {<br>
+      if (Legal && MaxGap < huge_valf) {<br>
         // Estimate the new spill weight. Each instruction reads or writes the<br>
         // register. Conservatively assume there are no read-modify-write<br>
         // instructions.<br>
@@ -2680,6 +2701,7 @@ void RAGreedy::reportNumberOfSplillsRelo<br>
<br>
   if (Reloads || FoldedReloads || Spills || FoldedSpills) {<br>
     using namespace ore;<br>
+<br>
     MachineOptimizationRemarkMissed R(DEBUG_TYPE, "LoopSpillReload",<br>
                                       L->getStartLoc(), L->getHeader());<br>
     if (Spills)<br>
<br>
Modified: llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/RegisterUsageInfo.cpp Tue Jun  6 17:22:41 2017<br>
@@ -12,11 +12,22 @@<br>
 ///<br>
 //===----------------------------------------------------------------------===//<br>
<br>
+#include "llvm/ADT/SmallVector.h"<br>
 #include "llvm/CodeGen/RegisterUsageInfo.h"<br>
 #include "llvm/CodeGen/MachineOperand.h"<br>
+#include "llvm/IR/Function.h"<br>
 #include "llvm/IR/Module.h"<br>
-#include "llvm/Support/Debug.h"<br>
+#include "llvm/Pass.h"<br>
+#include "llvm/Support/CommandLine.h"<br>
 #include "llvm/Support/raw_ostream.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
+#include "llvm/Target/TargetRegisterInfo.h"<br>
+#include "llvm/Target/TargetSubtargetInfo.h"<br>
+#include <algorithm><br>
+#include <cassert><br>
+#include <cstdint><br>
+#include <utility><br>
+#include <vector><br>
<br>
 using namespace llvm;<br>
<br>
@@ -63,7 +74,7 @@ PhysicalRegisterUsageInfo::getRegUsageIn<br>
 void PhysicalRegisterUsageInfo::print(raw_ostream &OS, const Module *M) const {<br>
   const TargetRegisterInfo *TRI;<br>
<br>
-  typedef std::pair<const Function *, std::vector<uint32_t>> FuncPtrRegMaskPair;<br>
+  using FuncPtrRegMaskPair = std::pair<const Function *, std::vector<uint32_t>>;<br>
<br>
   SmallVector<const FuncPtrRegMaskPair *, 64> FPRMPairVector;<br>
<br>
<br>
Modified: llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/TargetFrameLoweringImpl.cpp Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===----- TargetFrameLoweringImpl.cpp - Implement target frame interface --==//<br>
+//===- TargetFrameLoweringImpl.cpp - Implement target frame interface ------==//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -14,19 +14,21 @@<br>
 #include "llvm/ADT/BitVector.h"<br>
 #include "llvm/CodeGen/MachineFrameInfo.h"<br>
 #include "llvm/CodeGen/MachineFunction.h"<br>
-#include "llvm/CodeGen/MachineModuleInfo.h"<br>
 #include "llvm/CodeGen/MachineRegisterInfo.h"<br>
-#include "llvm/CodeGen/TargetPassConfig.h"<br>
+#include "llvm/IR/Attributes.h"<br>
 #include "llvm/IR/CallingConv.h"<br>
 #include "llvm/IR/Function.h"<br>
+#include "llvm/MC/MCRegisterInfo.h"<br>
+#include "llvm/Support/Compiler.h"<br>
 #include "llvm/Target/TargetFrameLowering.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
+#include "llvm/Target/TargetOptions.h"<br>
 #include "llvm/Target/TargetRegisterInfo.h"<br>
 #include "llvm/Target/TargetSubtargetInfo.h"<br>
-#include <cstdlib><br>
+<br>
 using namespace llvm;<br>
<br>
-TargetFrameLowering::~TargetFrameLowering() {<br>
-}<br>
+TargetFrameLowering::~TargetFrameLowering() = default;<br>
<br>
 /// The default implementation just looks at attribute "no-frame-pointer-elim".<br>
 bool TargetFrameLowering::noFramePointerElim(const MachineFunction &MF) const {<br>
<br>
Modified: llvm/trunk/lib/CodeGen/XRayInstrumentation.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/XRayInstrumentation.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/XRayInstrumentation.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/XRayInstrumentation.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/XRayInstrumentation.cpp Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===-- XRayInstrumentation.cpp - Adds XRay instrumentation to functions. -===//<br>
+//===- XRayInstrumentation.cpp - Adds XRay instrumentation to functions. --===//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -14,20 +14,26 @@<br>
 //<br>
 //===---------------------------------------------------------------------===//<br>
<br>
-#include "llvm/CodeGen/Analysis.h"<br>
+#include "llvm/ADT/SmallVector.h"<br>
+#include "llvm/ADT/STLExtras.h"<br>
+#include "llvm/ADT/Triple.h"<br>
+#include "llvm/CodeGen/MachineBasicBlock.h"<br>
 #include "llvm/CodeGen/MachineDominators.h"<br>
 #include "llvm/CodeGen/MachineFunction.h"<br>
 #include "llvm/CodeGen/MachineFunctionPass.h"<br>
 #include "llvm/CodeGen/MachineInstrBuilder.h"<br>
 #include "llvm/CodeGen/MachineLoopInfo.h"<br>
-#include "llvm/CodeGen/Passes.h"<br>
-#include "llvm/Support/TargetRegistry.h"<br>
+#include "llvm/IR/Attributes.h"<br>
+#include "llvm/IR/Function.h"<br>
+#include "llvm/Pass.h"<br>
 #include "llvm/Target/TargetInstrInfo.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
 #include "llvm/Target/TargetSubtargetInfo.h"<br>
<br>
 using namespace llvm;<br>
<br>
 namespace {<br>
+<br>
 struct XRayInstrumentation : public MachineFunctionPass {<br>
   static char ID;<br>
<br>
@@ -66,7 +72,8 @@ private:<br>
   void prependRetWithPatchableExit(MachineFunction &MF,<br>
                                    const TargetInstrInfo *TII);<br>
 };<br>
-} // anonymous namespace<br>
+<br>
+} // end anonymous namespace<br>
<br>
 void XRayInstrumentation::replaceRetWithPatchableRet(<br>
     MachineFunction &MF, const TargetInstrInfo *TII) {<br>
@@ -144,8 +151,8 @@ bool XRayInstrumentation::runOnMachineFu<br>
<br>
   // We look for the first non-empty MachineBasicBlock, so that we can insert<br>
   // the function instrumentation in the appropriate place.<br>
-  auto MBI =<br>
-      find_if(MF, [&](const MachineBasicBlock &MBB) { return !MBB.empty(); });<br>
+  auto MBI = llvm::find_if(<br>
+      MF, [&](const MachineBasicBlock &MBB) { return !MBB.empty(); });<br>
   if (MBI == MF.end())<br>
     return false; // The function is empty.<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp?rev=304839&r1=304838&r2=304839&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp?rev=304839&r1=304838&r2=304839&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp Tue Jun  6 17:22:41 2017<br>
@@ -1,4 +1,4 @@<br>
-//===-- Thumb2InstrInfo.cpp - Thumb-2 Instruction Information -------------===//<br>
+//===- Thumb2InstrInfo.cpp - Thumb-2 Instruction Information --------------===//<br>
 //<br>
 //                     The LLVM Compiler Infrastructure<br>
 //<br>
@@ -11,16 +11,26 @@<br>
 //<br>
 //===----------------------------------------------------------------------===//<br>
<br>
-#include "Thumb2InstrInfo.h"<br>
-#include "ARMConstantPoolValue.h"<br>
 #include "ARMMachineFunctionInfo.h"<br>
 #include "MCTargetDesc/ARMAddressingModes.h"<br>
+#include "Thumb2InstrInfo.h"<br>
+#include "llvm/CodeGen/MachineBasicBlock.h"<br>
 #include "llvm/CodeGen/MachineFrameInfo.h"<br>
+#include "llvm/CodeGen/MachineFunction.h"<br>
+#include "llvm/CodeGen/MachineInstr.h"<br>
 #include "llvm/CodeGen/MachineInstrBuilder.h"<br>
 #include "llvm/CodeGen/MachineMemOperand.h"<br>
+#include "llvm/CodeGen/MachineOperand.h"<br>
 #include "llvm/CodeGen/MachineRegisterInfo.h"<br>
+#include "llvm/IR/DebugLoc.h"<br>
 #include "llvm/MC/MCInst.h"<br>
+#include "llvm/MC/MCInstrDesc.h"<br>
 #include "llvm/Support/CommandLine.h"<br>
+#include "llvm/Support/ErrorHandling.h"<br>
+#include "llvm/Support/MathExtras.h"<br>
+#include "llvm/Target/TargetMachine.h"<br>
+#include "llvm/Target/TargetRegisterInfo.h"<br>
+#include <cassert><br>
<br>
 using namespace llvm;<br>
<br>
@@ -30,7 +40,7 @@ OldT2IfCvt("old-thumb2-ifcvt", cl::Hidde<br>
            cl::init(false));<br>
<br>
 Thumb2InstrInfo::Thumb2InstrInfo(const ARMSubtarget &STI)<br>
-    : ARMBaseInstrInfo(STI), RI() {}<br>
+    : ARMBaseInstrInfo(STI) {}<br>
<br>
 /// Return the noop instruction to use for a noop.<br>
 void Thumb2InstrInfo::getNoop(MCInst &NopInst) const {<br>
@@ -539,9 +549,7 @@ bool llvm::rewriteT2FrameIndex(MachineIn<br>
     // Add cc_out operand if the original instruction did not have one.<br>
     if (!HasCCOut)<br>
       MI.addOperand(MachineOperand::CreateReg(0, false));<br>
-<br>
   } else {<br>
-<br>
     // AddrMode4 and AddrMode6 cannot handle any offset.<br>
     if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6)<br>
       return false;<br>
<br>
<br>
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</blockquote></div></div>