<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">I haven't tried with -fsanitize=memory. My build is using -fsanitize=address.<div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On 22 May 2017, at 10:20, Vitaly Buka <<a href="mailto:vitalybuka@google.com" class="">vitalybuka@google.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">Did you check <span style="font-size:12.8px" class="">AArch64InstructionSelector.cpp</span> with -fsanitize=memory?</div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Mon, May 22, 2017 at 2:15 AM, Daniel Sanders <span dir="ltr" class=""><<a href="mailto:daniel_l_sanders@apple.com" target="_blank" class="">daniel_l_sanders@apple.com</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div style="word-wrap:break-word;line-break:after-white-space" class="">A compile time regression is to be expected since this commit triples the number of rules that get imported from SelectionDAG but I agree that if it's causing buildbots to fail then it's much too high. It's weird that I don't get this degree of regression though. 'ninja' was a matter of seconds for me last week and I've just repeated that result this morning. The memory regression is also ~18MB for me rather than the ~800MB you're seeing.<div class=""><br class=""></div><div class="">I commented on llvm-dev that there's an easy change that should significantly improve it. I'll look into this.<div class=""><div class="h5"><br class=""><div class=""><br class=""><blockquote type="cite" class=""><div class="">On 21 May 2017, at 11:12, Vitaly Buka <<a href="mailto:vitalybuka@google.com" target="_blank" class="">vitalybuka@google.com</a>> wrote:</div><br class="m_-3885952845627901399Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div class="">We probably should revert this and investigate compile time regression.<br class=""></div><div class=""><br class=""></div>I noticed that starting from <a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/1360" target="_blank" class="">http://lab.llvm.org:8011/<wbr class="">builders/sanitizer-x86_64-<wbr class="">linux-bootstrap/builds/1360</a> "build clang/msan" sometimes hangs.<br class=""><div class=""><br class=""></div><div class="">I bisected on my workstation using:</div>BUILDBOT_CLOBBER=1 BUILDBOT_REVISION=303341  llvm/projects/zorg/zorg/<wbr class="">buildbot/builders/sanitizers/<wbr class="">buildbot_bootstrap.sh<div class=""><br class=""></div><div class="">I noticed consistent regression on r303341. Time of "build clang/msan" increased from 8.5 min to 20 min (on 24 cores). r303341 spends a lot of time compiling just 3 files. Also I was able to reproduce this difference on ToT reverting r303341.</div><div class=""><br class=""></div><div class="">One of the slow commands of "build clang/msan" is below.<br class=""></div><div class="">ToT takes 13.5 min to compile it and about 1.5Gb of RAM.</div><div class="">"ToT without r303341 (reverted)" takes just 1.2 min to compile and about 0.7Gb of RAM.</div><div class=""><br class=""></div><div class="">Also after removing -fsanitize=memory difference is about 1.4 min vs 0.3 min.</div><div class=""><br class=""></div><div class="">/tmp/bot/llvm_build0/bin/<wbr class="">clang-5.0 -cc1 -triple x86_64-unknown-linux-gnu -emit-obj -disable-free -main-file-name AArch64InstructionSelector.cpp -mrelocation-model pic -pic-level 2 -mthread-model posix -mdisable-fp-elim -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu x86-64 -momit-leaf-frame-pointer -dwarf-column-info -debug-info-kind=line-tables-<wbr class="">only -dwarf-version=4 -debugger-tuning=gdb -ffunction-sections -fdata-sections -coverage-notes-file /tmp/bot/llvm_build_msan/lib/<wbr class="">Target/AArch64/CMakeFiles/<wbr class="">LLVMAArch64CodeGen.dir/<wbr class="">AArch64InstructionSelector.<wbr class="">cpp.gcno -nostdinc++ -resource-dir /tmp/bot/llvm_build0/lib/<wbr class="">clang/5.0.0 -dependency-file lib/Target/AArch64/CMakeFiles/<wbr class="">LLVMAArch64CodeGen.dir/<wbr class="">AArch64InstructionSelector.<wbr class="">cpp.o.d -sys-header-deps -MT lib/Target/AArch64/CMakeFiles/<wbr class="">LLVMAArch64CodeGen.dir/<wbr class="">AArch64InstructionSelector.<wbr class="">cpp.o -isystem /tmp/bot/libcxx_build_msan/<wbr class="">include -isystem /tmp/bot/libcxx_build_msan/<wbr class="">include/c++/v1 -D GTEST_HAS_RTTI=0 -D LLVM_BUILD_GLOBAL_ISEL -D _DEBUG -D _GNU_SOURCE -D __STDC_CONSTANT_MACROS -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -I lib/Target/AArch64 -I /tmp/bot/llvm/lib/Target/<wbr class="">AArch64 -I include -I /tmp/bot/llvm/include -U NDEBUG -internal-isystem /usr/local/include -internal-isystem /tmp/bot/llvm_build0/lib/<wbr class="">clang/5.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O3 -Werror=date-time -Wall -W -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -Wno-long-long -Wcovered-switch-default -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wstring-conversion -pedantic -w -std=c++11 -fdeprecated-macro -fdebug-compilation-dir /tmp/bot/llvm_build_msan -ferror-limit 19 -fmessage-length 0 -fvisibility-inlines-hidden -fsanitize=memory -fsanitize-blacklist=/tmp/bot/<wbr class="">llvm_build0/lib/clang/5.0.0/<wbr class="">msan_blacklist.txt -fno-assume-sane-operator-new -fno-rtti -fobjc-runtime=gcc -fdiagnostics-show-option -fcolor-diagnostics -vectorize-loops -vectorize-slp -o lib/Target/AArch64/CMakeFiles/<wbr class="">LLVMAArch64CodeGen.dir/<wbr class="">AArch64InstructionSelector.<wbr class="">cpp.o -x c++ /tmp/bot/llvm/lib/Target/<wbr class="">AArch64/<wbr class="">AArch64InstructionSelector.cpp<br class=""></div><div class=""><br class=""></div><div class=""><br class=""></div></div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Thu, May 18, 2017 at 3:33 AM, Daniel Sanders via llvm-commits <span dir="ltr" class=""><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank" class="">llvm-commits@lists.llvm.org</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: dsanders<br class="">
Date: Thu May 18 05:33:36 2017<br class="">
New Revision: 303341<br class="">
<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=303341&view=rev" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-pr<wbr class="">oject?rev=303341&view=rev</a><br class="">
Log:<br class="">
Re-commit: [globalisel][tablegen] Import rules containing intrinsic_wo_chain.<br class="">
<br class="">
Summary:<br class="">
As of this patch, 1018 out of 3938 rules are currently imported.<br class="">
<br class="">
Depends on D32275<br class="">
<br class="">
Reviewers: qcolombet, kristof.beyls, rovka, t.p.northover, ab, aditya_nandakumar<br class="">
<br class="">
Reviewed By: qcolombet<br class="">
<br class="">
Subscribers: dberris, igorb, llvm-commits<br class="">
<br class="">
Differential Revision: <a href="https://reviews.llvm.org/D32278" rel="noreferrer" target="_blank" class="">https://reviews.llvm.org/D3227<wbr class="">8</a><br class="">
<br class="">
The previous commit failed on test-suite/Bitcode/simd_ops/AA<wbr class="">rch64_halide_runtime.bc<br class="">
because isImmOperandEqual() assumed MO was a register operand and that's not<br class="">
always true.<br class="">
<br class="">
<br class="">
Modified:<br class="">
    llvm/trunk/include/llvm/Target<wbr class="">/GlobalISel/SelectionDAGCompat<wbr class="">.td<br class="">
    llvm/trunk/lib/CodeGen/GlobalI<wbr class="">Sel/InstructionSelector.cpp<br class="">
    llvm/trunk/test/TableGen/Globa<wbr class="">lISelEmitter.td<br class="">
    llvm/trunk/utils/TableGen/Glob<wbr class="">alISelEmitter.cpp<br class="">
<br class="">
Modified: llvm/trunk/include/llvm/Target<wbr class="">/GlobalISel/SelectionDAGCompat<wbr class="">.td<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/GlobalISel/SelectionDAGCompat.td?rev=303341&r1=303340&r2=303341&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-pr<wbr class="">oject/llvm/trunk/include/llvm/<wbr class="">Target/GlobalISel/SelectionDAG<wbr class="">Compat.td?rev=303341&r1=<wbr class="">303340&r2=303341&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/include/llvm/Target<wbr class="">/GlobalISel/SelectionDAGCompat<wbr class="">.td (original)<br class="">
+++ llvm/trunk/include/llvm/Target<wbr class="">/GlobalISel/SelectionDAGCompat<wbr class="">.td Thu May 18 05:33:36 2017<br class="">
@@ -62,6 +62,7 @@ def : GINodeEquiv<G_FMUL, fmul>;<br class="">
 def : GINodeEquiv<G_FDIV, fdiv>;<br class="">
 def : GINodeEquiv<G_FREM, frem>;<br class="">
 def : GINodeEquiv<G_FPOW, fpow>;<br class="">
+def : GINodeEquiv<G_INTRINSIC, intrinsic_wo_chain>;<br class="">
 def : GINodeEquiv<G_BR, br>;<br class="">
<br class="">
 // Specifies the GlobalISel equivalents for SelectionDAG's ComplexPattern.<br class="">
<br class="">
Modified: llvm/trunk/lib/CodeGen/GlobalI<wbr class="">Sel/InstructionSelector.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelector.cpp?rev=303341&r1=303340&r2=303341&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-pr<wbr class="">oject/llvm/trunk/lib/CodeGen/<wbr class="">GlobalISel/InstructionSelector<wbr class="">.cpp?rev=303341&r1=303340&r2=<wbr class="">303341&view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/lib/CodeGen/GlobalI<wbr class="">Sel/InstructionSelector.cpp (original)<br class="">
+++ llvm/trunk/lib/CodeGen/GlobalI<wbr class="">Sel/InstructionSelector.cpp Thu May 18 05:33:36 2017<br class="">
@@ -73,7 +73,7 @@ bool InstructionSelector::isOperand<wbr class="">ImmEq<br class="">
     const MachineOperand &MO, int64_t Value,<br class="">
     const MachineRegisterInfo &MRI) const {<br class="">
<br class="">
-  if (MO.getReg())<br class="">
+  if (MO.isReg() && MO.getReg())<br class="">
     if (auto VRegVal = getConstantVRegVal(MO.getReg()<wbr class="">, MRI))<br class="">
       return *VRegVal == Value;<br class="">
   return false;<br class="">
<br class="">
Modified: llvm/trunk/test/TableGen/Globa<wbr class="">lISelEmitter.td<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/GlobalISelEmitter.td?rev=303341&r1=303340&r2=303341&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-pr<wbr class="">oject/llvm/trunk/test/TableGen<wbr class="">/GlobalISelEmitter.td?rev=<wbr class="">303341&r1=303340&r2=303341&<wbr class="">view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/test/TableGen/Globa<wbr class="">lISelEmitter.td (original)<br class="">
+++ llvm/trunk/test/TableGen/Globa<wbr class="">lISelEmitter.td Thu May 18 05:33:36 2017<br class="">
@@ -7,6 +7,10 @@ include "llvm/Target/Target.td"<br class="">
 def MyTargetISA : InstrInfo;<br class="">
 def MyTarget : Target { let InstructionSet = MyTargetISA; }<br class="">
<br class="">
+let TargetPrefix = "mytarget" in {<br class="">
+def int_mytarget_nop : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;<br class="">
+}<br class="">
+<br class="">
 def R0 : Register<"r0"> { let Namespace = "MyTarget"; }<br class="">
 def GPR32 : RegisterClass<"MyTarget", [i32], 32, (add R0)>;<br class="">
 def GPR32Op : RegisterOperand<GPR32>;<br class="">
@@ -127,6 +131,37 @@ def : Pat<(select GPR32:$src1, complex:$<br class="">
 def ADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2),<br class="">
             [(set GPR32:$dst, (add GPR32:$src1, GPR32:$src2))]>;<br class="">
<br class="">
+//===- Test a simple pattern with an intrinsic. ---------------------------===<wbr class="">//<br class="">
+//<br class="">
+<br class="">
+// CHECK-LABEL: if ([&]() {<br class="">
+// CHECK-NEXT:    MachineInstr &MI0 = I;<br class="">
+// CHECK-NEXT:    if (MI0.getNumOperands() < 3)<br class="">
+// CHECK-NEXT:      return false;<br class="">
+// CHECK-NEXT:    if ((MI0.getOpcode() == TargetOpcode::G_INTRINSIC) &&<br class="">
+// CHECK-NEXT:        ((/* dst */ (MRI.getType(MI0.getOperand(0)<wbr class="">.getReg()) == (LLT::scalar(32))) &&<br class="">
+// CHECK-NEXT:         ((&RBI.<wbr class="">getRegBankFromRegClass(MyTarge<wbr class="">t::GPR32RegClass) == RBI.getRegBank(MI0.getOperand(<wbr class="">0).getReg(), MRI, TRI))))) &&<br class="">
+// CHECK-NEXT:        ((/* Operand 1 */ (isOperandImmEqual(MI0.getOper<wbr class="">and(1), [[ID:[0-9]+]], MRI)))) &&<br class="">
+// CHECK-NEXT:        ((/* src1 */ (MRI.getType(MI0.getOperand(2)<wbr class="">.getReg()) == (LLT::scalar(32))) &&<br class="">
+// CHECK-NEXT:         ((&RBI.<wbr class="">getRegBankFromRegClass(MyTarge<wbr class="">t::GPR32RegClass) == RBI.getRegBank(MI0.getOperand(<wbr class="">2).getReg(), MRI, TRI)))))) {<br class="">
+// CHECK-NEXT:      // (intrinsic_wo_chain:i32 [[ID]]:iPTR, GPR32:i32:$src1) => (MOV:i32 GPR32:i32:$src1)<br class="">
+// CHECK-NEXT:      MachineInstrBuilder MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(MyTarget::MOV));<br class="">
+// CHECK-NEXT:      MIB.add(MI0.getOperand(0)/*dst<wbr class="">*/);<br class="">
+// CHECK-NEXT:      MIB.add(MI0.getOperand(2)/*src<wbr class="">1*/);<br class="">
+// CHECK-NEXT:      for (const auto *FromMI : {&MI0, })<br class="">
+// CHECK-NEXT:        for (const auto &MMO : FromMI->memoperands())<br class="">
+// CHECK-NEXT:          MIB.addMemOperand(MMO);<br class="">
+// CHECK-NEXT:      I.eraseFromParent();<br class="">
+// CHECK-NEXT:      MachineInstr &NewI = *MIB;<br class="">
+// CHECK-NEXT:      constrainSelectedInstRegOperan<wbr class="">ds(NewI, TII, TRI, RBI);<br class="">
+// CHECK-NEXT:      return true;<br class="">
+// CHECK-NEXT:    }<br class="">
+// CHECK-NEXT:    return false;<br class="">
+// CHECK-NEXT:  }()) { return true; }<br class="">
+<br class="">
+def MOV : I<(outs GPR32:$dst), (ins GPR32:$src1),<br class="">
+            [(set GPR32:$dst, (int_mytarget_nop GPR32:$src1))]>;<br class="">
+<br class="">
 //===- Test a nested instruction match. ------------------------------<wbr class="">-----===//<br class="">
<br class="">
 // CHECK-LABEL: if ([&]() {<br class="">
<br class="">
Modified: llvm/trunk/utils/TableGen/Glob<wbr class="">alISelEmitter.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/GlobalISelEmitter.cpp?rev=303341&r1=303340&r2=303341&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-pr<wbr class="">oject/llvm/trunk/utils/TableGe<wbr class="">n/GlobalISelEmitter.cpp?rev=<wbr class="">303341&r1=303340&r2=303341&<wbr class="">view=diff</a><br class="">
==============================<wbr class="">==============================<wbr class="">==================<br class="">
--- llvm/trunk/utils/TableGen/Glob<wbr class="">alISelEmitter.cpp (original)<br class="">
+++ llvm/trunk/utils/TableGen/Glob<wbr class="">alISelEmitter.cpp Thu May 18 05:33:36 2017<br class="">
@@ -1325,8 +1325,27 @@ Expected<InstructionMatcher &> GlobalISe<br class="">
<br class="">
   // Match the used operands (i.e. the children of the operator).<br class="">
   for (unsigned i = 0, e = Src->getNumChildren(); i != e; ++i) {<br class="">
-    if (auto Error = importChildMatcher(InsnMatcher<wbr class="">, Src->getChild(i), OpIdx++,<br class="">
-                                        TempOpIdx))<br class="">
+    TreePatternNode *SrcChild = Src->getChild(i);<br class="">
+<br class="">
+    // For G_INTRINSIC, the operand immediately following the defs is an<br class="">
+    // intrinsic ID.<br class="">
+    if (SrcGI.TheDef->getName() == "G_INTRINSIC" && i == 0) {<br class="">
+      if (!SrcChild->isLeaf())<br class="">
+        return failedImport("Expected IntInit containing intrinsic ID");<br class="">
+<br class="">
+      if (IntInit *SrcChildIntInit =<br class="">
+              dyn_cast<IntInit>(SrcChild->ge<wbr class="">tLeafValue())) {<br class="">
+        OperandMatcher &OM =<br class="">
+            InsnMatcher.addOperand(OpIdx++<wbr class="">, SrcChild->getName(), TempOpIdx);<br class="">
+        OM.addPredicate<IntOperandMatc<wbr class="">her>(SrcChildIntInit-><wbr class="">getValue());<br class="">
+        continue;<br class="">
+      }<br class="">
+<br class="">
+      return failedImport("Expected IntInit containing instrinsic ID)");<br class="">
+    }<br class="">
+<br class="">
+    if (auto Error =<br class="">
+            importChildMatcher(InsnMatcher<wbr class="">, SrcChild, OpIdx++, TempOpIdx))<br class="">
       return std::move(Error);<br class="">
   }<br class="">
<br class="">
@@ -1361,7 +1380,7 @@ Error GlobalISelEmitter::importChild<wbr class="">Matc<br class="">
<br class="">
   auto OpTyOrNone = MVTToLLT(ChildTypes.front().ge<wbr class="">tConcrete());<br class="">
   if (!OpTyOrNone)<br class="">
-    return failedImport("Src operand has an unsupported type");<br class="">
+    return failedImport("Src operand has an unsupported type (" + to_string(*SrcChild) + ")");<br class="">
   OM.addPredicate<LLTOperandMat<wbr class="">cher>(*OpTyOrNone);<br class="">
<br class="">
   // Check for nested instructions.<br class="">
<br class="">
<br class="">
______________________________<wbr class="">_________________<br class="">
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