<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Thanks guys!<div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Mar 21, 2017, at 4:57 PM, Ahmed Bougacha <<a href="mailto:ahmed.bougacha@gmail.com" class="">ahmed.bougacha@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">On Tue, Mar 21, 2017 at 11:40 AM, Quentin Colombet via llvm-commits</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class=""><</span><a href="mailto:llvm-commits@lists.llvm.org" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px;" class="">llvm-commits@lists.llvm.org</a><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">> wrote:</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px;" class="">Hi Volkan and Ahmed,<br class=""><br class=""><blockquote type="cite" class="">On Mar 21, 2017, at 3:47 AM, Volkan Keles via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:<br class=""><br class="">Author: volkan<br class="">Date: Tue Mar 21 05:47:35 2017<br class="">New Revision: 298358<br class=""><br class="">URL: <a href="http://llvm.org/viewvc/llvm-project?rev=298358&view=rev" class="">http://llvm.org/viewvc/llvm-project?rev=298358&view=rev</a><br class="">Log:<br class="">[GlobalISel] Move isTriviallyDead to Utils. NFC.<br class=""><br class="">Make it accessible by the targets to avoid code duplication.<br class=""><br class="">Modified:<br class="">  llvm/trunk/include/llvm/CodeGen/GlobalISel/Utils.h<br class="">  llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp<br class="">  llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp<br class=""><br class="">Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/Utils.h<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/Utils.h?rev=298358&r1=298357&r2=298358&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/Utils.h?rev=298358&r1=298357&r2=298358&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/include/llvm/CodeGen/GlobalISel/Utils.h (original)<br class="">+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/Utils.h Tue Mar 21 05:47:35 2017<br class="">@@ -45,6 +45,10 @@ unsigned constrainOperandRegClass(const<br class="">                                 MachineInstr &InsertPt, const MCInstrDesc &II,<br class="">                                 unsigned Reg, unsigned OpIdx);<br class=""><br class="">+/// Check whether an instruction \p MI is dead: it only defines dead virtual<br class="">+/// registers, and doesn't have other side effects.<br class="">+bool isTriviallyDead(const MachineInstr &MI, const MachineRegisterInfo &MRI);<br class="">+<br class="">/// Report an ISel error as a missed optimization remark to the LLVMContext's<br class="">/// diagnostic stream.  Set the FailedISel MachineFunction property.<br class="">void reportGISelFailure(MachineFunction &MF, const TargetPassConfig &TPC,<br class=""><br class="">Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=298358&r1=298357&r2=298358&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=298358&r1=298357&r2=298358&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (original)<br class="">+++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp Tue Mar 21 05:47:35 2017<br class="">@@ -48,29 +48,6 @@ void InstructionSelect::getAnalysisUsage<br class=""> MachineFunctionPass::getAnalysisUsage(AU);<br class="">}<br class=""><br class="">-/// Check whether an instruction \p MI is dead: it only defines dead virtual<br class="">-/// registers, and doesn't have other side effects.<br class="">-static bool isTriviallyDead(const MachineInstr &MI,<br class="">-                            const MachineRegisterInfo &MRI) {<br class="">-  // If we can move an instruction, we can remove it.  Otherwise, it has<br class="">-  // a side-effect of some sort.<br class="">-  bool SawStore = false;<br class="">-  if (!MI.isSafeToMove(/*AA=*/nullptr, SawStore))<br class="">-    return false;<br class="">-<br class="">-  // Instructions without side-effects are dead iff they only define dead vregs.<br class="">-  for (auto &MO : MI.operands()) {<br class="">-    if (!MO.isReg() || !MO.isDef())<br class="">-      continue;<br class="">-<br class="">-    unsigned Reg = MO.getReg();<br class="">-    // Keep Debug uses live: we don't want to have an effect on debug info.<br class="">-    if (TargetRegisterInfo::isPhysicalRegister(Reg) || !MRI.use_empty(Reg))<br class="">-      return false;<br class="">-  }<br class="">-  return true;<br class="">-}<br class="">-<br class="">bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {<br class=""> const MachineRegisterInfo &MRI = MF.getRegInfo();<br class=""><br class=""><br class="">Modified: llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp?rev=298358&r1=298357&r2=298358&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp?rev=298358&r1=298357&r2=298358&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp (original)<br class="">+++ llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp Tue Mar 21 05:47:35 2017<br class="">@@ -47,6 +47,27 @@ unsigned llvm::constrainOperandRegClass(<br class=""> return Reg;<br class="">}<br class=""><br class="">+bool llvm::isTriviallyDead(const MachineInstr &MI,<br class="">+                           const MachineRegisterInfo &MRI) {<br class="">+  // If we can move an instruction, we can remove it.  Otherwise, it has<br class="">+  // a side-effect of some sort.<br class="">+  bool SawStore = false;<br class="">+  if (!MI.isSafeToMove(/*AA=*/nullptr, SawStore))<br class="">+    return false;<br class="">+<br class="">+  // Instructions without side-effects are dead iff they only define dead vregs.<br class="">+  for (auto &MO : MI.operands()) {<br class="">+    if (!MO.isReg() || !MO.isDef())<br class="">+      continue;<br class="">+<br class="">+    unsigned Reg = MO.getReg();<br class="">+    // Keep Debug uses live: we don't want to have an effect on debug info.<br class=""></blockquote><br class="">I’m actually wondering about that one.<br class="">Debug information is not supposed to alter codegen.<br class=""><br class="">WDTY?<br class=""></blockquote><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">You're absolutely right, this is terribly wrong.  Fixed in r298460, by</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">erasing the instructions regardless and dropping the DBG_VALUEs.</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">Adrian explained to me how this is what both clang and swift (and</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">probably other users) expect, as FastISel has the same behavior.</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">clang has allocas everywhere, and swift uses a sideeffect inlineasm</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">with a "r" constraint, which means we'll currently fallback, but will</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">eventually do the right thing.</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">-Ahmed</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px;" class="">Cheers,<br class="">-Quentin<br class=""><br class=""><blockquote type="cite" class="">+    if (TargetRegisterInfo::isPhysicalRegister(Reg) || !MRI.use_empty(Reg))<br class="">+      return false;<br class="">+  }<br class="">+  return true;<br class="">+}<br class="">+<br class="">void llvm::reportGISelFailure(MachineFunction &MF, const TargetPassConfig &TPC,<br class="">                             MachineOptimizationRemarkEmitter &MORE,<br class="">                             MachineOptimizationRemarkMissed &R) {<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits<br class=""></blockquote><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class=""><a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a></blockquote></div></blockquote></div><br class=""></div></body></html>