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<p>Hi, <span style="font-size:12pt">taking a look.</span></p>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Tom Stellard <tom@stellard.net><br>
<b>Sent:</b> Monday, February 27, 2017 10:56:00 AM<br>
<b>To:</b> Konstantin Zhuravlyov<br>
<b>Cc:</b> llvm-commits@lists.llvm.org<br>
<b>Subject:</b> Re: [llvm] r296324 - [AMDGPU] Runtime metadata fixes:</font>
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<div class="PlainText">On Mon, Feb 27, 2017 at 07:55:18AM -0000, Konstantin Zhuravlyov via llvm-commits wrote:<br>
> Author: kzhuravl<br>
> Date: Mon Feb 27 01:55:17 2017<br>
> New Revision: 296324<br>
> <br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=296324&view=rev">http://llvm.org/viewvc/llvm-project?rev=296324&view=rev</a><br>
> Log:<br>
> [AMDGPU] Runtime metadata fixes:<br>
> - Verify that runtime metadata is actually valid runtime metadata when assembling, otherwise we could accept the following when assembling, but ocl runtime will reject it:<br>
> .amdgpu_runtime_metadata<br>
> { amd.MDVersion: [ 2, 1 ], amd.RandomUnknownKey, amd.IsaInfo: ...<br>
> - Make IsaInfo optional, and always emit it.<br>
> <br>
> Differential Revision: <a href="https://reviews.llvm.org/D30349">https://reviews.llvm.org/D30349</a><br>
> <br>
<br>
Hi,<br>
<br>
Can you take a look at <a href="https://bugs.llvm.org/show_bug.cgi?id=31610">https://bugs.llvm.org/show_bug.cgi?id=31610</a><br>
<br>
Some of the metadata tests are randomly failing on some platforms.<br>
<br>
If you need help reproducing, let me know.<br>
<br>
-Tom<br>
<br>
> Added:<br>
> llvm/trunk/test/MC/AMDGPU/runtime-metadata-1.s<br>
> llvm/trunk/test/MC/AMDGPU/runtime-metadata-2.s<br>
> llvm/trunk/test/MC/AMDGPU/runtime-metadata-invalid-1.s<br>
> Removed:<br>
> llvm/trunk/test/MC/AMDGPU/metadata.s<br>
> Modified:<br>
> llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp<br>
> llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.cpp<br>
> llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.h<br>
> llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp<br>
> llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h<br>
> llvm/trunk/test/MC/AMDGPU/hsa.s<br>
> <br>
> Modified: llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp?rev=296324&r1=296323&r2=296324&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp?rev=296324&r1=296323&r2=296324&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (original)<br>
> +++ llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp Mon Feb 27 01:55:17 2017<br>
> @@ -789,12 +789,12 @@ public:<br>
> : MCTargetAsmParser(Options, STI), MII(MII), Parser(_Parser) {<br>
> MCAsmParserExtension::Initialize(Parser);<br>
> <br>
> - if (getSTI().getFeatureBits().none()) {<br>
> + if (getFeatureBits().none()) {<br>
> // Set default features.<br>
> copySTI().ToggleFeature("SOUTHERN_ISLANDS");<br>
> }<br>
> <br>
> - setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits()));<br>
> + setAvailableFeatures(ComputeAvailableFeatures(getFeatureBits()));<br>
> <br>
> {<br>
> // TODO: make those pre-defined variables read-only.<br>
> @@ -802,7 +802,7 @@ public:<br>
> // MCSymbol::isRedefinable is intended for another purpose, and<br>
> // AsmParser::parseDirectiveSet() cannot be specialized for specific target.<br>
> AMDGPU::IsaInfo::IsaVersion ISA =<br>
> - AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits());<br>
> + AMDGPU::IsaInfo::getIsaVersion(getFeatureBits());<br>
> MCContext &Ctx = getContext();<br>
> MCSymbol *Sym =<br>
> Ctx.getOrCreateSymbol(Twine(".option.machine_version_major"));<br>
> @@ -828,7 +828,7 @@ public:<br>
> }<br>
> <br>
> bool hasInv2PiInlineImm() const {<br>
> - return getSTI().getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm];<br>
> + return getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm];<br>
> }<br>
> <br>
> bool hasSGPR102_SGPR103() const {<br>
> @@ -850,6 +850,10 @@ public:<br>
> return &MII;<br>
> }<br>
> <br>
> + const FeatureBitset &getFeatureBits() const {<br>
> + return getSTI().getFeatureBits();<br>
> + }<br>
> +<br>
> void setForcedEncodingSize(unsigned Size) { ForcedEncodingSize = Size; }<br>
> void setForcedDPP(bool ForceDPP_) { ForcedDPP = ForceDPP_; }<br>
> void setForcedSDWA(bool ForceSDWA_) { ForcedSDWA = ForceSDWA_; }<br>
> @@ -1870,7 +1874,7 @@ bool AMDGPUAsmParser::ParseDirectiveHSAC<br>
> // targeted GPU.<br>
> if (getLexer().is(AsmToken::EndOfStatement)) {<br>
> AMDGPU::IsaInfo::IsaVersion ISA =<br>
> - AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits());<br>
> + AMDGPU::IsaInfo::getIsaVersion(getFeatureBits());<br>
> getTargetStreamer().EmitDirectiveHSACodeObjectISA(ISA.Major, ISA.Minor,<br>
> ISA.Stepping,<br>
> "AMD", "AMDGPU");<br>
> @@ -1947,7 +1951,8 @@ bool AMDGPUAsmParser::ParseDirectiveRunt<br>
> <br>
> MS.flush();<br>
> <br>
> - getTargetStreamer().EmitRuntimeMetadata(Metadata);<br>
> + if (getTargetStreamer().EmitRuntimeMetadata(getFeatureBits(), Metadata))<br>
> + return Error(getParser().getTok().getLoc(), "invalid runtime metadata");<br>
> <br>
> return false;<br>
> }<br>
> @@ -1965,7 +1970,7 @@ bool AMDGPUAsmParser::ParseAMDKernelCode<br>
> <br>
> bool AMDGPUAsmParser::ParseDirectiveAMDKernelCodeT() {<br>
> amd_kernel_code_t Header;<br>
> - AMDGPU::initDefaultAMDKernelCodeT(Header, getSTI().getFeatureBits());<br>
> + AMDGPU::initDefaultAMDKernelCodeT(Header, getFeatureBits());<br>
> <br>
> while (true) {<br>
> // Lex EndOfStatement. This is in a while loop, because lexing a comment<br>
> @@ -2459,7 +2464,7 @@ bool AMDGPUAsmParser::parseCnt(int64_t &<br>
> Parser.Lex();<br>
> <br>
> AMDGPU::IsaInfo::IsaVersion ISA =<br>
> - AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits());<br>
> + AMDGPU::IsaInfo::getIsaVersion(getFeatureBits());<br>
> if (CntName == "vmcnt")<br>
> IntVal = encodeVmcnt(ISA, IntVal, CntVal);<br>
> else if (CntName == "expcnt")<br>
> @@ -2475,7 +2480,7 @@ bool AMDGPUAsmParser::parseCnt(int64_t &<br>
> OperandMatchResultTy<br>
> AMDGPUAsmParser::parseSWaitCntOps(OperandVector &Operands) {<br>
> AMDGPU::IsaInfo::IsaVersion ISA =<br>
> - AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits());<br>
> + AMDGPU::IsaInfo::getIsaVersion(getFeatureBits());<br>
> int64_t Waitcnt = getWaitcntBitMask(ISA);<br>
> SMLoc S = Parser.getTok().getLoc();<br>
> <br>
> <br>
> Modified: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.cpp?rev=296324&r1=296323&r2=296324&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.cpp?rev=296324&r1=296323&r2=296324&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.cpp (original)<br>
> +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.cpp Mon Feb 27 01:55:17 2017<br>
> @@ -38,6 +38,7 @@<br>
> #include <vector><br>
> <br>
> using namespace llvm;<br>
> +using namespace llvm::AMDGPU::IsaInfo;<br>
> using namespace ::AMDGPU::RuntimeMD;<br>
> <br>
> static cl::opt<bool><br>
> @@ -88,7 +89,7 @@ template <> struct MappingTraits<Kernel:<br>
> INVALID_KERNEL_INDEX);<br>
> YamlIO.mapOptional(KeyName::NoPartialWorkGroups, K.NoPartialWorkGroups,<br>
> uint8_t(0));<br>
> - YamlIO.mapRequired(KeyName::Args, K.Args);<br>
> + YamlIO.mapOptional(KeyName::Args, K.Args);<br>
> }<br>
> static const bool flow = true;<br>
> };<br>
> @@ -116,7 +117,7 @@ template <> struct MappingTraits<IsaInfo<br>
> template <> struct MappingTraits<Program::Metadata> {<br>
> static void mapping(IO &YamlIO, Program::Metadata &Prog) {<br>
> YamlIO.mapRequired(KeyName::MDVersion, Prog.MDVersionSeq);<br>
> - YamlIO.mapRequired(KeyName::IsaInfo, Prog.IsaInfo);<br>
> + YamlIO.mapOptional(KeyName::IsaInfo, Prog.IsaInfo);<br>
> YamlIO.mapOptional(KeyName::PrintfInfo, Prog.PrintfInfo);<br>
> YamlIO.mapOptional(KeyName::Kernels, Prog.Kernels);<br>
> }<br>
> @@ -375,6 +376,20 @@ static Kernel::Metadata getRuntimeMDForK<br>
> return Kernel;<br>
> }<br>
> <br>
> +static void getIsaInfo(const FeatureBitset &Features, IsaInfo::Metadata &IIM) {<br>
> + IIM.WavefrontSize = getWavefrontSize(Features);<br>
> + IIM.LocalMemorySize = getLocalMemorySize(Features);<br>
> + IIM.EUsPerCU = getEUsPerCU(Features);<br>
> + IIM.MaxWavesPerEU = getMaxWavesPerEU(Features);<br>
> + IIM.MaxFlatWorkGroupSize = getMaxFlatWorkGroupSize(Features);<br>
> + IIM.SGPRAllocGranule = getSGPRAllocGranule(Features);<br>
> + IIM.TotalNumSGPRs = getTotalNumSGPRs(Features);<br>
> + IIM.AddressableNumSGPRs = getAddressableNumSGPRs(Features);<br>
> + IIM.VGPRAllocGranule = getVGPRAllocGranule(Features);<br>
> + IIM.TotalNumVGPRs = getTotalNumVGPRs(Features);<br>
> + IIM.AddressableNumVGPRs = getAddressableNumVGPRs(Features);<br>
> +}<br>
> +<br>
> Program::Metadata::Metadata(const std::string &YAML) {<br>
> yaml::Input Input(YAML);<br>
> Input >> *this;<br>
> @@ -411,18 +426,7 @@ std::string llvm::getRuntimeMDYAMLString<br>
> Prog.MDVersionSeq.push_back(MDVersion);<br>
> Prog.MDVersionSeq.push_back(MDRevision);<br>
> <br>
> - IsaInfo::Metadata &IIM = Prog.IsaInfo;<br>
> - IIM.WavefrontSize = AMDGPU::IsaInfo::getWavefrontSize(Features);<br>
> - IIM.LocalMemorySize = AMDGPU::IsaInfo::getLocalMemorySize(Features);<br>
> - IIM.EUsPerCU = AMDGPU::IsaInfo::getEUsPerCU(Features);<br>
> - IIM.MaxWavesPerEU = AMDGPU::IsaInfo::getMaxWavesPerEU(Features);<br>
> - IIM.MaxFlatWorkGroupSize = AMDGPU::IsaInfo::getMaxFlatWorkGroupSize(Features);<br>
> - IIM.SGPRAllocGranule = AMDGPU::IsaInfo::getSGPRAllocGranule(Features);<br>
> - IIM.TotalNumSGPRs = AMDGPU::IsaInfo::getTotalNumSGPRs(Features);<br>
> - IIM.AddressableNumSGPRs = AMDGPU::IsaInfo::getAddressableNumSGPRs(Features);<br>
> - IIM.VGPRAllocGranule = AMDGPU::IsaInfo::getVGPRAllocGranule(Features);<br>
> - IIM.TotalNumVGPRs = AMDGPU::IsaInfo::getTotalNumVGPRs(Features);<br>
> - IIM.AddressableNumVGPRs = AMDGPU::IsaInfo::getAddressableNumVGPRs(Features);<br>
> + getIsaInfo(Features, Prog.IsaInfo);<br>
> <br>
> // Set PrintfInfo.<br>
> if (auto MD = M.getNamedMetadata("llvm.printf.fmts")) {<br>
> @@ -451,3 +455,16 @@ std::string llvm::getRuntimeMDYAMLString<br>
> <br>
> return YAML;<br>
> }<br>
> +<br>
> +ErrorOr<std::string> llvm::getRuntimeMDYAMLString(const FeatureBitset &Features,<br>
> + StringRef YAML) {<br>
> + Program::Metadata Prog;<br>
> + yaml::Input Input(YAML);<br>
> + Input >> Prog;<br>
> +<br>
> + getIsaInfo(Features, Prog.IsaInfo);<br>
> +<br>
> + if (Input.error())<br>
> + return Input.error();<br>
> + return Prog.toYAML();<br>
> +}<br>
> <br>
> Modified: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.h?rev=296324&r1=296323&r2=296324&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.h?rev=296324&r1=296323&r2=296324&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.h (original)<br>
> +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPURuntimeMD.h Mon Feb 27 01:55:17 2017<br>
> @@ -14,15 +14,20 @@<br>
> #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPURUNTIMEMD_H<br>
> #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPURUNTIMEMD_H<br>
> <br>
> +#include "llvm/Support/ErrorOr.h"<br>
> #include <string><br>
> <br>
> namespace llvm {<br>
> class FeatureBitset;<br>
> class Module;<br>
> <br>
> -// Get runtime metadata as YAML string.<br>
> +/// \returns Runtime metadata as YAML string.<br>
> std::string getRuntimeMDYAMLString(const FeatureBitset &Features,<br>
> const Module &M);<br>
> <br>
> +/// \returns \p YAML if \p YAML is valid runtime metadata, error otherwise.<br>
> +ErrorOr<std::string> getRuntimeMDYAMLString(const FeatureBitset &Features,<br>
> + StringRef YAML);<br>
> +<br>
> }<br>
> #endif<br>
> <br>
> Modified: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp?rev=296324&r1=296323&r2=296324&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp?rev=296324&r1=296323&r2=296324&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp (original)<br>
> +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp Mon Feb 27 01:55:17 2017<br>
> @@ -100,10 +100,17 @@ void AMDGPUTargetAsmStreamer::EmitRuntim<br>
> OS << "\n\t.end_amdgpu_runtime_metadata\n";<br>
> }<br>
> <br>
> -void AMDGPUTargetAsmStreamer::EmitRuntimeMetadata(StringRef Metadata) {<br>
> +bool AMDGPUTargetAsmStreamer::EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> + StringRef Metadata) {<br>
> + auto VerifiedMetadata = getRuntimeMDYAMLString(Features, Metadata);<br>
> + if (!VerifiedMetadata)<br>
> + return true;<br>
> +<br>
> OS << "\t.amdgpu_runtime_metadata";<br>
> - OS << Metadata;<br>
> + OS << VerifiedMetadata.get();<br>
> OS << "\t.end_amdgpu_runtime_metadata\n";<br>
> +<br>
> + return false;<br>
> }<br>
> <br>
> //===----------------------------------------------------------------------===//<br>
> @@ -216,7 +223,12 @@ void AMDGPUTargetELFStreamer::EmitAMDGPU<br>
> Symbol->setBinding(ELF::STB_GLOBAL);<br>
> }<br>
> <br>
> -void AMDGPUTargetELFStreamer::EmitRuntimeMetadata(StringRef Metadata) {<br>
> +bool AMDGPUTargetELFStreamer::EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> + StringRef Metadata) {<br>
> + auto VerifiedMetadata = getRuntimeMDYAMLString(Features, Metadata);<br>
> + if (!VerifiedMetadata)<br>
> + return true;<br>
> +<br>
> // Create two labels to mark the beginning and end of the desc field<br>
> // and a MCExpr to calculate the size of the desc field.<br>
> auto &Context = getContext();<br>
> @@ -231,13 +243,15 @@ void AMDGPUTargetELFStreamer::EmitRuntim<br>
> PT_NOTE::NT_AMDGPU_HSA_RUNTIME_METADATA,<br>
> [&](MCELFStreamer &OS) {<br>
> OS.EmitLabel(DescBegin);<br>
> - OS.EmitBytes(Metadata);<br>
> + OS.EmitBytes(VerifiedMetadata.get());<br>
> OS.EmitLabel(DescEnd);<br>
> }<br>
> );<br>
> +<br>
> + return false;<br>
> }<br>
> <br>
> void AMDGPUTargetELFStreamer::EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> const Module &M) {<br>
> - EmitRuntimeMetadata(getRuntimeMDYAMLString(Features, M));<br>
> + EmitRuntimeMetadata(Features, getRuntimeMDYAMLString(Features, M));<br>
> }<br>
> <br>
> Modified: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h?rev=296324&r1=296323&r2=296324&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h?rev=296324&r1=296323&r2=296324&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h (original)<br>
> +++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h Mon Feb 27 01:55:17 2017<br>
> @@ -50,7 +50,9 @@ public:<br>
> virtual void EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> const Module &M) = 0;<br>
> <br>
> - virtual void EmitRuntimeMetadata(StringRef Metadata) = 0;<br>
> + /// \returns False on success, true on failure.<br>
> + virtual bool EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> + StringRef Metadata) = 0;<br>
> };<br>
> <br>
> class AMDGPUTargetAsmStreamer : public AMDGPUTargetStreamer {<br>
> @@ -75,7 +77,9 @@ public:<br>
> void EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> const Module &M) override;<br>
> <br>
> - void EmitRuntimeMetadata(StringRef Metadata) override;<br>
> + /// \returns False on success, true on failure.<br>
> + bool EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> + StringRef Metadata) override;<br>
> };<br>
> <br>
> class AMDGPUTargetELFStreamer : public AMDGPUTargetStreamer {<br>
> @@ -107,7 +111,9 @@ public:<br>
> void EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> const Module &M) override;<br>
> <br>
> - void EmitRuntimeMetadata(StringRef Metadata) override;<br>
> + /// \returns False on success, true on failure.<br>
> + bool EmitRuntimeMetadata(const FeatureBitset &Features,<br>
> + StringRef Metadata) override;<br>
> };<br>
> <br>
> }<br>
> <br>
> Modified: llvm/trunk/test/MC/AMDGPU/hsa.s<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/hsa.s?rev=296324&r1=296323&r2=296324&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/hsa.s?rev=296324&r1=296323&r2=296324&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/MC/AMDGPU/hsa.s (original)<br>
> +++ llvm/trunk/test/MC/AMDGPU/hsa.s Mon Feb 27 01:55:17 2017<br>
> @@ -48,13 +48,13 @@<br>
> .end_amdgpu_runtime_metadata<br>
> <br>
> // ASM: .amdgpu_runtime_metadata<br>
> -// ASM: {<br>
> -// ASM: amd.MDVersion: [ 2, 0 ]<br>
> -// ASM: amd.Kernels: [<br>
> -// ASM: { amd.KernelName: amd_kernel_code_t_test_all },<br>
> -// ASM: { amd.KernelName: amd_kernel_code_t_minimal }<br>
> -// ASM: ]<br>
> -// ASM: }<br>
> +// ASM: {<br>
> +// ASM: amd.MDVersion: [ 2, 0 ]<br>
> +// ASM: amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 8, amd.IsaInfoTotalNumSGPRs: 512, amd.IsaInfoAddressableNumSGPRs:
104, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 },<br>
> +// ASM: amd.Kernels:<br>
> +// ASM: - { amd.KernelName: amd_kernel_code_t_test_all }<br>
> +// ASM: - { amd.KernelName: amd_kernel_code_t_minimal }<br>
> +// ASM: }<br>
> // ASM: .end_amdgpu_runtime_metadata<br>
> <br>
> .amdgpu_hsa_kernel amd_kernel_code_t_test_all<br>
> <br>
> Removed: llvm/trunk/test/MC/AMDGPU/metadata.s<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/metadata.s?rev=296323&view=auto">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/metadata.s?rev=296323&view=auto</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/MC/AMDGPU/metadata.s (original)<br>
> +++ llvm/trunk/test/MC/AMDGPU/metadata.s (removed)<br>
> @@ -1,35 +0,0 @@<br>
> -// RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | FileCheck %s --check-prefix=ASM<br>
> -<br>
> -.amdgpu_runtime_metadata<br>
> - { amd.MDVersion: [ 2, 0 ], amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> -<br>
> - - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> - - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }<br>
> - - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> - - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> - - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> - - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> -<br>
> - - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> - - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }<br>
> - - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> - - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> - - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> - - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> - }<br>
> -.end_amdgpu_runtime_metadata<br>
> -<br>
> -// ASM: { amd.MDVersion: [ 2, 0 ], amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> -// ASM: - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> -// ASM: - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }<br>
> -// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> -// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> -// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> -// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> -// ASM: - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> -// ASM: - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }<br>
> -// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> -// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> -// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> -// ASM: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> -// ASM: }<br>
> <br>
> Added: llvm/trunk/test/MC/AMDGPU/runtime-metadata-1.s<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/runtime-metadata-1.s?rev=296324&view=auto">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/runtime-metadata-1.s?rev=296324&view=auto</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/MC/AMDGPU/runtime-metadata-1.s (added)<br>
> +++ llvm/trunk/test/MC/AMDGPU/runtime-metadata-1.s Mon Feb 27 01:55:17 2017<br>
> @@ -0,0 +1,39 @@<br>
> +// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX700<br>
> +// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX800<br>
> +// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX900<br>
> +<br>
> +.amdgpu_runtime_metadata<br>
> + { amd.MDVersion: [ 2, 1 ], amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> + - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> + - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> + - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> + - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> + }<br>
> +.end_amdgpu_runtime_metadata<br>
> +<br>
> +// GFX700: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 8, amd.IsaInfoTotalNumSGPRs:
512, amd.IsaInfoAddressableNumSGPRs: 104, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> +<br>
> +// GFX800: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs:
800, amd.IsaInfoAddressableNumSGPRs: 96, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> +<br>
> +// GFX900: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs:
800, amd.IsaInfoAddressableNumSGPRs: 102, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> +<br>
> +// GCN: - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> +// GCN-NEXT: - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> +// GCN-NEXT: - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> +// GCN-NEXT: - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } } }<br>
> <br>
> Added: llvm/trunk/test/MC/AMDGPU/runtime-metadata-2.s<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/runtime-metadata-2.s?rev=296324&view=auto">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/runtime-metadata-2.s?rev=296324&view=auto</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/MC/AMDGPU/runtime-metadata-2.s (added)<br>
> +++ llvm/trunk/test/MC/AMDGPU/runtime-metadata-2.s Mon Feb 27 01:55:17 2017<br>
> @@ -0,0 +1,39 @@<br>
> +// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX700<br>
> +// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX800<br>
> +// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX900<br>
> +<br>
> +.amdgpu_runtime_metadata<br>
> + { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 8, amd.IsaInfoTotalNumSGPRs:
512, amd.IsaInfoAddressableNumSGPRs: 104, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> + - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> + - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> + - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> + - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> + }<br>
> +.end_amdgpu_runtime_metadata<br>
> +<br>
> +// GFX700: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 8, amd.IsaInfoTotalNumSGPRs:
512, amd.IsaInfoAddressableNumSGPRs: 104, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> +<br>
> +// GFX800: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs:
800, amd.IsaInfoAddressableNumSGPRs: 96, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> +<br>
> +// GFX900: { amd.MDVersion: [ 2, 1 ], amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16, amd.IsaInfoTotalNumSGPRs:
800, amd.IsaInfoAddressableNumSGPRs: 102, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.PrintfInfo: [ '1:1:4:%d\n', '2:1:8:%g\n' ], amd.Kernels:<br>
> +<br>
> +// GCN: - { amd.KernelName: test_char, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> +// GCN-NEXT: - { amd.ArgSize: 1, amd.ArgAlign: 1, amd.ArgKind: 0, amd.ArgValueType: 1, amd.ArgTypeName: char, amd.ArgAccQual: 0 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } }<br>
> +// GCN-NEXT: - { amd.KernelName: test_ushort2, amd.Language: OpenCL C, amd.LanguageVersion: [ 2, 0 ], amd.Args:<br>
> +// GCN-NEXT: - { amd.ArgSize: 4, amd.ArgAlign: 4, amd.ArgKind: 0, amd.ArgValueType: 4, amd.ArgTypeName: ushort2, amd.ArgAccQual: 0 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 }<br>
> +// GCN-NEXT: - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 11, amd.ArgValueType: 1, amd.ArgAddrQual: 1 } } }<br>
> <br>
> Added: llvm/trunk/test/MC/AMDGPU/runtime-metadata-invalid-1.s<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/runtime-metadata-invalid-1.s?rev=296324&view=auto">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/runtime-metadata-invalid-1.s?rev=296324&view=auto</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/MC/AMDGPU/runtime-metadata-invalid-1.s (added)<br>
> +++ llvm/trunk/test/MC/AMDGPU/runtime-metadata-invalid-1.s Mon Feb 27 01:55:17 2017<br>
> @@ -0,0 +1,106 @@<br>
> +; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 %s 2>&1 | FileCheck %s<br>
> +; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -filetype=obj %s 2>&1 | FileCheck %s<br>
> +; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 %s 2>&1 | FileCheck %s<br>
> +; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -filetype=obj %s 2>&1 | FileCheck %s<br>
> +; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 %s 2>&1 | FileCheck %s<br>
> +; RUN: not llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=obj %s 2>&1 | FileCheck %s<br>
> +<br>
> +; CHECK: error: unknown key 'amd.RandomUnknownKey'<br>
> +<br>
> + .text<br>
> + .hsa_code_object_version 2,1<br>
> + .hsa_code_object_isa 8,0,3,"AMD","AMDGPU"<br>
> + .amdgpu_runtime_metadata<br>
> +---<br>
> +{ amd.MDVersion: [ 2, 1 ], amd.RandomUnknownKey, amd.IsaInfo: { amd.IsaInfoWavefrontSize: 64, amd.IsaInfoLocalMemorySize: 65536, amd.IsaInfoEUsPerCU: 4, amd.IsaInfoMaxWavesPerEU: 10, amd.IsaInfoMaxFlatWorkGroupSize: 2048, amd.IsaInfoSGPRAllocGranule: 16,
amd.IsaInfoTotalNumSGPRs: 800, amd.IsaInfoAddressableNumSGPRs: 102, amd.IsaInfoVGPRAllocGranule: 4, amd.IsaInfoTotalNumVGPRs: 256, amd.IsaInfoAddressableNumVGPRs: 256 }, amd.Kernels:<br>
> + - { amd.KernelName: test, amd.Language: OpenCL C, amd.LanguageVersion: [ 1, 0 ], amd.Args:<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 1, amd.ArgValueType: 6, amd.ArgTypeName: 'int*', amd.ArgAddrQual: 1, amd.ArgAccQual: 0 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 7, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 8, amd.ArgValueType: 9 }<br>
> + - { amd.ArgSize: 8, amd.ArgAlign: 8, amd.ArgKind: 9, amd.ArgValueType: 9 } } }<br>
> +...<br>
> +<br>
> + .end_amdgpu_runtime_metadata<br>
> + .globl test<br>
> + .p2align 8<br>
> + .type test,@function<br>
> + .amdgpu_hsa_kernel test<br>
> +test: ; @test<br>
> + .amd_kernel_code_t<br>
> + amd_code_version_major = 1<br>
> + amd_code_version_minor = 0<br>
> + amd_machine_kind = 1<br>
> + amd_machine_version_major = 8<br>
> + amd_machine_version_minor = 0<br>
> + amd_machine_version_stepping = 3<br>
> + kernel_code_entry_byte_offset = 256<br>
> + kernel_code_prefetch_byte_size = 0<br>
> + max_scratch_backing_memory_byte_size = 0<br>
> + granulated_workitem_vgpr_count = 0<br>
> + granulated_wavefront_sgpr_count = 0<br>
> + priority = 0<br>
> + float_mode = 192<br>
> + priv = 0<br>
> + enable_dx10_clamp = 1<br>
> + debug_mode = 0<br>
> + enable_ieee_mode = 1<br>
> + enable_sgpr_private_segment_wave_byte_offset = 0<br>
> + user_sgpr_count = 6<br>
> + enable_trap_handler = 1<br>
> + enable_sgpr_workgroup_id_x = 1<br>
> + enable_sgpr_workgroup_id_y = 0<br>
> + enable_sgpr_workgroup_id_z = 0<br>
> + enable_sgpr_workgroup_info = 0<br>
> + enable_vgpr_workitem_id = 0<br>
> + enable_exception_msb = 0<br>
> + granulated_lds_size = 0<br>
> + enable_exception = 0<br>
> + enable_sgpr_private_segment_buffer = 1<br>
> + enable_sgpr_dispatch_ptr = 0<br>
> + enable_sgpr_queue_ptr = 0<br>
> + enable_sgpr_kernarg_segment_ptr = 1<br>
> + enable_sgpr_dispatch_id = 0<br>
> + enable_sgpr_flat_scratch_init = 0<br>
> + enable_sgpr_private_segment_size = 0<br>
> + enable_sgpr_grid_workgroup_count_x = 0<br>
> + enable_sgpr_grid_workgroup_count_y = 0<br>
> + enable_sgpr_grid_workgroup_count_z = 0<br>
> + enable_ordered_append_gds = 0<br>
> + private_element_size = 1<br>
> + is_ptr64 = 1<br>
> + is_dynamic_callstack = 0<br>
> + is_debug_enabled = 0<br>
> + is_xnack_enabled = 0<br>
> + workitem_private_segment_byte_size = 0<br>
> + workgroup_group_segment_byte_size = 0<br>
> + gds_segment_byte_size = 0<br>
> + kernarg_segment_byte_size = 8<br>
> + workgroup_fbarrier_count = 0<br>
> + wavefront_sgpr_count = 6<br>
> + workitem_vgpr_count = 3<br>
> + reserved_vgpr_first = 0<br>
> + reserved_vgpr_count = 0<br>
> + reserved_sgpr_first = 0<br>
> + reserved_sgpr_count = 0<br>
> + debug_wavefront_private_segment_offset_sgpr = 0<br>
> + debug_private_segment_buffer_sgpr = 0<br>
> + kernarg_segment_alignment = 4<br>
> + group_segment_alignment = 4<br>
> + private_segment_alignment = 4<br>
> + wavefront_size = 6<br>
> + call_convention = -1<br>
> + runtime_loader_kernel_symbol = 0<br>
> + .end_amd_kernel_code_t<br>
> +; BB#0: ; %entry<br>
> + s_load_dwordx2 s[0:1], s[4:5], 0x0<br>
> + v_mov_b32_e32 v2, 0x309<br>
> + s_waitcnt lgkmcnt(0)<br>
> + v_mov_b32_e32 v0, s0<br>
> + v_mov_b32_e32 v1, s1<br>
> + flat_store_dword v[0:1], v2<br>
> + s_endpgm<br>
> +.Lfunc_end0:<br>
> + .size test, .Lfunc_end0-test<br>
> +<br>
> + .ident ""<br>
> + .section ".note.GNU-stack"<br>
> <br>
> <br>
> _______________________________________________<br>
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