<div dir="ltr">+pcommit was listed in the <span style="font-size:12.8px">"target-features" part of the attributes.</span></div><div class="gmail_extra"><br clear="all"><div><div class="gmail_signature" data-smartmail="gmail_signature">~Craig</div></div>
<br><div class="gmail_quote">On Tue, Feb 7, 2017 at 9:58 PM, Davide Italiano <span dir="ltr"><<a href="mailto:davide@freebsd.org" target="_blank">davide@freebsd.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On Tue, Feb 7, 2017 at 9:45 PM, Craig Topper via llvm-commits<br>
<<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br>
> Author: ctopper<br>
> Date: Tue Feb  7 23:45:39 2017<br>
> New Revision: 294405<br>
><br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=294405&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project?rev=294405&view=rev</a><br>
> Log:<br>
> [X86] Remove PCOMMIT instruction support since Intel has deprecated this instruction with no plans to release products with it.<br>
><br>
> Intel's documentation for the deprecation <a href="https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction" rel="noreferrer" target="_blank">https://software.intel.com/en-<wbr>us/blogs/2016/09/12/deprecate-<wbr>pcommit-instruction</a><br>
><br>
<br>
</span>The changes to test/Transforms/LoopVectorize/<wbr>X86/int128_no_gather.ll<br>
are unrelated, I think?<br>
<div class="HOEnZb"><div class="h5"><br>
> Modified:<br>
>     llvm/trunk/lib/Support/Host.<wbr>cpp<br>
>     llvm/trunk/lib/Target/X86/X86.<wbr>td<br>
>     llvm/trunk/lib/Target/X86/<wbr>X86InstrInfo.td<br>
>     llvm/trunk/lib/Target/X86/<wbr>X86Subtarget.h<br>
>     llvm/trunk/test/MC/<wbr>Disassembler/X86/x86-32.txt<br>
>     llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s<br>
>     llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/int128_no_<wbr>gather.ll<br>
><br>
> Modified: llvm/trunk/lib/Support/Host.<wbr>cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=294405&r1=294404&r2=294405&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/<wbr>Support/Host.cpp?rev=294405&<wbr>r1=294404&r2=294405&view=diff</a><br>
> ==============================<wbr>==============================<wbr>==================<br>
> --- llvm/trunk/lib/Support/Host.<wbr>cpp (original)<br>
> +++ llvm/trunk/lib/Support/Host.<wbr>cpp Tue Feb  7 23:45:39 2017<br>
> @@ -1369,7 +1369,6 @@ bool sys::getHostCPUFeatures(<wbr>StringMap<b<br>
>    Features["rdseed"] = HasLeaf7 && ((EBX >> 18) & 1);<br>
>    Features["adx"] = HasLeaf7 && ((EBX >> 19) & 1);<br>
>    Features["smap"] = HasLeaf7 && ((EBX >> 20) & 1);<br>
> -  Features["pcommit"] = HasLeaf7 && ((EBX >> 22) & 1);<br>
>    Features["clflushopt"] = HasLeaf7 && ((EBX >> 23) & 1);<br>
>    Features["clwb"] = HasLeaf7 && ((EBX >> 24) & 1);<br>
>    Features["sha"] = HasLeaf7 && ((EBX >> 29) & 1);<br>
><br>
> Modified: llvm/trunk/lib/Target/X86/X86.<wbr>td<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=294405&r1=294404&r2=294405&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86.td?rev=294405&r1=<wbr>294404&r2=294405&view=diff</a><br>
> ==============================<wbr>==============================<wbr>==================<br>
> --- llvm/trunk/lib/Target/X86/X86.<wbr>td (original)<br>
> +++ llvm/trunk/lib/Target/X86/X86.<wbr>td Tue Feb  7 23:45:39 2017<br>
> @@ -225,8 +225,6 @@ def FeatureSGX     : SubtargetFeature<"s<br>
>                                        "Enable Software Guard Extensions">;<br>
>  def FeatureCLFLUSHOPT : SubtargetFeature<"clflushopt", "HasCLFLUSHOPT", "true",<br>
>                                        "Flush A Cache Line Optimized">;<br>
> -def FeaturePCOMMIT : SubtargetFeature<"pcommit", "HasPCOMMIT", "true",<br>
> -                                      "Enable Persistent Commit">;<br>
>  def FeatureCLWB    : SubtargetFeature<"clwb", "HasCLWB", "true",<br>
>                                        "Cache Line Write Back">;<br>
>  // TODO: This feature ought to be renamed.<br>
> @@ -558,7 +556,6 @@ def SKXFeatures : ProcessorFeatures<SKLF<br>
>    FeatureBWI,<br>
>    FeatureVLX,<br>
>    FeaturePKU,<br>
> -  FeaturePCOMMIT,<br>
>    FeatureCLWB<br>
>  ]>;<br>
><br>
><br>
> Modified: llvm/trunk/lib/Target/X86/<wbr>X86InstrInfo.td<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=294405&r1=294404&r2=294405&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86InstrInfo.td?rev=<wbr>294405&r1=294404&r2=294405&<wbr>view=diff</a><br>
> ==============================<wbr>==============================<wbr>==================<br>
> --- llvm/trunk/lib/Target/X86/<wbr>X86InstrInfo.td (original)<br>
> +++ llvm/trunk/lib/Target/X86/<wbr>X86InstrInfo.td Tue Feb  7 23:45:39 2017<br>
> @@ -2532,7 +2532,6 @@ let Predicates = [HasTBM] in {<br>
>  def CLFLUSHOPT : I<0xAE, MRM7m, (outs), (ins i8mem:$src),<br>
>                     "clflushopt\t$src", [(int_x86_clflushopt addr:$src)]>, PD;<br>
>  def CLWB       : I<0xAE, MRM6m, (outs), (ins i8mem:$src), "clwb\t$src", []>, PD;<br>
> -def PCOMMIT    : I<0xAE, MRM_F8, (outs), (ins), "pcommit", []>, PD;<br>
><br>
><br>
>  //===-------------------------<wbr>------------------------------<wbr>---------------===//<br>
><br>
> Modified: llvm/trunk/lib/Target/X86/<wbr>X86Subtarget.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=294405&r1=294404&r2=294405&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/lib/Target/<wbr>X86/X86Subtarget.h?rev=294405&<wbr>r1=294404&r2=294405&view=diff</a><br>
> ==============================<wbr>==============================<wbr>==================<br>
> --- llvm/trunk/lib/Target/X86/<wbr>X86Subtarget.h (original)<br>
> +++ llvm/trunk/lib/Target/X86/<wbr>X86Subtarget.h Tue Feb  7 23:45:39 2017<br>
> @@ -286,9 +286,6 @@ protected:<br>
>    /// Processor supports Flush Cache Line instruction<br>
>    bool HasCLFLUSHOPT;<br>
><br>
> -  /// Processor has Persistent Commit feature<br>
> -  bool HasPCOMMIT;<br>
> -<br>
>    /// Processor supports Cache Line Write Back instruction<br>
>    bool HasCLWB;<br>
><br>
><br>
> Modified: llvm/trunk/test/MC/<wbr>Disassembler/X86/x86-32.txt<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-32.txt?rev=294405&r1=294404&r2=294405&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/MC/<wbr>Disassembler/X86/x86-32.txt?<wbr>rev=294405&r1=294404&r2=<wbr>294405&view=diff</a><br>
> ==============================<wbr>==============================<wbr>==================<br>
> --- llvm/trunk/test/MC/<wbr>Disassembler/X86/x86-32.txt (original)<br>
> +++ llvm/trunk/test/MC/<wbr>Disassembler/X86/x86-32.txt Tue Feb  7 23:45:39 2017<br>
> @@ -517,9 +517,6 @@<br>
>  # CHECK: clwb (%eax)<br>
>  0x66 0x0f 0xae 0x30<br>
><br>
> -# CHECK: pcommit<br>
> -0x66 0x0f 0xae 0xf8<br>
> -<br>
>  # CHECK: vcvtph2ps %xmm0, %xmm0<br>
>  0xc4 0xe2 0x79 0x13 0xc0<br>
><br>
><br>
> Modified: llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-32-coverage.s?rev=294405&r1=294404&r2=294405&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/MC/<wbr>X86/x86-32-coverage.s?rev=<wbr>294405&r1=294404&r2=294405&<wbr>view=diff</a><br>
> ==============================<wbr>==============================<wbr>==================<br>
> --- llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s (original)<br>
> +++ llvm/trunk/test/MC/X86/x86-32-<wbr>coverage.s Tue Feb  7 23:45:39 2017<br>
> @@ -10654,10 +10654,6 @@ btcq $4, (%eax)<br>
>  // CHECK:  encoding: [0x66,0x0f,0xae,0x35,0x78,<wbr>0x56,0x34,0x12]<br>
>                 clwb    0x12345678<br>
><br>
> -// CHECK: pcommit<br>
> -// CHECK:  encoding: [0x66,0x0f,0xae,0xf8]<br>
> -               pcommit<br>
> -<br>
>  // CHECK: xsave        3735928559(%ebx,%ecx,8)<br>
>  // CHECK:  encoding: [0x0f,0xae,0xa4,0xcb,0xef,<wbr>0xbe,0xad,0xde]<br>
>                 xsave   0xdeadbeef(%ebx,%ecx,8)<br>
><br>
> Modified: llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/int128_no_<wbr>gather.ll<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopVectorize/X86/int128_no_gather.ll?rev=294405&r1=294404&r2=294405&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-<wbr>project/llvm/trunk/test/<wbr>Transforms/LoopVectorize/X86/<wbr>int128_no_gather.ll?rev=<wbr>294405&r1=294404&r2=294405&<wbr>view=diff</a><br>
> ==============================<wbr>==============================<wbr>==================<br>
> --- llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/int128_no_<wbr>gather.ll (original)<br>
> +++ llvm/trunk/test/Transforms/<wbr>LoopVectorize/X86/int128_no_<wbr>gather.ll Tue Feb  7 23:45:39 2017<br>
> @@ -71,6 +71,6 @@ declare i32 @printf(i8*, ...) #1<br>
>  ; Function Attrs: nounwind<br>
>  declare i32 @puts(i8* nocapture readonly) #2<br>
><br>
> -attributes #0 = { noinline nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-<wbr>leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"=<wbr>"8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+<wbr>avx,+avx2,+avx512bw,+avx512cd,<wbr>+avx512dq,+avx512f,+avx512vl,+<wbr>bmi,+bmi2,+clflushopt,+clwb,+<wbr>cx16,+f16c,+fma,+fsgsbase,+<wbr>fxsr,+lzcnt,+mmx,+movbe,+mpx,+<wbr>pclmul,+pcommit,+pku,+popcnt,+<wbr>rdrnd,+rdseed,+rtm,+sgx,+sse,+<wbr>sse2,+sse3,+sse4.1,+sse4.2,+<wbr>ssse3,+x87,+xsave,+xsavec,+<wbr>xsaveopt,+xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
> -attributes #1 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-<wbr>leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"=<wbr>"8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+<wbr>avx,+avx2,+avx512bw,+avx512cd,<wbr>+avx512dq,+avx512f,+avx512vl,+<wbr>bmi,+bmi2,+clflushopt,+clwb,+<wbr>cx16,+f16c,+fma,+fsgsbase,+<wbr>fxsr,+lzcnt,+mmx,+movbe,+mpx,+<wbr>pclmul,+pcommit,+pku,+popcnt,+<wbr>rdrnd,+rdseed,+rtm,+sgx,+sse,+<wbr>sse2,+sse3,+sse4.1,+sse4.2,+<wbr>ssse3,+x87,+xsave,+xsavec,+<wbr>xsaveopt,+xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
> +attributes #0 = { noinline nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-<wbr>leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"=<wbr>"8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+<wbr>avx,+avx2,+avx512bw,+avx512cd,<wbr>+avx512dq,+avx512f,+avx512vl,+<wbr>bmi,+bmi2,+clflushopt,+clwb,+<wbr>cx16,+f16c,+fma,+fsgsbase,+<wbr>fxsr,+lzcnt,+mmx,+movbe,+mpx,+<wbr>pclmul,+pku,+popcnt,+rdrnd,+<wbr>rdseed,+rtm,+sgx,+sse,+sse2,+<wbr>sse3,+sse4.1,+sse4.2,+ssse3,+<wbr>x87,+xsave,+xsavec,+xsaveopt,+<wbr>xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
> +attributes #1 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-<wbr>leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"=<wbr>"8" "target-cpu"="skylake-avx512" "target-features"="+adx,+aes,+<wbr>avx,+avx2,+avx512bw,+avx512cd,<wbr>+avx512dq,+avx512f,+avx512vl,+<wbr>bmi,+bmi2,+clflushopt,+clwb,+<wbr>cx16,+f16c,+fma,+fsgsbase,+<wbr>fxsr,+lzcnt,+mmx,+movbe,+mpx,+<wbr>pclmul,+pku,+popcnt,+rdrnd,+<wbr>rdseed,+rtm,+sgx,+sse,+sse2,+<wbr>sse3,+sse4.1,+sse4.2,+ssse3,+<wbr>x87,+xsave,+xsavec,+xsaveopt,+<wbr>xsaves" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
>  attributes #2 = { nounwind }<br>
><br>
><br>
> ______________________________<wbr>_________________<br>
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> <a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a><br>
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<br>
</div></div><span class="HOEnZb"><font color="#888888">--<br>
Davide<br>
<br>
"There are no solved problems; there are only problems that are more<br>
or less solved" -- Henri Poincare<br>
</font></span></blockquote></div><br></div>