<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""><div class=""><div><div></div><br class=""><blockquote type="cite" class=""><div class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">Found this on my out-of-tree target.</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">Regards,</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">Mikael</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px;" class=""> NewRegs.push_back(VReg);<br class="">}<br class=""><br class=""><br class="">Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=283838&r1=283837&r2=283838&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=283838&r1=283837&r2=283838&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)<br class="">+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Mon Oct 10 20:04:36 2016<br class="">@@ -2553,18 +2553,20 @@ unsigned RAGreedy::selectOrSplitImpl(Liv<br class=""> return 0;<br class=""> }<br class=""><br class="">+ if (Stage < RS_Spill) {<br class="">+ // Try splitting VirtReg or interferences.<br class="">+ unsigned NewVRegSizeBefore = NewVRegs.size();<br class="">+ unsigned PhysReg = trySplit(VirtReg, Order, NewVRegs);<br class="">+ if (PhysReg || (NewVRegs.size() - NewVRegSizeBefore))<br class="">+ return PhysReg;<br class="">+ }<br class="">+<br class=""> // If we couldn't allocate a register from spilling, there is probably some<br class=""> // invalid inline assembly. The base class wil report it.<br class=""> if (Stage >= RS_Done || !VirtReg.isSpillable())<br class=""> return tryLastChanceRecoloring(VirtReg, Order, NewVRegs, FixedRegisters,<br class=""> Depth);<br class=""><br class="">- // Try splitting VirtReg or interferences.<br class="">- unsigned NewVRegSizeBefore = NewVRegs.size();<br class="">- unsigned PhysReg = trySplit(VirtReg, Order, NewVRegs);<br class="">- if (PhysReg || (NewVRegs.size() - NewVRegSizeBefore))<br class="">- return PhysReg;<br class="">-<br class=""> // Finally spill VirtReg itself.<br class=""> if (EnableDeferredSpilling && getStage(VirtReg) < RS_Memory) {<br class=""> // TODO: This is experimental and in particular, we do not model<br class=""><br class="">Added: llvm/trunk/test/CodeGen/AVR/high-pressure-on-ptrregs.ll<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AVR/high-pressure-on-ptrregs.ll?rev=283838&view=auto" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AVR/high-pressure-on-ptrregs.ll?rev=283838&view=auto</a><br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/AVR/high-pressure-on-ptrregs.ll (added)<br class="">+++ llvm/trunk/test/CodeGen/AVR/high-pressure-on-ptrregs.ll Mon Oct 10 20:04:36 2016<br class="">@@ -0,0 +1,78 @@<br class="">+; RUN: llc < %s -march=avr | FileCheck %s<br class="">+<br class="">+; This tests how LLVM handles IR which puts very high<br class="">+; presure on the PTRREGS class for the register allocator.<br class="">+;<br class="">+; This causes a problem because we only have one small register<br class="">+; class for loading and storing from pointers - 'PTRREGS'.<br class="">+; One of these registers is also used for the frame pointer, meaning<br class="">+; that we only ever have two registers available for these operations.<br class="">+;<br class="">+; There is an existing bug filed for this issue - PR14879.<br class="">+;<br class="">+; The specific failure:<br class="">+; LLVM ERROR: ran out of registers during register allocation<br class="">+;<br class="">+; It has been assembled from the following c code:<br class="">+;<br class="">+; struct ss<br class="">+; {<br class="">+; int a;<br class="">+; int b;<br class="">+; int c;<br class="">+; };<br class="">+;<br class="">+; void loop(struct ss *x, struct ss **y, int z)<br class="">+; {<br class="">+; int i;<br class="">+; for (i=0; i<z; ++i)<br class="">+; {<br class="">+; x->c += y[i]->b;<br class="">+; }<br class="">+; }<br class="">+<br class="">+%struct.ss = type { i16, i16, i16 }<br class="">+<br class="">+; CHECK-LABEL: loop<br class="">+define void @loop(%struct.ss* %x, %struct.ss** %y, i16 %z) #0 {<br class="">+entry:<br class="">+ %x.addr = alloca %struct.ss*, align 2<br class="">+ %y.addr = alloca %struct.ss**, align 2<br class="">+ %z.addr = alloca i16, align 2<br class="">+ %i = alloca i16, align 2<br class="">+ store %struct.ss* %x, %struct.ss** %x.addr, align 2<br class="">+ store %struct.ss** %y, %struct.ss*** %y.addr, align 2<br class="">+ store i16 %z, i16* %z.addr, align 2<br class="">+ store i16 0, i16* %i, align 2<br class="">+ br label %for.cond<br class="">+<br class="">+for.cond: ; preds = %for.inc, %entry<br class="">+ %tmp = load i16, i16* %i, align 2<br class="">+ %tmp1 = load i16, i16* %z.addr, align 2<br class="">+ %cmp = icmp slt i16 %tmp, %tmp1<br class="">+ br i1 %cmp, label %for.body, label %for.end<br class="">+<br class="">+for.body: ; preds = %for.cond<br class="">+ %tmp2 = load %struct.ss**, %struct.ss*** %y.addr, align 2<br class="">+ %tmp3 = load i16, i16* %i, align 2<br class="">+ %arrayidx = getelementptr inbounds %struct.ss*, %struct.ss** %tmp2, i16 %tmp3<br class="">+ %tmp4 = load %struct.ss*, %struct.ss** %arrayidx, align 2<br class="">+ %b = getelementptr inbounds %struct.ss, %struct.ss* %tmp4, i32 0, i32 1<br class="">+ %tmp5 = load i16, i16* %b, align 2<br class="">+ %tmp6 = load %struct.ss*, %struct.ss** %x.addr, align 2<br class="">+ %c = getelementptr inbounds %struct.ss, %struct.ss* %tmp6, i32 0, i32 2<br class="">+ %tmp7 = load i16, i16* %c, align 2<br class="">+ %add = add nsw i16 %tmp7, %tmp5<br class="">+ store i16 %add, i16* %c, align 2<br class="">+ br label %for.inc<br class="">+<br class="">+for.inc: ; preds = %for.body<br class="">+ %tmp8 = load i16, i16* %i, align 2<br class="">+ %inc = add nsw i16 %tmp8, 1<br class="">+ store i16 %inc, i16* %i, align 2<br class="">+ br label %for.cond<br class="">+<br class="">+for.end: ; preds = %for.cond<br class="">+ ret void<br class="">+}<br class="">+<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</blockquote></div></blockquote></div><br class=""></div></body></html>