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<p>Hi <span>Quentin,</span></p>
<p><span><br>
</span></p>
<p><span>We do have getOrdering in <span>MemSDNode. Since MemSDNode::getOrdering and AtomicSDNode::getSuccessOrdering return the same kind of ordering it was decided to put an assert in getSuccessOrdering to make sure it is only called on cmpxchg operation.</span></span></p>
<p><span><span><br>
</span></span></p>
<p><span><span>After sleeping on it for a few days, I agree, it does not make much sense to have an assert in getSuccessOrdering. Would it be better to just retire getSuccessOrdering, and switch everything to using getOrdering rather than removing an assert?</span></span></p>
<p><span><span><br>
</span></span></p>
<p><span><span>Thanks,</span></span></p>
<p><span><span>Konstantin</span></span></p>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> qcolombet@apple.com <qcolombet@apple.com> on behalf of Quentin Colombet <qcolombet@apple.com><br>
<b>Sent:</b> Monday, October 17, 2016 1:39:24 PM<br>
<b>To:</b> Konstantin Zhuravlyov<br>
<b>Cc:</b> llvm-commits@lists.llvm.org<br>
<b>Subject:</b> Re: [llvm] r284312 - [MachineMemOperand] Move synchronization scope and atomic orderings from SDNode to MachineMemOperand, and remove redundant getAtomic* member functions from SelectionDAG.</font>
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<font size="2"><span style="font-size:10pt;">
<div class="PlainText">Hi Konstantin,<br>
<br>
> On Oct 15, 2016, at 3:01 PM, Konstantin Zhuravlyov via llvm-commits <llvm-commits@lists.llvm.org> wrote:<br>
> <br>
> Author: kzhuravl<br>
> Date: Sat Oct 15 17:01:18 2016<br>
> New Revision: 284312<br>
> <br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=284312&view=rev">http://llvm.org/viewvc/llvm-project?rev=284312&view=rev</a><br>
> Log:<br>
> [MachineMemOperand] Move synchronization scope and atomic orderings from SDNode to MachineMemOperand, and remove redundant getAtomic* member functions from SelectionDAG.<br>
> <br>
> Differential Revision: <a href="https://reviews.llvm.org/D24577">https://reviews.llvm.org/D24577</a><br>
> <br>
> Modified:<br>
> llvm/trunk/include/llvm/CodeGen/MachineFunction.h<br>
> llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h<br>
> llvm/trunk/include/llvm/CodeGen/SelectionDAG.h<br>
> llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h<br>
> llvm/trunk/lib/CodeGen/MachineFunction.cpp<br>
> llvm/trunk/lib/CodeGen/MachineInstr.cpp<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
> llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp<br>
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
> <br>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/include/llvm/CodeGen/MachineFunction.h (original)<br>
> +++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Sat Oct 15 17:01:18 2016<br>
> @@ -567,11 +567,13 @@ public:<br>
> /// getMachineMemOperand - Allocate a new MachineMemOperand.<br>
> /// MachineMemOperands are owned by the MachineFunction and need not be<br>
> /// explicitly deallocated.<br>
> - MachineMemOperand *getMachineMemOperand(MachinePointerInfo PtrInfo,<br>
> - MachineMemOperand::Flags f,<br>
> - uint64_t s, unsigned base_alignment,<br>
> - const AAMDNodes &AAInfo = AAMDNodes(),<br>
> - const MDNode *Ranges = nullptr);<br>
> + MachineMemOperand *getMachineMemOperand(<br>
> + MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s,<br>
> + unsigned base_alignment, const AAMDNodes &AAInfo = AAMDNodes(),<br>
> + const MDNode *Ranges = nullptr,<br>
> + SynchronizationScope SynchScope = CrossThread,<br>
> + AtomicOrdering Ordering = AtomicOrdering::NotAtomic,<br>
> + AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);<br>
> <br>
> /// getMachineMemOperand - Allocate a new MachineMemOperand by copying<br>
> /// an existing one, adjusting by an offset and using the given size.<br>
> <br>
> Modified: llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h (original)<br>
> +++ llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h Sat Oct 15 17:01:18 2016<br>
> @@ -19,8 +19,10 @@<br>
> #include "llvm/ADT/BitmaskEnum.h"<br>
> #include "llvm/ADT/PointerUnion.h"<br>
> #include "llvm/CodeGen/PseudoSourceValue.h"<br>
> +#include "llvm/IR/Instructions.h"<br>
> #include "llvm/IR/Metadata.h"<br>
> #include "llvm/IR/Value.h" // PointerLikeTypeTraits<Value*><br>
> +#include "llvm/Support/AtomicOrdering.h"<br>
> #include "llvm/Support/DataTypes.h"<br>
> <br>
> namespace llvm {<br>
> @@ -115,20 +117,39 @@ public:<br>
> };<br>
> <br>
> private:<br>
> + /// Atomic information for this memory operation.<br>
> + struct MachineAtomicInfo {<br>
> + /// Synchronization scope for this memory operation.<br>
> + unsigned SynchScope : 1; // enum SynchronizationScope<br>
> + /// Atomic ordering requirements for this memory operation. For cmpxchg<br>
> + /// atomic operations, atomic ordering requirements when store occurs.<br>
> + unsigned Ordering : 4; // enum AtomicOrdering<br>
> + /// For cmpxchg atomic operations, atomic ordering requirements when store<br>
> + /// does not occur.<br>
> + unsigned FailureOrdering : 4; // enum AtomicOrdering<br>
> + };<br>
> +<br>
> MachinePointerInfo PtrInfo;<br>
> uint64_t Size;<br>
> Flags FlagVals;<br>
> uint16_t BaseAlignLog2; // log_2(base_alignment) + 1<br>
> + MachineAtomicInfo AtomicInfo;<br>
> AAMDNodes AAInfo;<br>
> const MDNode *Ranges;<br>
> <br>
> public:<br>
> /// Construct a MachineMemOperand object with the specified PtrInfo, flags,<br>
> - /// size, and base alignment.<br>
> + /// size, and base alignment. For atomic operations the synchronization scope<br>
> + /// and atomic ordering requirements must also be specified. For cmpxchg<br>
> + /// atomic operations the atomic ordering requirements when store does not<br>
> + /// occur must also be specified.<br>
> MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, uint64_t s,<br>
> unsigned base_alignment,<br>
> const AAMDNodes &AAInfo = AAMDNodes(),<br>
> - const MDNode *Ranges = nullptr);<br>
> + const MDNode *Ranges = nullptr,<br>
> + SynchronizationScope SynchScope = CrossThread,<br>
> + AtomicOrdering Ordering = AtomicOrdering::NotAtomic,<br>
> + AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);<br>
> <br>
> const MachinePointerInfo &getPointerInfo() const { return PtrInfo; }<br>
> <br>
> @@ -176,6 +197,28 @@ public:<br>
> /// Return the range tag for the memory reference.<br>
> const MDNode *getRanges() const { return Ranges; }<br>
> <br>
> + /// Return the synchronization scope for this memory operation.<br>
> + SynchronizationScope getSynchScope() const {<br>
> + return static_cast<SynchronizationScope>(AtomicInfo.SynchScope);<br>
> + }<br>
> +<br>
> + /// Return the atomic ordering requirements for this memory operation.<br>
> + AtomicOrdering getOrdering() const {<br>
> + return static_cast<AtomicOrdering>(AtomicInfo.Ordering);<br>
> + }<br>
> +<br>
> + /// For cmpxchg atomic operations, return the atomic ordering requirements<br>
> + /// when store occurs.<br>
> + AtomicOrdering getSuccessOrdering() const {<br>
> + return getOrdering();<br>
> + }<br>
> +<br>
> + /// For cmpxchg atomic operations, return the atomic ordering requirements<br>
> + /// when store does not occur.<br>
> + AtomicOrdering getFailureOrdering() const {<br>
> + return static_cast<AtomicOrdering>(AtomicInfo.FailureOrdering);<br>
> + }<br>
> +<br>
> bool isLoad() const { return FlagVals & MOLoad; }<br>
> bool isStore() const { return FlagVals & MOStore; }<br>
> bool isVolatile() const { return FlagVals & MOVolatile; }<br>
> @@ -183,6 +226,10 @@ public:<br>
> bool isDereferenceable() const { return FlagVals & MODereferenceable; }<br>
> bool isInvariant() const { return FlagVals & MOInvariant; }<br>
> <br>
> + /// Returns true if this operation has an atomic ordering requirement of<br>
> + /// unordered or higher, false otherwise.<br>
> + bool isAtomic() const { return getOrdering() != AtomicOrdering::NotAtomic; }<br>
> +<br>
> /// Returns true if this memory operation doesn't have any ordering<br>
> /// constraints other than normal aliasing. Volatile and atomic memory<br>
> /// operations can't be reordered.<br>
> <br>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)<br>
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Sat Oct 15 17:01:18 2016<br>
> @@ -856,10 +856,7 @@ public:<br>
> SynchronizationScope SynchScope);<br>
> SDValue getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl, EVT MemVT,<br>
> SDVTList VTs, SDValue Chain, SDValue Ptr,<br>
> - SDValue Cmp, SDValue Swp, MachineMemOperand *MMO,<br>
> - AtomicOrdering SuccessOrdering,<br>
> - AtomicOrdering FailureOrdering,<br>
> - SynchronizationScope SynchScope);<br>
> + SDValue Cmp, SDValue Swp, MachineMemOperand *MMO);<br>
> <br>
> /// Gets a node for an atomic op, produces result (if relevant)<br>
> /// and chain and takes 2 operands.<br>
> @@ -868,26 +865,18 @@ public:<br>
> unsigned Alignment, AtomicOrdering Ordering,<br>
> SynchronizationScope SynchScope);<br>
> SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain,<br>
> - SDValue Ptr, SDValue Val, MachineMemOperand *MMO,<br>
> - AtomicOrdering Ordering, SynchronizationScope SynchScope);<br>
> + SDValue Ptr, SDValue Val, MachineMemOperand *MMO);<br>
> <br>
> /// Gets a node for an atomic op, produces result and chain and<br>
> /// takes 1 operand.<br>
> SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, EVT VT,<br>
> - SDValue Chain, SDValue Ptr, MachineMemOperand *MMO,<br>
> - AtomicOrdering Ordering, SynchronizationScope SynchScope);<br>
> + SDValue Chain, SDValue Ptr, MachineMemOperand *MMO);<br>
> <br>
> /// Gets a node for an atomic op, produces result and chain and takes N<br>
> /// operands.<br>
> SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,<br>
> SDVTList VTList, ArrayRef<SDValue> Ops,<br>
> - MachineMemOperand *MMO, AtomicOrdering SuccessOrdering,<br>
> - AtomicOrdering FailureOrdering,<br>
> - SynchronizationScope SynchScope);<br>
> - SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,<br>
> - SDVTList VTList, ArrayRef<SDValue> Ops,<br>
> - MachineMemOperand *MMO, AtomicOrdering Ordering,<br>
> - SynchronizationScope SynchScope);<br>
> + MachineMemOperand *MMO);<br>
> <br>
> /// Creates a MemIntrinsicNode that may produce a<br>
> /// result and takes a list of operands. Opcode may be INTRINSIC_VOID,<br>
> <br>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)<br>
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Sat Oct 15 17:01:18 2016<br>
> @@ -424,10 +424,8 @@ protected:<br>
> uint16_t IsNonTemporal : 1;<br>
> uint16_t IsDereferenceable : 1;<br>
> uint16_t IsInvariant : 1;<br>
> - uint16_t SynchScope : 1; // enum SynchronizationScope<br>
> - uint16_t Ordering : 4; // enum AtomicOrdering<br>
> };<br>
> - enum { NumMemSDNodeBits = NumSDNodeBits + 9 };<br>
> + enum { NumMemSDNodeBits = NumSDNodeBits + 4 };<br>
> <br>
> class LSBaseSDNodeBitfields {<br>
> friend class LSBaseSDNode;<br>
> @@ -1113,13 +1111,6 @@ public:<br>
> bool isDereferenceable() const { return MemSDNodeBits.IsDereferenceable; }<br>
> bool isInvariant() const { return MemSDNodeBits.IsInvariant; }<br>
> <br>
> - AtomicOrdering getOrdering() const {<br>
> - return static_cast<AtomicOrdering>(MemSDNodeBits.Ordering);<br>
> - }<br>
> - SynchronizationScope getSynchScope() const {<br>
> - return static_cast<SynchronizationScope>(MemSDNodeBits.SynchScope);<br>
> - }<br>
> -<br>
> // Returns the offset from the location of the access.<br>
> int64_t getSrcValueOffset() const { return MMO->getOffset(); }<br>
> <br>
> @@ -1129,6 +1120,12 @@ public:<br>
> /// Returns the Ranges that describes the dereference.<br>
> const MDNode *getRanges() const { return MMO->getRanges(); }<br>
> <br>
> + /// Return the synchronization scope for this memory operation.<br>
> + SynchronizationScope getSynchScope() const { return MMO->getSynchScope(); }<br>
> +<br>
> + /// Return the atomic ordering requirements for this memory operation.<br>
> + AtomicOrdering getOrdering() const { return MMO->getOrdering(); }<br>
> +<br>
> /// Return the type of the in-memory value.<br>
> EVT getMemoryVT() const { return MemoryVT; }<br>
> <br>
> @@ -1191,45 +1188,34 @@ public:<br>
> <br>
> /// This is an SDNode representing atomic operations.<br>
> class AtomicSDNode : public MemSDNode {<br>
> - /// For cmpxchg instructions, the ordering requirements when a store does not<br>
> - /// occur.<br>
> - AtomicOrdering FailureOrdering;<br>
> -<br>
> - void InitAtomic(AtomicOrdering SuccessOrdering,<br>
> - AtomicOrdering FailureOrdering,<br>
> - SynchronizationScope SynchScope) {<br>
> - MemSDNodeBits.Ordering = static_cast<uint16_t>(SuccessOrdering);<br>
> - assert(getOrdering() == SuccessOrdering && "Value truncated");<br>
> - MemSDNodeBits.SynchScope = static_cast<uint16_t>(SynchScope);<br>
> - assert(getSynchScope() == SynchScope && "Value truncated");<br>
> - this->FailureOrdering = FailureOrdering;<br>
> - }<br>
> -<br>
> public:<br>
> AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL,<br>
> - EVT MemVT, MachineMemOperand *MMO,<br>
> - AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering,<br>
> - SynchronizationScope SynchScope)<br>
> - : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {<br>
> - InitAtomic(SuccessOrdering, FailureOrdering, SynchScope);<br>
> - }<br>
> + EVT MemVT, MachineMemOperand *MMO)<br>
> + : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {}<br>
> <br>
> const SDValue &getBasePtr() const { return getOperand(1); }<br>
> const SDValue &getVal() const { return getOperand(2); }<br>
> <br>
> - AtomicOrdering getSuccessOrdering() const {<br>
> - return getOrdering();<br>
> + /// Returns true if this SDNode represents cmpxchg atomic operation, false<br>
> + /// otherwise.<br>
> + bool isCompareAndSwap() const {<br>
> + unsigned Op = getOpcode();<br>
> + return Op == ISD::ATOMIC_CMP_SWAP ||<br>
> + Op == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS;<br>
> }<br>
> <br>
> - // Not quite enough room in SubclassData for everything, so failure gets its<br>
> - // own field.<br>
> - AtomicOrdering getFailureOrdering() const {<br>
> - return FailureOrdering;<br>
> + /// For cmpxchg atomic operations, return the atomic ordering requirements<br>
> + /// when store occurs.<br>
> + AtomicOrdering getSuccessOrdering() const {<br>
> + assert(isCompareAndSwap() && "Must be cmpxchg operation”);<br>
<br>
Correct me if I am wrong, but the assert does not make much to me.<br>
If we are to take the SuccessOrdering of the MemoryOperand anyway, why should we check for the type of instruction?<br>
My concern is that we end up with an API for this type of node that does not work for all the nodes that fall in that class.<br>
<br>
What do you think?<br>
<br>
Cheers,<br>
-Quentin<br>
<br>
> + return MMO->getSuccessOrdering();<br>
> }<br>
> <br>
> - bool isCompareAndSwap() const {<br>
> - unsigned Op = getOpcode();<br>
> - return Op == ISD::ATOMIC_CMP_SWAP || Op == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS;<br>
> + /// For cmpxchg atomic operations, return the atomic ordering requirements<br>
> + /// when store does not occur.<br>
> + AtomicOrdering getFailureOrdering() const {<br>
> + assert(isCompareAndSwap() && "Must be cmpxchg operation");<br>
> + return MMO->getFailureOrdering();<br>
> }<br>
> <br>
> // Methods to support isa and dyn_cast<br>
> <br>
> Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Sat Oct 15 17:01:18 2016<br>
> @@ -306,9 +306,12 @@ MachineFunction::DeleteMachineBasicBlock<br>
> <br>
> MachineMemOperand *MachineFunction::getMachineMemOperand(<br>
> MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s,<br>
> - unsigned base_alignment, const AAMDNodes &AAInfo, const MDNode *Ranges) {<br>
> + unsigned base_alignment, const AAMDNodes &AAInfo, const MDNode *Ranges,<br>
> + SynchronizationScope SynchScope, AtomicOrdering Ordering,<br>
> + AtomicOrdering FailureOrdering) {<br>
> return new (Allocator)<br>
> - MachineMemOperand(PtrInfo, f, s, base_alignment, AAInfo, Ranges);<br>
> + MachineMemOperand(PtrInfo, f, s, base_alignment, AAInfo, Ranges,<br>
> + SynchScope, Ordering, FailureOrdering);<br>
> }<br>
> <br>
> MachineMemOperand *<br>
> @@ -318,13 +321,15 @@ MachineFunction::getMachineMemOperand(co<br>
> return new (Allocator)<br>
> MachineMemOperand(MachinePointerInfo(MMO->getValue(),<br>
> MMO->getOffset()+Offset),<br>
> - MMO->getFlags(), Size,<br>
> - MMO->getBaseAlignment());<br>
> + MMO->getFlags(), Size, MMO->getBaseAlignment(),<br>
> + AAMDNodes(), nullptr, MMO->getSynchScope(),<br>
> + MMO->getOrdering(), MMO->getFailureOrdering());<br>
> return new (Allocator)<br>
> MachineMemOperand(MachinePointerInfo(MMO->getPseudoValue(),<br>
> MMO->getOffset()+Offset),<br>
> - MMO->getFlags(), Size,<br>
> - MMO->getBaseAlignment());<br>
> + MMO->getFlags(), Size, MMO->getBaseAlignment(),<br>
> + AAMDNodes(), nullptr, MMO->getSynchScope(),<br>
> + MMO->getOrdering(), MMO->getFailureOrdering());<br>
> }<br>
> <br>
> MachineInstr::mmo_iterator<br>
> @@ -355,7 +360,9 @@ MachineFunction::extractLoadMemRefs(Mach<br>
> getMachineMemOperand((*I)->getPointerInfo(),<br>
> (*I)->getFlags() & ~MachineMemOperand::MOStore,<br>
> (*I)->getSize(), (*I)->getBaseAlignment(),<br>
> - (*I)->getAAInfo());<br>
> + (*I)->getAAInfo(), nullptr,<br>
> + (*I)->getSynchScope(), (*I)->getOrdering(),<br>
> + (*I)->getFailureOrdering());<br>
> Result[Index] = JustLoad;<br>
> }<br>
> ++Index;<br>
> @@ -387,7 +394,9 @@ MachineFunction::extractStoreMemRefs(Mac<br>
> getMachineMemOperand((*I)->getPointerInfo(),<br>
> (*I)->getFlags() & ~MachineMemOperand::MOLoad,<br>
> (*I)->getSize(), (*I)->getBaseAlignment(),<br>
> - (*I)->getAAInfo());<br>
> + (*I)->getAAInfo(), nullptr,<br>
> + (*I)->getSynchScope(), (*I)->getOrdering(),<br>
> + (*I)->getFailureOrdering());<br>
> Result[Index] = JustStore;<br>
> }<br>
> ++Index;<br>
> <br>
> Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Sat Oct 15 17:01:18 2016<br>
> @@ -537,7 +537,10 @@ MachinePointerInfo MachinePointerInfo::g<br>
> MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f,<br>
> uint64_t s, unsigned int a,<br>
> const AAMDNodes &AAInfo,<br>
> - const MDNode *Ranges)<br>
> + const MDNode *Ranges,<br>
> + SynchronizationScope SynchScope,<br>
> + AtomicOrdering Ordering,<br>
> + AtomicOrdering FailureOrdering)<br>
> : PtrInfo(ptrinfo), Size(s), FlagVals(f), BaseAlignLog2(Log2_32(a) + 1),<br>
> AAInfo(AAInfo), Ranges(Ranges) {<br>
> assert((PtrInfo.V.isNull() || PtrInfo.V.is<const PseudoSourceValue*>() ||<br>
> @@ -545,6 +548,13 @@ MachineMemOperand::MachineMemOperand(Mac<br>
> "invalid pointer value");<br>
> assert(getBaseAlignment() == a && "Alignment is not a power of 2!");<br>
> assert((isLoad() || isStore()) && "Not a load/store!");<br>
> +<br>
> + AtomicInfo.SynchScope = static_cast<unsigned>(SynchScope);<br>
> + assert(getSynchScope() == SynchScope && "Value truncated");<br>
> + AtomicInfo.Ordering = static_cast<unsigned>(Ordering);<br>
> + assert(getOrdering() == Ordering && "Value truncated");<br>
> + AtomicInfo.FailureOrdering = static_cast<unsigned>(FailureOrdering);<br>
> + assert(getFailureOrdering() == FailureOrdering && "Value truncated");<br>
> }<br>
> <br>
> /// Profile - Gather unique data for the object.<br>
> <br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sat Oct 15 17:01:18 2016<br>
> @@ -2835,10 +2835,7 @@ bool SelectionDAGLegalize::ExpandNode(SD<br>
> SDValue Swap = DAG.getAtomicCmpSwap(<br>
> ISD::ATOMIC_CMP_SWAP, dl, cast<AtomicSDNode>(Node)->getMemoryVT(), VTs,<br>
> Node->getOperand(0), Node->getOperand(1), Zero, Zero,<br>
> - cast<AtomicSDNode>(Node)->getMemOperand(),<br>
> - cast<AtomicSDNode>(Node)->getOrdering(),<br>
> - cast<AtomicSDNode>(Node)->getOrdering(),<br>
> - cast<AtomicSDNode>(Node)->getSynchScope());<br>
> + cast<AtomicSDNode>(Node)->getMemOperand());<br>
> Results.push_back(Swap.getValue(0));<br>
> Results.push_back(Swap.getValue(1));<br>
> break;<br>
> @@ -2849,9 +2846,7 @@ bool SelectionDAGLegalize::ExpandNode(SD<br>
> cast<AtomicSDNode>(Node)->getMemoryVT(),<br>
> Node->getOperand(0),<br>
> Node->getOperand(1), Node->getOperand(2),<br>
> - cast<AtomicSDNode>(Node)->getMemOperand(),<br>
> - cast<AtomicSDNode>(Node)->getOrdering(),<br>
> - cast<AtomicSDNode>(Node)->getSynchScope());<br>
> + cast<AtomicSDNode>(Node)->getMemOperand());<br>
> Results.push_back(Swap.getValue(1));<br>
> break;<br>
> }<br>
> @@ -2863,10 +2858,7 @@ bool SelectionDAGLegalize::ExpandNode(SD<br>
> SDValue Res = DAG.getAtomicCmpSwap(<br>
> ISD::ATOMIC_CMP_SWAP, dl, cast<AtomicSDNode>(Node)->getMemoryVT(), VTs,<br>
> Node->getOperand(0), Node->getOperand(1), Node->getOperand(2),<br>
> - Node->getOperand(3), cast<MemSDNode>(Node)->getMemOperand(),<br>
> - cast<AtomicSDNode>(Node)->getSuccessOrdering(),<br>
> - cast<AtomicSDNode>(Node)->getFailureOrdering(),<br>
> - cast<AtomicSDNode>(Node)->getSynchScope());<br>
> + Node->getOperand(3), cast<MemSDNode>(Node)->getMemOperand());<br>
> <br>
> SDValue ExtRes = Res;<br>
> SDValue LHS = Res;<br>
> <br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Sat Oct 15 17:01:18 2016<br>
> @@ -188,8 +188,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_<br>
> SDValue Res = DAG.getAtomic(N->getOpcode(), SDLoc(N),<br>
> N->getMemoryVT(), ResVT,<br>
> N->getChain(), N->getBasePtr(),<br>
> - N->getMemOperand(), N->getOrdering(),<br>
> - N->getSynchScope());<br>
> + N->getMemOperand());<br>
> // Legalize the chain result - switch anything that used the old chain to<br>
> // use the new one.<br>
> ReplaceValueWith(SDValue(N, 1), Res.getValue(1));<br>
> @@ -201,8 +200,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_<br>
> SDValue Res = DAG.getAtomic(N->getOpcode(), SDLoc(N),<br>
> N->getMemoryVT(),<br>
> N->getChain(), N->getBasePtr(),<br>
> - Op2, N->getMemOperand(), N->getOrdering(),<br>
> - N->getSynchScope());<br>
> + Op2, N->getMemOperand());<br>
> // Legalize the chain result - switch anything that used the old chain to<br>
> // use the new one.<br>
> ReplaceValueWith(SDValue(N, 1), Res.getValue(1));<br>
> @@ -225,8 +223,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_<br>
> SDValue Res = DAG.getAtomicCmpSwap(<br>
> ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, SDLoc(N), N->getMemoryVT(), VTs,<br>
> N->getChain(), N->getBasePtr(), N->getOperand(2), N->getOperand(3),<br>
> - N->getMemOperand(), N->getSuccessOrdering(), N->getFailureOrdering(),<br>
> - N->getSynchScope());<br>
> + N->getMemOperand());<br>
> ReplaceValueWith(SDValue(N, 0), Res.getValue(0));<br>
> ReplaceValueWith(SDValue(N, 2), Res.getValue(2));<br>
> return Res.getValue(1);<br>
> @@ -238,8 +235,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_<br>
> DAG.getVTList(Op2.getValueType(), N->getValueType(1), MVT::Other);<br>
> SDValue Res = DAG.getAtomicCmpSwap(<br>
> N->getOpcode(), SDLoc(N), N->getMemoryVT(), VTs, N->getChain(),<br>
> - N->getBasePtr(), Op2, Op3, N->getMemOperand(), N->getSuccessOrdering(),<br>
> - N->getFailureOrdering(), N->getSynchScope());<br>
> + N->getBasePtr(), Op2, Op3, N->getMemOperand());<br>
> // Update the use to N with the newly created Res.<br>
> for (unsigned i = 1, NumResults = N->getNumValues(); i < NumResults; ++i)<br>
> ReplaceValueWith(SDValue(N, i), Res.getValue(i));<br>
> @@ -997,8 +993,7 @@ SDValue DAGTypeLegalizer::PromoteIntOp_A<br>
> SDValue DAGTypeLegalizer::PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N) {<br>
> SDValue Op2 = GetPromotedInteger(N->getOperand(2));<br>
> return DAG.getAtomic(N->getOpcode(), SDLoc(N), N->getMemoryVT(),<br>
> - N->getChain(), N->getBasePtr(), Op2, N->getMemOperand(),<br>
> - N->getOrdering(), N->getSynchScope());<br>
> + N->getChain(), N->getBasePtr(), Op2, N->getMemOperand());<br>
> }<br>
> <br>
> SDValue DAGTypeLegalizer::PromoteIntOp_BITCAST(SDNode *N) {<br>
> @@ -1368,8 +1363,7 @@ void DAGTypeLegalizer::ExpandIntegerResu<br>
> SDValue Tmp = DAG.getAtomicCmpSwap(<br>
> ISD::ATOMIC_CMP_SWAP, SDLoc(N), AN->getMemoryVT(), VTs,<br>
> N->getOperand(0), N->getOperand(1), N->getOperand(2), N->getOperand(3),<br>
> - AN->getMemOperand(), AN->getSuccessOrdering(), AN->getFailureOrdering(),<br>
> - AN->getSynchScope());<br>
> + AN->getMemOperand());<br>
> <br>
> // Expanding to the strong ATOMIC_CMP_SWAP node means we can determine<br>
> // success simply by comparing the loaded value against the ingoing<br>
> @@ -2733,10 +2727,7 @@ void DAGTypeLegalizer::ExpandIntRes_ATOM<br>
> SDValue Swap = DAG.getAtomicCmpSwap(<br>
> ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, dl,<br>
> cast<AtomicSDNode>(N)->getMemoryVT(), VTs, N->getOperand(0),<br>
> - N->getOperand(1), Zero, Zero, cast<AtomicSDNode>(N)->getMemOperand(),<br>
> - cast<AtomicSDNode>(N)->getOrdering(),<br>
> - cast<AtomicSDNode>(N)->getOrdering(),<br>
> - cast<AtomicSDNode>(N)->getSynchScope());<br>
> + N->getOperand(1), Zero, Zero, cast<AtomicSDNode>(N)->getMemOperand());<br>
> <br>
> ReplaceValueWith(SDValue(N, 0), Swap.getValue(0));<br>
> ReplaceValueWith(SDValue(N, 1), Swap.getValue(2));<br>
> @@ -3224,9 +3215,7 @@ SDValue DAGTypeLegalizer::ExpandIntOp_AT<br>
> cast<AtomicSDNode>(N)->getMemoryVT(),<br>
> N->getOperand(0),<br>
> N->getOperand(1), N->getOperand(2),<br>
> - cast<AtomicSDNode>(N)->getMemOperand(),<br>
> - cast<AtomicSDNode>(N)->getOrdering(),<br>
> - cast<AtomicSDNode>(N)->getSynchScope());<br>
> + cast<AtomicSDNode>(N)->getMemOperand());<br>
> return Swap.getValue(1);<br>
> }<br>
> <br>
> <br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sat Oct 15 17:01:18 2016<br>
> @@ -4831,10 +4831,7 @@ SDValue SelectionDAG::getMemset(SDValue<br>
> <br>
> SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,<br>
> SDVTList VTList, ArrayRef<SDValue> Ops,<br>
> - MachineMemOperand *MMO,<br>
> - AtomicOrdering SuccessOrdering,<br>
> - AtomicOrdering FailureOrdering,<br>
> - SynchronizationScope SynchScope) {<br>
> + MachineMemOperand *MMO) {<br>
> FoldingSetNodeID ID;<br>
> ID.AddInteger(MemVT.getRawBits());<br>
> AddNodeIDNode(ID, Opcode, VTList, Ops);<br>
> @@ -4846,8 +4843,7 @@ SDValue SelectionDAG::getAtomic(unsigned<br>
> }<br>
> <br>
> auto *N = newSDNode<AtomicSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(),<br>
> - VTList, MemVT, MMO, SuccessOrdering,<br>
> - FailureOrdering, SynchScope);<br>
> + VTList, MemVT, MMO);<br>
> createOperands(N, Ops);<br>
> <br>
> CSEMap.InsertNode(N, IP);<br>
> @@ -4855,14 +4851,6 @@ SDValue SelectionDAG::getAtomic(unsigned<br>
> return SDValue(N, 0);<br>
> }<br>
> <br>
> -SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,<br>
> - SDVTList VTList, ArrayRef<SDValue> Ops,<br>
> - MachineMemOperand *MMO, AtomicOrdering Ordering,<br>
> - SynchronizationScope SynchScope) {<br>
> - return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,<br>
> - Ordering, SynchScope);<br>
> -}<br>
> -<br>
> SDValue SelectionDAG::getAtomicCmpSwap(<br>
> unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTs, SDValue Chain,<br>
> SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,<br>
> @@ -4882,26 +4870,23 @@ SDValue SelectionDAG::getAtomicCmpSwap(<br>
> auto Flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad |<br>
> MachineMemOperand::MOStore;<br>
> MachineMemOperand *MMO =<br>
> - MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);<br>
> + MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,<br>
> + AAMDNodes(), nullptr, SynchScope, SuccessOrdering,<br>
> + FailureOrdering);<br>
> <br>
> - return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,<br>
> - SuccessOrdering, FailureOrdering, SynchScope);<br>
> + return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO);<br>
> }<br>
> <br>
> SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl,<br>
> EVT MemVT, SDVTList VTs, SDValue Chain,<br>
> SDValue Ptr, SDValue Cmp, SDValue Swp,<br>
> - MachineMemOperand *MMO,<br>
> - AtomicOrdering SuccessOrdering,<br>
> - AtomicOrdering FailureOrdering,<br>
> - SynchronizationScope SynchScope) {<br>
> + MachineMemOperand *MMO) {<br>
> assert(Opcode == ISD::ATOMIC_CMP_SWAP ||<br>
> Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);<br>
> assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");<br>
> <br>
> SDValue Ops[] = {Chain, Ptr, Cmp, Swp};<br>
> - return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,<br>
> - SuccessOrdering, FailureOrdering, SynchScope);<br>
> + return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);<br>
> }<br>
> <br>
> SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,<br>
> @@ -4927,16 +4912,15 @@ SDValue SelectionDAG::getAtomic(unsigned<br>
> <br>
> MachineMemOperand *MMO =<br>
> MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,<br>
> - MemVT.getStoreSize(), Alignment);<br>
> + MemVT.getStoreSize(), Alignment, AAMDNodes(),<br>
> + nullptr, SynchScope, Ordering);<br>
> <br>
> - return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,<br>
> - Ordering, SynchScope);<br>
> + return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);<br>
> }<br>
> <br>
> SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,<br>
> SDValue Chain, SDValue Ptr, SDValue Val,<br>
> - MachineMemOperand *MMO, AtomicOrdering Ordering,<br>
> - SynchronizationScope SynchScope) {<br>
> + MachineMemOperand *MMO) {<br>
> assert((Opcode == ISD::ATOMIC_LOAD_ADD ||<br>
> Opcode == ISD::ATOMIC_LOAD_SUB ||<br>
> Opcode == ISD::ATOMIC_LOAD_AND ||<br>
> @@ -4956,18 +4940,17 @@ SDValue SelectionDAG::getAtomic(unsigned<br>
> SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :<br>
> getVTList(VT, MVT::Other);<br>
> SDValue Ops[] = {Chain, Ptr, Val};<br>
> - return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);<br>
> + return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);<br>
> }<br>
> <br>
> SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,<br>
> EVT VT, SDValue Chain, SDValue Ptr,<br>
> - MachineMemOperand *MMO, AtomicOrdering Ordering,<br>
> - SynchronizationScope SynchScope) {<br>
> + MachineMemOperand *MMO) {<br>
> assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");<br>
> <br>
> SDVTList VTs = getVTList(VT, MVT::Other);<br>
> SDValue Ops[] = {Chain, Ptr};<br>
> - return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);<br>
> + return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);<br>
> }<br>
> <br>
> /// getMergeValues - Create a MERGE_VALUES node from the given operands.<br>
> <br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Sat Oct 15 17:01:18 2016<br>
> @@ -3973,13 +3973,13 @@ void SelectionDAGBuilder::visitAtomicLoa<br>
> MachineMemOperand::MOLoad,<br>
> VT.getStoreSize(),<br>
> I.getAlignment() ? I.getAlignment() :<br>
> - DAG.getEVTAlignment(VT));<br>
> + DAG.getEVTAlignment(VT),<br>
> + AAMDNodes(), nullptr, Scope, Order);<br>
> <br>
> InChain = TLI.prepareVolatileOrAtomicLoad(InChain, dl, DAG);<br>
> SDValue L =<br>
> DAG.getAtomic(ISD::ATOMIC_LOAD, dl, VT, VT, InChain,<br>
> - getValue(I.getPointerOperand()), MMO,<br>
> - Order, Scope);<br>
> + getValue(I.getPointerOperand()), MMO);<br>
> <br>
> SDValue OutChain = L.getValue(1);<br>
> <br>
> <br>
> Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)<br>
> +++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Sat Oct 15 17:01:18 2016<br>
> @@ -3310,8 +3310,7 @@ SDValue SystemZTargetLowering::lowerATOM<br>
> if (NegSrc2.getNode())<br>
> return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT,<br>
> Node->getChain(), Node->getBasePtr(), NegSrc2,<br>
> - Node->getMemOperand(), Node->getOrdering(),<br>
> - Node->getSynchScope());<br>
> + Node->getMemOperand());<br>
> <br>
> // Use the node as-is.<br>
> return Op;<br>
> <br>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=284312&r1=284311&r2=284312&view=diff">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=284312&r1=284311&r2=284312&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Oct 15 17:01:18 2016<br>
> @@ -21597,8 +21597,7 @@ static SDValue lowerAtomicArith(SDValue<br>
> AtomicSDNode *AN = cast<AtomicSDNode>(N.getNode());<br>
> RHS = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), RHS);<br>
> return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, VT, Chain, LHS,<br>
> - RHS, AN->getMemOperand(), AN->getOrdering(),<br>
> - AN->getSynchScope());<br>
> + RHS, AN->getMemOperand());<br>
> }<br>
> assert(Opc == ISD::ATOMIC_LOAD_ADD &&<br>
> "Used AtomicRMW ops other than Add should have been expanded!");<br>
> @@ -21629,9 +21628,7 @@ static SDValue LowerATOMIC_STORE(SDValue<br>
> cast<AtomicSDNode>(Node)->getMemoryVT(),<br>
> Node->getOperand(0),<br>
> Node->getOperand(1), Node->getOperand(2),<br>
> - cast<AtomicSDNode>(Node)->getMemOperand(),<br>
> - cast<AtomicSDNode>(Node)->getOrdering(),<br>
> - cast<AtomicSDNode>(Node)->getSynchScope());<br>
> + cast<AtomicSDNode>(Node)->getMemOperand());<br>
> return Swap.getValue(1);<br>
> }<br>
> // Other atomic stores have a simple pattern.<br>
> <br>
> <br>
> _______________________________________________<br>
> llvm-commits mailing list<br>
> llvm-commits@lists.llvm.org<br>
> <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
<br>
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