<div dir="ltr">We can debug on x86, here is exactly the same error <a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/25154/steps/check-ubsan%20in%20gcc%20build/logs/stdio">http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/25154/steps/check-ubsan%20in%20gcc%20build/logs/stdio</a></div><br><div class="gmail_quote"><div dir="ltr">On Wed, Aug 24, 2016 at 11:22 AM Kostya Serebryany <<a href="mailto:kcc@google.com">kcc@google.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Did reverting help? <div>If yes, I will need someone's help to debug this on PPC -- I really need this change back. </div></div><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Aug 24, 2016 at 10:50 AM, Vitaly Buka via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Reverted by r279643<br></div><div class="m_3086770136907988665HOEnZb"><div class="m_3086770136907988665h5"><br><div class="gmail_quote"><div dir="ltr">On Wed, Aug 24, 2016 at 8:18 AM Bill Seurer <<a href="mailto:seurer@linux.vnet.ibm.com" target="_blank">seurer@linux.vnet.ibm.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">I tried this by hand.  r279571 works fine and with r279572:<br>
<br>
FAIL: UBSan-MSan-powerpc64le :: TestCases/TypeCheck/vptr.cpp (95 of 144)<br>
******************** TEST 'UBSan-MSan-powerpc64le ::<br>
TestCases/TypeCheck/vptr.cpp' FAILED ********************<br>
Script:<br>
--<br>
/home/seurer/llvm/build/llvm-test/./bin/clang --driver-mode=g++<br>
-fsanitize=memory -m64 -frtti -fsanitize=vptr -fno-sanitize-recover=vptr<br>
-g<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
-O3 -o<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
rT &&<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
mT &&<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
fT &&<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
cT<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
rU &&<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
mU &&<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
fU &&<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
cU<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
rS &&<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
rV &&<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
oV<br>
env UBSAN_OPTIONS=print_stacktrace=1 not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
mS 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-MEMBER --check-prefix=CHECK-Linux-MEMBER<br>
--strict-whitespace<br>
env UBSAN_OPTIONS=print_stacktrace=1 not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
fS 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-MEMFUN --strict-whitespace<br>
env UBSAN_OPTIONS=print_stacktrace=1 not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
cS 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-DOWNCAST --check-prefix=CHECK-Linux-DOWNCAST<br>
--strict-whitespace<br>
env UBSAN_OPTIONS=print_stacktrace=1 not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
mV 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-MEMBER --check-prefix=CHECK-Linux-MEMBER<br>
--strict-whitespace<br>
env UBSAN_OPTIONS=print_stacktrace=1 not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
fV 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-MEMFUN --strict-whitespace<br>
env UBSAN_OPTIONS=print_stacktrace=1 not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
cV 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-DOWNCAST --check-prefix=CHECK-Linux-DOWNCAST<br>
--strict-whitespace<br>
env UBSAN_OPTIONS=print_stacktrace=1 not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
oU 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-OFFSET --check-prefix=CHECK-Linux-OFFSET<br>
--strict-whitespace<br>
env UBSAN_OPTIONS=print_stacktrace=1 not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
m0 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-NULL-MEMBER --check-prefix=CHECK-Linux-NULL-MEMBER<br>
--strict-whitespace<br>
(echo "vptr_check:S"; echo "vptr_check:T"; echo "vptr_check:U") ><br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp<br>
env<br>
UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"'<br>
<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
mS<br>
env<br>
UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"'<br>
<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
fS<br>
env<br>
UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"'<br>
<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
cS<br>
env<br>
UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"'<br>
<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
mV<br>
env<br>
UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"'<br>
<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
fV<br>
env<br>
UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"'<br>
<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
cV<br>
env<br>
UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.supp"'<br>
<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
oU<br>
echo "vptr_check:S" ><br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.loc-supp<br>
env<br>
UBSAN_OPTIONS=suppressions='"/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp.loc-supp"'<br>
not<br>
/home/seurer/llvm/build/llvm-test/projects/compiler-rt/test/ubsan/MemorySanitizer-powerpc64le/TestCases/TypeCheck/Output/vptr.cpp.tmp<br>
x- 2>&1 | FileCheck<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp<br>
--check-prefix=CHECK-LOC-SUPPRESS<br>
--<br>
Exit Code: 1<br>
<br>
Command Output (stderr):<br>
--<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:46:12:<br>
warning: direct base 'S' is inaccessible due to ambiguity:<br>
     struct U -> struct S<br>
     struct U -> struct T -> struct S [-Winaccessible-base]<br>
struct U : S, T { virtual int v() { return 2; } };<br>
            ^<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:93:9:<br>
warning: 'reinterpret_cast' from class 'U *' to its base at non-zero<br>
offset 'T *' behaves differently from 'static_cast'<br>
[-Wreinterpret-base-class]<br>
     p = reinterpret_cast<T*>(new U);<br>
         ^~~~~~~~~~~~~~~~~~~~~~~~~~~<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:93:9:<br>
note: use 'static_cast' to adjust the pointer correctly while upcasting<br>
     p = reinterpret_cast<T*>(new U);<br>
         ^~~~~~~~~~~~~~~~<br>
         static_cast<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:153:12:<br>
warning: 'reinterpret_cast' to class 'U *' from its base at non-zero<br>
offset 'T *' behaves differently from 'static_cast'<br>
[-Wreinterpret-base-class]<br>
     return reinterpret_cast<U*>(p)->v() - 2;<br>
            ^~~~~~~~~~~~~~~~~~~~~~~<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:153:12:<br>
note: use 'static_cast' to adjust the pointer correctly while downcasting<br>
     return reinterpret_cast<U*>(p)->v() - 2;<br>
            ^~~~~~~~~~~~~~~~<br>
            static_cast<br>
3 warnings generated.<br>
Test case: rT<br>
Test case: mT<br>
Test case: fT<br>
Test case: cT<br>
Test case: rU<br>
Test case: mU<br>
Test case: fU<br>
Test case: cU<br>
Test case: rS<br>
Test case: rV<br>
Test case: oV<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:124:27:<br>
error: expected string not found in input<br>
     // CHECK-MEMBER-NEXT: {{^ .. .. .. ..  .. .. .. .. .. .. .. ..  }}<br>
                           ^<br>
<stdin>:4:1: note: scanning from here<br>
<memory cannot be printed><br>
^<br>
<stdin>:5:10: note: possible intended match here<br>
     #0 0x26d6ca38 in access_p(T*, char)<br>
/home/seurer/llvm/llvm-test/projects/compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp:128:15<br>
          ^<br>
<br>
--<br>
<br>
********************<br>
<br>
. . .<br>
<br>
********************<br>
Failing Tests (1):<br>
     UBSan-MSan-powerpc64le :: TestCases/TypeCheck/vptr.cpp<br>
<br>
   Expected Passes    : 135<br>
   Expected Failures  : 1<br>
   Unsupported Tests  : 7<br>
   Unexpected Failures: 1<br>
<br>
<br>
Note that it is a known issue that the bots do not handle compiler_rt<br>
changes very well.<br>
<br>
On 08/23/16 19:18, Vitaly Buka via llvm-commits wrote:<br>
> For some reasons the bot does not report compiler-rt changes, and the<br>
> build had something very relevant:<br>
> <a href="http://llvm.org/viewvc/llvm-project?revision=279572&view=revision" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?revision=279572&view=revision</a><br>
><br>
> On Tue, Aug 23, 2016 at 4:19 PM Vitaly Buka <<a href="mailto:vitalybuka@google.com" target="_blank">vitalybuka@google.com</a><br>
> <mailto:<a href="mailto:vitalybuka@google.com" target="_blank">vitalybuka@google.com</a>>> wrote:<br>
><br>
>     I have no hardware. I will try to build different revisions on the<br>
>     bot to localize issue.<br>
><br>
>     On Tue, Aug 23, 2016 at 4:08 PM Matthias Braun <<a href="mailto:matze@braunis.de" target="_blank">matze@braunis.de</a><br>
>     <mailto:<a href="mailto:matze@braunis.de" target="_blank">matze@braunis.de</a>>> wrote:<br>
><br>
>         I don't see a connection between the changes and the error<br>
>         symptom... Do you have the possibility to revert just this patch<br>
>         to verify?<br>
><br>
>>         On Aug 23, 2016, at 3:13 PM, Vitaly Buka<br>
>>         <<a href="mailto:vitalybuka@google.com" target="_blank">vitalybuka@google.com</a> <mailto:<a href="mailto:vitalybuka@google.com" target="_blank">vitalybuka@google.com</a>>> wrote:<br>
>><br>
>>         This<br>
>>         patch? <a href="http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/9417/steps/ninja%20check%201/logs/stdio" rel="noreferrer" target="_blank">http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/9417/steps/ninja%20check%201/logs/stdio</a><br>
>><br>
>>         On Tue, Aug 23, 2016 at 2:27 PM Matthias Braun via<br>
>>         llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
>>         <mailto:<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>>> wrote:<br>
>><br>
>>             Author: matze<br>
>>             Date: Tue Aug 23 16:19:49 2016<br>
>>             New Revision: 279573<br>
>><br>
>>             URL: <a href="http://llvm.org/viewvc/llvm-project?rev=279573&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=279573&view=rev</a><br>
>>             Log:<br>
>>             MachineFunction: Introduce NoPHIs property<br>
>><br>
>>             I want to compute the SSA property of .mir files<br>
>>             automatically in<br>
>>             upcoming patches. The problem with this is that some<br>
>>             inputs will be<br>
>>             reported as static single assignment with some passes<br>
>>             claiming not to<br>
>>             support SSA form.  In reality though those passes do not<br>
>>             support PHI<br>
>>             instructions => Track the presence of PHI instructions<br>
>>             separate from the<br>
>>             SSA property.<br>
>><br>
>>             Differential Revision: <a href="https://reviews.llvm.org/D22719" rel="noreferrer" target="_blank">https://reviews.llvm.org/D22719</a><br>
>><br>
>>             Modified:<br>
>>                 llvm/trunk/include/llvm/CodeGen/MachineFunction.h<br>
>>                 llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp<br>
>>                 llvm/trunk/lib/CodeGen/MachineFunction.cpp<br>
>>                 llvm/trunk/lib/CodeGen/MachineVerifier.cpp<br>
>>                 llvm/trunk/lib/CodeGen/PHIElimination.cpp<br>
>>                 llvm/trunk/lib/CodeGen/RegAllocBasic.cpp<br>
>>                 llvm/trunk/lib/CodeGen/RegAllocFast.cpp<br>
>>                 llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp<br>
>>                 llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp<br>
>>                 llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp<br>
>><br>
>>             Modified: llvm/trunk/include/llvm/CodeGen/MachineFunction.h<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFunction.h?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/include/llvm/CodeGen/MachineFunction.h<br>
>>             (original)<br>
>>             +++ llvm/trunk/include/llvm/CodeGen/MachineFunction.h Tue<br>
>>             Aug 23 16:19:49 2016<br>
>>             @@ -92,6 +92,7 @@ public:<br>
>>                // Property descriptions:<br>
>>                // IsSSA: True when the machine function is in SSA form<br>
>>             and virtual registers<br>
>>                //  have a single def.<br>
>>             +  // NoPHIs: The machine function does not contain any<br>
>>             PHI instruction.<br>
>>                // TracksLiveness: True when tracking register liveness<br>
>>             accurately.<br>
>>                //  While this property is set, register liveness<br>
>>             information in basic block<br>
>>                //  live-in lists and machine instruction operands<br>
>>             (e.g. kill flags, implicit<br>
>>             @@ -117,6 +118,7 @@ public:<br>
>>                //  all sizes attached to them have been eliminated.<br>
>>                enum class Property : unsigned {<br>
>>                  IsSSA,<br>
>>             +    NoPHIs,<br>
>>                  TracksLiveness,<br>
>>                  AllVRegsAllocated,<br>
>>                  Legalized,<br>
>><br>
>>             Modified: llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp (original)<br>
>>             +++ llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp Tue Aug<br>
>>             23 16:19:49 2016<br>
>>             @@ -160,6 +160,8 @@ private:<br>
>>                ///<br>
>>                /// Return null if the name isn't a register bank.<br>
>>                const RegisterBank *getRegBank(const MachineFunction<br>
>>             &MF, StringRef Name);<br>
>>             +<br>
>>             +  void computeFunctionProperties(MachineFunction &MF);<br>
>>              };<br>
>><br>
>>              } // end namespace llvm<br>
>>             @@ -279,6 +281,19 @@ void MIRParserImpl::createDummyFunction(<br>
>>                new UnreachableInst(Context, BB);<br>
>>              }<br>
>><br>
>>             +static bool hasPHI(const MachineFunction &MF) {<br>
>>             +  for (const MachineBasicBlock &MBB : MF)<br>
>>             +    for (const MachineInstr &MI : MBB)<br>
>>             +      if (MI.isPHI())<br>
>>             +        return true;<br>
>>             +  return false;<br>
>>             +}<br>
>>             +<br>
>>             +void<br>
>>             MIRParserImpl::computeFunctionProperties(MachineFunction<br>
>>             &MF) {<br>
>>             +  if (!hasPHI(MF))<br>
>>             +<br>
>>             MF.getProperties().set(MachineFunctionProperties::Property::NoPHIs);<br>
>>             +}<br>
>>             +<br>
>>              bool<br>
>>             MIRParserImpl::initializeMachineFunction(MachineFunction<br>
>>             &MF) {<br>
>>                auto It = Functions.find(MF.getName());<br>
>>                if (It == Functions.end())<br>
>>             @@ -353,6 +368,9 @@ bool MIRParserImpl::initializeMachineFun<br>
>>                <a href="http://PFS.SM" rel="noreferrer" target="_blank">PFS.SM</a> <<a href="http://pfs.sm/" rel="noreferrer" target="_blank">http://pfs.sm/</a>> = &SM;<br>
>><br>
>>                inferRegisterInfo(PFS, YamlMF);<br>
>>             +<br>
>>             +  computeFunctionProperties(MF);<br>
>>             +<br>
>>                // FIXME: This is a temporary workaround until the<br>
>>             reserved registers can be<br>
>>                // serialized.<br>
>>                MF.getRegInfo().freezeReservedRegs(MF);<br>
>><br>
>>             Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)<br>
>>             +++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Tue Aug 23<br>
>>             16:19:49 2016<br>
>>             @@ -60,6 +60,7 @@ static const char *getPropertyName(Machi<br>
>>                case P::AllVRegsAllocated: return "AllVRegsAllocated";<br>
>>                case P::IsSSA: return "IsSSA";<br>
>>                case P::Legalized: return "Legalized";<br>
>>             +  case P::NoPHIs: return "NoPHIs";<br>
>>                case P::RegBankSelected: return "RegBankSelected";<br>
>>                case P::Selected: return "Selected";<br>
>>                case P::TracksLiveness: return "TracksLiveness";<br>
>><br>
>>             Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)<br>
>>             +++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Tue Aug 23<br>
>>             16:19:49 2016<br>
>>             @@ -858,6 +858,10 @@ void MachineVerifier::visitMachineInstrB<br>
>>                      << MI->getNumOperands() << " given.\n";<br>
>>                }<br>
>><br>
>>             +  if (MI->isPHI() && MF->getProperties().hasProperty(<br>
>>             +          MachineFunctionProperties::Property::NoPHIs))<br>
>>             +    report("Found PHI instruction with NoPHIs property<br>
>>             set", MI);<br>
>>             +<br>
>>                // Check the tied operands.<br>
>>                if (MI->isInlineAsm())<br>
>>                  verifyInlineAsm(MI);<br>
>><br>
>>             Modified: llvm/trunk/lib/CodeGen/PHIElimination.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PHIElimination.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/CodeGen/PHIElimination.cpp (original)<br>
>>             +++ llvm/trunk/lib/CodeGen/PHIElimination.cpp Tue Aug 23<br>
>>             16:19:49 2016<br>
>>             @@ -175,6 +175,8 @@ bool PHIElimination::runOnMachineFunctio<br>
>>                ImpDefs.clear();<br>
>>                VRegPHIUseCount.clear();<br>
>><br>
>>             +<br>
>>             MF.getProperties().set(MachineFunctionProperties::Property::NoPHIs);<br>
>>             +<br>
>>                return Changed;<br>
>>              }<br>
>><br>
>><br>
>>             Modified: llvm/trunk/lib/CodeGen/RegAllocBasic.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBasic.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBasic.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/CodeGen/RegAllocBasic.cpp (original)<br>
>>             +++ llvm/trunk/lib/CodeGen/RegAllocBasic.cpp Tue Aug 23<br>
>>             16:19:49 2016<br>
>>             @@ -105,6 +105,11 @@ public:<br>
>>                /// Perform register allocation.<br>
>>                bool runOnMachineFunction(MachineFunction &mf) override;<br>
>><br>
>>             +  MachineFunctionProperties getRequiredProperties() const<br>
>>             override {<br>
>>             +    return MachineFunctionProperties().set(<br>
>>             +        MachineFunctionProperties::Property::NoPHIs);<br>
>>             +  }<br>
>>             +<br>
>>                // Helper for spilling all live virtual registers<br>
>>             currently unified under preg<br>
>>                // that interfere with the most recently queried lvr.<br>
>>             Return true if spilling<br>
>>                // was successful, and append any new spilled/split<br>
>>             intervals to splitLVRs.<br>
>><br>
>>             Modified: llvm/trunk/lib/CodeGen/RegAllocFast.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/CodeGen/RegAllocFast.cpp (original)<br>
>>             +++ llvm/trunk/lib/CodeGen/RegAllocFast.cpp Tue Aug 23<br>
>>             16:19:49 2016<br>
>>             @@ -158,6 +158,11 @@ namespace {<br>
>>                    MachineFunctionPass::getAnalysisUsage(AU);<br>
>>                  }<br>
>><br>
>>             +    MachineFunctionProperties getRequiredProperties()<br>
>>             const override {<br>
>>             +      return MachineFunctionProperties().set(<br>
>>             +          MachineFunctionProperties::Property::NoPHIs);<br>
>>             +    }<br>
>>             +<br>
>>                  MachineFunctionProperties getSetProperties() const<br>
>>             override {<br>
>>                    return MachineFunctionProperties().set(<br>
>><br>
>>              MachineFunctionProperties::Property::AllVRegsAllocated);<br>
>>             @@ -1093,8 +1098,6 @@ bool RAFast::runOnMachineFunction(Machin<br>
>>                UsedInInstr.clear();<br>
>>                UsedInInstr.setUniverse(TRI->getNumRegUnits());<br>
>><br>
>>             -  assert(!MRI->isSSA() && "regalloc requires leaving SSA");<br>
>>             -<br>
>>                // initialize the virtual->physical register map to<br>
>>             have a 'null'<br>
>>                // mapping for all virtual registers<br>
>>                StackSlotForVirtReg.resize(MRI->getNumVirtRegs());<br>
>><br>
>>             Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)<br>
>>             +++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Tue Aug 23<br>
>>             16:19:49 2016<br>
>>             @@ -334,6 +334,11 @@ public:<br>
>>                /// Perform register allocation.<br>
>>                bool runOnMachineFunction(MachineFunction &mf) override;<br>
>><br>
>>             +  MachineFunctionProperties getRequiredProperties() const<br>
>>             override {<br>
>>             +    return MachineFunctionProperties().set(<br>
>>             +        MachineFunctionProperties::Property::NoPHIs);<br>
>>             +  }<br>
>>             +<br>
>>                static char ID;<br>
>><br>
>>              private:<br>
>><br>
>>             Modified: llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp (original)<br>
>>             +++ llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp Tue Aug 23<br>
>>             16:19:49 2016<br>
>>             @@ -109,6 +109,11 @@ public:<br>
>>                /// Perform register allocation<br>
>>                bool runOnMachineFunction(MachineFunction &MF) override;<br>
>><br>
>>             +  MachineFunctionProperties getRequiredProperties() const<br>
>>             override {<br>
>>             +    return MachineFunctionProperties().set(<br>
>>             +        MachineFunctionProperties::Property::NoPHIs);<br>
>>             +  }<br>
>>             +<br>
>>              private:<br>
>><br>
>>                typedef std::map<const LiveInterval*, unsigned> LI2NodeMap;<br>
>><br>
>>             Modified:<br>
>>             llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp<br>
>>             URL:<br>
>>             <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp?rev=279573&r1=279572&r2=279573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp?rev=279573&r1=279572&r2=279573&view=diff</a><br>
>>             ==============================================================================<br>
>>             --- llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp<br>
>>             (original)<br>
>>             +++ llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp<br>
>>             Tue Aug 23 16:19:49 2016<br>
>>             @@ -98,6 +98,11 @@ public:<br>
>>                  return "SI Load / Store Optimizer";<br>
>>                }<br>
>><br>
>>             +  MachineFunctionProperties getRequiredProperties() const<br>
>>             override {<br>
>>             +    return MachineFunctionProperties().set(<br>
>>             +      MachineFunctionProperties::Property::NoPHIs);<br>
>>             +  }<br>
>>             +<br>
>>                void getAnalysisUsage(AnalysisUsage &AU) const override {<br>
>>                  AU.setPreservesCFG();<br>
>>                  AU.addPreserved<SlotIndexes>();<br>
>>             @@ -425,8 +430,6 @@ bool SILoadStoreOptimizer::runOnMachineF<br>
>><br>
>>                DEBUG(dbgs() << "Running SILoadStoreOptimizer\n");<br>
>><br>
>>             -  assert(!MRI->isSSA());<br>
>>             -<br>
>>                bool Modified = false;<br>
>><br>
>>                for (MachineBasicBlock &MBB : MF)<br>
>><br>
>><br>
>>             _______________________________________________<br>
>>             llvm-commits mailing list<br>
>>             <a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
>>             <mailto:<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>><br>
>>             <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
>><br>
><br>
><br>
><br>
> _______________________________________________<br>
> llvm-commits mailing list<br>
> <a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
> <a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
><br>
<br>
<br>
--<br>
<br>
-Bill Seurer<br>
<br>
</blockquote></div>
</div></div><br>_______________________________________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
<br></blockquote></div><br></div>
</blockquote></div>