<div dir="ltr">Krzysztof,<br><div><br></div><div>I think it breaks build bots:</div><div><br></div><div><a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/12555">http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/12555</a><br></div><div><br></div><div><div>/mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp:2052:26: runtime error: left shift of negative value -2</div><div> #0 0x1010d5d in (anonymous namespace)::HexagonConstEvaluator::evaluate(llvm::MachineInstr const&, (anonymous namespace)::MachineConstPropagator::CellMap const&, (anonymous namespace)::MachineConstPropagator::CellMap&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp:2052:26</div><div> #1 0x101ec38 in (anonymous namespace)::MachineConstPropagator::visitNonBranch(llvm::MachineInstr const&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp:652:19</div><div> #2 0x101d238 in (anonymous namespace)::MachineConstPropagator::propagate(llvm::MachineFunction&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp:906:9</div><div> #3 0x100f8be in (anonymous namespace)::MachineConstPropagator::run(llvm::MachineFunction&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp:1051:3</div><div> #4 0x100f4ca in (anonymous namespace)::HexagonConstPropagation::runOnMachineFunction(llvm::MachineFunction&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp:1924:42</div><div> #5 0x1de4382 in llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/CodeGen/MachineFunctionPass.cpp:60:13</div><div> #6 0x22b341e in llvm::FPPassManager::runOnFunction(llvm::Function&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/LegacyPassManager.cpp:1526:27</div><div> #7 0x22b380b in llvm::FPPassManager::runOnModule(llvm::Module&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/LegacyPassManager.cpp:1547:16</div><div> #8 0x22b4323 in (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/LegacyPassManager.cpp:1603:27</div><div> #9 0x22b3c53 in llvm::legacy::PassManagerImpl::run(llvm::Module&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/lib/IR/LegacyPassManager.cpp:1706:44</div><div> #10 0x8b2418 in compileModule(char**, llvm::LLVMContext&) /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/tools/llc/llc.cpp:497:8</div><div> #11 0x8b128a in main /mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm/tools/llc/llc.cpp:265:22</div><div> #12 0x7efd4f842f44 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x21f44)</div><div> #13 0x88af8d in _start (/mnt/b/sanitizer-buildbot2/sanitizer-x86_64-linux-bootstrap/build/llvm_build_ubsan/bin/llc+0x88af8d)</div><div><br></div></div></div><br><div class="gmail_quote"><div dir="ltr">On Thu, Jul 28, 2016 at 1:09 PM Krzysztof Parzyszek via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: kparzysz<br>
Date: Thu Jul 28 15:01:59 2016<br>
New Revision: 277028<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=277028&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=277028&view=rev</a><br>
Log:<br>
[Hexagon] Implement MI-level constant propagation<br>
<br>
Added:<br>
llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp<br>
llvm/trunk/test/CodeGen/Hexagon/constp-clb.ll<br>
llvm/trunk/test/CodeGen/Hexagon/constp-combine-neg.ll<br>
llvm/trunk/test/CodeGen/Hexagon/constp-ctb.ll<br>
llvm/trunk/test/CodeGen/Hexagon/constp-extract.ll<br>
llvm/trunk/test/CodeGen/Hexagon/constp-physreg.ll<br>
llvm/trunk/test/CodeGen/Hexagon/constp-rewrite-branches.ll<br>
llvm/trunk/test/CodeGen/Hexagon/constp-rseq.ll<br>
llvm/trunk/test/CodeGen/Hexagon/constp-vsplat.ll<br>
Modified:<br>
llvm/trunk/lib/Target/Hexagon/CMakeLists.txt<br>
llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp<br>
llvm/trunk/test/CodeGen/Hexagon/vect/vect-vsplatb.ll<br>
llvm/trunk/test/CodeGen/Hexagon/vect/vect-vsplath.ll<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/CMakeLists.txt<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/CMakeLists.txt?rev=277028&r1=277027&r2=277028&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/CMakeLists.txt?rev=277028&r1=277027&r2=277028&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/CMakeLists.txt (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/CMakeLists.txt Thu Jul 28 15:01:59 2016<br>
@@ -21,6 +21,7 @@ add_llvm_target(HexagonCodeGen<br>
HexagonBranchRelaxation.cpp<br>
HexagonCFGOptimizer.cpp<br>
HexagonCommonGEP.cpp<br>
+ HexagonConstPropagation.cpp<br>
HexagonCopyToCombine.cpp<br>
HexagonEarlyIfConv.cpp<br>
HexagonExpandCondsets.cpp<br>
<br>
Added: llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp?rev=277028&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp?rev=277028&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp (added)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp Thu Jul 28 15:01:59 2016<br>
@@ -0,0 +1,3208 @@<br>
+//===--- HexagonConstPropagation.cpp --------------------------------------===//<br>
+//<br>
+// The LLVM Compiler Infrastructure<br>
+//<br>
+// This file is distributed under the University of Illinois Open Source<br>
+// License. See LICENSE.TXT for details.<br>
+//<br>
+//===----------------------------------------------------------------------===//<br>
+<br>
+#define DEBUG_TYPE "hcp"<br>
+<br>
+#include "HexagonInstrInfo.h"<br>
+#include "HexagonRegisterInfo.h"<br>
+#include "HexagonSubtarget.h"<br>
+<br>
+#include "llvm/ADT/PostOrderIterator.h"<br>
+#include "llvm/ADT/SetVector.h"<br>
+#include "llvm/CodeGen/MachineFunction.h"<br>
+#include "llvm/CodeGen/MachineFunctionPass.h"<br>
+#include "llvm/CodeGen/MachineInstrBuilder.h"<br>
+#include "llvm/CodeGen/MachineRegisterInfo.h"<br>
+#include "llvm/IR/Constants.h"<br>
+#include "llvm/Support/CommandLine.h"<br>
+#include "llvm/Support/Debug.h"<br>
+#include "llvm/Support/raw_ostream.h"<br>
+#include "llvm/Target/TargetInstrInfo.h"<br>
+<br>
+#include <map><br>
+#include <queue><br>
+#include <set><br>
+<br>
+using namespace llvm;<br>
+<br>
+namespace {<br>
+ class LatticeCell;<br>
+<br>
+ // Properties of a value that are tracked by the propagation.<br>
+ // A property that is marked as present (i.e. bit is set) dentes that the<br>
+ // value is known (proven) to have this property. Not all combinations<br>
+ // of bits make sense, for example Zero and NonZero are mutually exclusive,<br>
+ // but on the other hand, Zero implies Finite. In this case, whenever<br>
+ // the Zero property is present, Finite should also be present.<br>
+ class ConstantProperties {<br>
+ public:<br>
+ enum {<br>
+ Unknown = 0x0000,<br>
+ Zero = 0x0001,<br>
+ NonZero = 0x0002,<br>
+ Finite = 0x0004,<br>
+ Infinity = 0x0008,<br>
+ NaN = 0x0010,<br>
+ SignedZero = 0x0020,<br>
+ NumericProperties = (Zero|NonZero|Finite|Infinity|NaN|SignedZero),<br>
+ PosOrZero = 0x0100,<br>
+ NegOrZero = 0x0200,<br>
+ SignProperties = (PosOrZero|NegOrZero),<br>
+ Everything = (NumericProperties|SignProperties)<br>
+ };<br>
+<br>
+ // For a given constant, deduce the set of trackable properties that this<br>
+ // constant has.<br>
+ static uint32_t deduce(const Constant *C);<br>
+ };<br>
+<br>
+<br>
+ // A representation of a register as it can appear in a MachineOperand,<br>
+ // i.e. a pair register:subregister.<br>
+ struct Register {<br>
+ unsigned Reg, SubReg;<br>
+ explicit Register(unsigned R, unsigned SR = 0) : Reg(R), SubReg(SR) {}<br>
+ explicit Register(const MachineOperand &MO)<br>
+ : Reg(MO.getReg()), SubReg(MO.getSubReg()) {}<br>
+ void print(const TargetRegisterInfo *TRI = 0) const {<br>
+ dbgs() << PrintReg(Reg, TRI, SubReg);<br>
+ }<br>
+ bool operator== (const Register &R) const {<br>
+ return (Reg == R.Reg) && (SubReg == R.SubReg);<br>
+ }<br>
+ };<br>
+<br>
+<br>
+ // Lattice cell, based on that was described in the W-Z paper on constant<br>
+ // propagation.<br>
+ // Latice cell will be allowed to hold multiple constant values. While<br>
+ // multiple values would normally indicate "bottom", we can still derive<br>
+ // some useful information from them. For example, comparison X > 0<br>
+ // could be folded if all the values in the cell associated with X are<br>
+ // positive.<br>
+ class LatticeCell {<br>
+ private:<br>
+ enum { Normal, Top, Bottom };<br>
+ static const unsigned MaxCellSize = 4;<br>
+ unsigned Kind:2;<br>
+ unsigned Size:3;<br>
+ unsigned IsSpecial:1;<br>
+ unsigned :0;<br>
+<br>
+ public:<br>
+ union {<br>
+ uint32_t Properties;<br>
+ const Constant *Value;<br>
+ const Constant *Values[MaxCellSize];<br>
+ };<br>
+<br>
+ LatticeCell() : Kind(Top), Size(0), IsSpecial(false) {<br>
+ for (unsigned i = 0; i < MaxCellSize; ++i)<br>
+ Values[i] = 0;<br>
+ }<br>
+<br>
+ bool meet(const LatticeCell &L);<br>
+ bool add(const Constant *C);<br>
+ bool add(uint32_t Property);<br>
+ uint32_t properties() const;<br>
+ unsigned size() const { return Size; }<br>
+<br>
+ LatticeCell &operator= (const LatticeCell &L) {<br>
+ if (this != &L) {<br>
+ // This memcpy also copies Properties (when L.Size == 0).<br>
+ uint32_t N = L.IsSpecial ? sizeof L.Properties<br>
+ : L.Size*sizeof(const Constant*);<br>
+ memcpy(Values, L.Values, N);<br>
+ Kind = L.Kind;<br>
+ Size = L.Size;<br>
+ IsSpecial = L.IsSpecial;<br>
+ }<br>
+ return *this;<br>
+ }<br>
+<br>
+ bool isSingle() const { return size() == 1; }<br>
+ bool isProperty() const { return IsSpecial; }<br>
+ bool isTop() const { return Kind == Top; }<br>
+ bool isBottom() const { return Kind == Bottom; }<br>
+ bool setBottom() {<br>
+ bool Changed = (Kind != Bottom);<br>
+ Kind = Bottom;<br>
+ Size = 0;<br>
+ IsSpecial = false;<br>
+ return Changed;<br>
+ }<br>
+ void print(raw_ostream &os) const;<br>
+<br>
+ private:<br>
+ void setProperty() {<br>
+ IsSpecial = true;<br>
+ Size = 0;<br>
+ Kind = Normal;<br>
+ }<br>
+ bool convertToProperty();<br>
+ };<br>
+<br>
+ raw_ostream &operator<< (raw_ostream &os, const LatticeCell &L) {<br>
+ L.print(os);<br>
+ return os;<br>
+ }<br>
+<br>
+ class MachineConstEvaluator;<br>
+<br>
+ class MachineConstPropagator {<br>
+ public:<br>
+ MachineConstPropagator(MachineConstEvaluator &E) : MCE(E) {<br>
+ Bottom.setBottom();<br>
+ }<br>
+<br>
+ // Mapping: vreg -> cell<br>
+ // The keys are registers _without_ subregisters. This won't allow<br>
+ // definitions in the form of "vreg:subreg<def> = ...". Such definitions<br>
+ // would be questionable from the point of view of SSA, since the "vreg"<br>
+ // could not be initialized in its entirety (specifically, an instruction<br>
+ // defining the "other part" of "vreg" would also count as a definition<br>
+ // of "vreg", which would violate the SSA).<br>
+ // If a value of a pair vreg:subreg needs to be obtained, the cell for<br>
+ // "vreg" needs to be looked up, and then the value of subregister "subreg"<br>
+ // needs to be evaluated.<br>
+ class CellMap {<br>
+ public:<br>
+ CellMap() {<br>
+ assert(Top.isTop());<br>
+ Bottom.setBottom();<br>
+ }<br>
+ void clear() { Map.clear(); }<br>
+ bool has(unsigned R) const {<br>
+ // All non-virtual registers are considered "bottom".<br>
+ if (!TargetRegisterInfo::isVirtualRegister(R))<br>
+ return true;<br>
+ MapType::const_iterator F = Map.find(R);<br>
+ return F != Map.end();<br>
+ }<br>
+ const LatticeCell &get(unsigned R) const {<br>
+ if (!TargetRegisterInfo::isVirtualRegister(R))<br>
+ return Bottom;<br>
+ MapType::const_iterator F = Map.find(R);<br>
+ if (F != Map.end())<br>
+ return F->second;<br>
+ return Top;<br>
+ }<br>
+ // Invalidates any const references.<br>
+ void update(unsigned R, const LatticeCell &L) {<br>
+ Map[R] = L;<br>
+ }<br>
+ void print(raw_ostream &os, const TargetRegisterInfo &TRI) const;<br>
+ private:<br>
+ typedef std::map<unsigned,LatticeCell> MapType;<br>
+ MapType Map;<br>
+ // To avoid creating "top" entries, return a const reference to<br>
+ // this cell in "get". Also, have a "Bottom" cell to return from<br>
+ // get when a value of a physical register is requested.<br>
+ LatticeCell Top, Bottom;<br>
+ public:<br>
+ typedef MapType::const_iterator const_iterator;<br>
+ const_iterator begin() const { return Map.begin(); }<br>
+ const_iterator end() const { return Map.end(); }<br>
+ };<br>
+<br>
+ bool run(MachineFunction &MF);<br>
+<br>
+ private:<br>
+ void visitPHI(const MachineInstr &PN);<br>
+ void visitNonBranch(const MachineInstr &MI);<br>
+ void visitBranchesFrom(const MachineInstr &BrI);<br>
+ void visitUsesOf(unsigned R);<br>
+ bool isExecutable(const MachineBasicBlock *MB) const;<br>
+ void pushLayoutSuccessor(const MachineBasicBlock *MB);<br>
+ bool computeBlockSuccessors(const MachineBasicBlock *MB,<br>
+ SetVector<const MachineBasicBlock*> &Targets);<br>
+ void removeCFGEdge(MachineBasicBlock *From, MachineBasicBlock *To);<br>
+<br>
+ void propagate(MachineFunction &MF);<br>
+ bool rewrite(MachineFunction &MF);<br>
+<br>
+ MachineRegisterInfo *MRI;<br>
+ MachineConstEvaluator &MCE;<br>
+<br>
+ typedef std::pair<unsigned,unsigned> CFGEdge;<br>
+ typedef std::set<CFGEdge> SetOfCFGEdge;<br>
+ typedef std::set<const MachineInstr*> SetOfInstr;<br>
+ typedef std::queue<CFGEdge> QueueOfCFGEdge;<br>
+<br>
+ LatticeCell Bottom;<br>
+ CellMap Cells;<br>
+ SetOfCFGEdge EdgeExec;<br>
+ SetOfInstr InstrExec;<br>
+ QueueOfCFGEdge FlowQ;<br>
+ };<br>
+<br>
+<br>
+ // The "evaluator/rewriter" of machine instructions. This is an abstract<br>
+ // base class that provides the interface that the propagator will use,<br>
+ // as well as some helper functions that are target-independent.<br>
+ class MachineConstEvaluator {<br>
+ public:<br>
+ MachineConstEvaluator(MachineFunction &Fn)<br>
+ : TRI(*Fn.getSubtarget().getRegisterInfo()),<br>
+ MF(Fn), CX(Fn.getFunction()->getContext()) {}<br>
+ virtual ~MachineConstEvaluator() {}<br>
+<br>
+ // The required interface:<br>
+ // - A set of three "evaluate" functions. Each returns "true" if the<br>
+ // computation succeeded, "false" otherwise.<br>
+ // (1) Given an instruction MI, and the map with input values "Inputs",<br>
+ // compute the set of output values "Outputs". An example of when<br>
+ // the computation can "fail" is if MI is not an instruction that<br>
+ // is recognized by the evaluator.<br>
+ // (2) Given a register R (as reg:subreg), compute the cell that<br>
+ // corresponds to the "subreg" part of the given register.<br>
+ // (3) Given a branch instruction BrI, compute the set of target blocks.<br>
+ // If the branch can fall-through, add null (0) to the list of<br>
+ // possible targets.<br>
+ // - A function "rewrite", that given the cell map after propagation,<br>
+ // could rewrite instruction MI in a more beneficial form. Return<br>
+ // "true" if a change has been made, "false" otherwise.<br>
+ typedef MachineConstPropagator::CellMap CellMap;<br>
+ virtual bool evaluate(const MachineInstr &MI, const CellMap &Inputs,<br>
+ CellMap &Outputs) = 0;<br>
+ virtual bool evaluate(const Register &R, const LatticeCell &SrcC,<br>
+ LatticeCell &Result) = 0;<br>
+ virtual bool evaluate(const MachineInstr &BrI, const CellMap &Inputs,<br>
+ SetVector<const MachineBasicBlock*> &Targets,<br>
+ bool &CanFallThru) = 0;<br>
+ virtual bool rewrite(MachineInstr &MI, const CellMap &Inputs) = 0;<br>
+<br>
+ const TargetRegisterInfo &TRI;<br>
+<br>
+ protected:<br>
+ MachineFunction &MF;<br>
+ LLVMContext &CX;<br>
+<br>
+ struct Comparison {<br>
+ enum {<br>
+ Unk = 0x00,<br>
+ EQ = 0x01,<br>
+ NE = 0x02,<br>
+ L = 0x04, // Less-than property.<br>
+ G = 0x08, // Greater-than property.<br>
+ U = 0x40, // Unsigned property.<br>
+ LTs = L,<br>
+ LEs = L | EQ,<br>
+ GTs = G,<br>
+ GEs = G | EQ,<br>
+ LTu = L | U,<br>
+ LEu = L | EQ | U,<br>
+ GTu = G | U,<br>
+ GEu = G | EQ | U<br>
+ };<br>
+ static uint32_t negate(uint32_t Cmp) {<br>
+ if (Cmp == EQ)<br>
+ return NE;<br>
+ if (Cmp == NE)<br>
+ return EQ;<br>
+ assert((Cmp & (L|G)) != (L|G));<br>
+ return Cmp ^ (L|G);<br>
+ }<br>
+ };<br>
+<br>
+ // Helper functions.<br>
+<br>
+ bool getCell(const Register &R, const CellMap &Inputs, LatticeCell &RC);<br>
+ bool constToInt(const Constant *C, APInt &Val) const;<br>
+ bool constToFloat(const Constant *C, APFloat &Val) const;<br>
+ const ConstantInt *intToConst(const APInt &Val) const;<br>
+<br>
+ // Compares.<br>
+ bool evaluateCMPrr(uint32_t Cmp, const Register &R1, const Register &R2,<br>
+ const CellMap &Inputs, bool &Result);<br>
+ bool evaluateCMPri(uint32_t Cmp, const Register &R1, const APInt &A2,<br>
+ const CellMap &Inputs, bool &Result);<br>
+ bool evaluateCMPrp(uint32_t Cmp, const Register &R1, uint64_t Props2,<br>
+ const CellMap &Inputs, bool &Result);<br>
+ bool evaluateCMPii(uint32_t Cmp, const APInt &A1, const APInt &A2,<br>
+ bool &Result);<br>
+ bool evaluateCMPpi(uint32_t Cmp, uint32_t Props, const APInt &A2,<br>
+ bool &Result);<br>
+ bool evaluateCMPpp(uint32_t Cmp, uint32_t Props1, uint32_t Props2,<br>
+ bool &Result);<br>
+<br>
+ bool evaluateCOPY(const Register &R1, const CellMap &Inputs,<br>
+ LatticeCell &Result);<br>
+<br>
+ // Logical operations.<br>
+ bool evaluateANDrr(const Register &R1, const Register &R2,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateANDri(const Register &R1, const APInt &A2,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateANDii(const APInt &A1, const APInt &A2, APInt &Result);<br>
+ bool evaluateORrr(const Register &R1, const Register &R2,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateORri(const Register &R1, const APInt &A2,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateORii(const APInt &A1, const APInt &A2, APInt &Result);<br>
+ bool evaluateXORrr(const Register &R1, const Register &R2,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateXORri(const Register &R1, const APInt &A2,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateXORii(const APInt &A1, const APInt &A2, APInt &Result);<br>
+<br>
+ // Extensions.<br>
+ bool evaluateZEXTr(const Register &R1, unsigned Width, unsigned Bits,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateZEXTi(const APInt &A1, unsigned Width, unsigned Bits,<br>
+ APInt &Result);<br>
+ bool evaluateSEXTr(const Register &R1, unsigned Width, unsigned Bits,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateSEXTi(const APInt &A1, unsigned Width, unsigned Bits,<br>
+ APInt &Result);<br>
+<br>
+ // Leading/trailing bits.<br>
+ bool evaluateCLBr(const Register &R1, bool Zeros, bool Ones,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateCLBi(const APInt &A1, bool Zeros, bool Ones, APInt &Result);<br>
+ bool evaluateCTBr(const Register &R1, bool Zeros, bool Ones,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateCTBi(const APInt &A1, bool Zeros, bool Ones, APInt &Result);<br>
+<br>
+ // Bitfield extract.<br>
+ bool evaluateEXTRACTr(const Register &R1, unsigned Width, unsigned Bits,<br>
+ unsigned Offset, bool Signed, const CellMap &Inputs,<br>
+ LatticeCell &Result);<br>
+ bool evaluateEXTRACTi(const APInt &A1, unsigned Bits, unsigned Offset,<br>
+ bool Signed, APInt &Result);<br>
+ // Vector operations.<br>
+ bool evaluateSplatr(const Register &R1, unsigned Bits, unsigned Count,<br>
+ const CellMap &Inputs, LatticeCell &Result);<br>
+ bool evaluateSplati(const APInt &A1, unsigned Bits, unsigned Count,<br>
+ APInt &Result);<br>
+ };<br>
+<br>
+}<br>
+<br>
+uint32_t ConstantProperties::deduce(const Constant *C) {<br>
+ if (isa<ConstantInt>(C)) {<br>
+ const ConstantInt *CI = cast<ConstantInt>(C);<br>
+ if (CI->isZero())<br>
+ return Zero | PosOrZero | NegOrZero | Finite;<br>
+ uint32_t Props = (NonZero | Finite);<br>
+ if (CI->isNegative())<br>
+ return Props | NegOrZero;<br>
+ return Props | PosOrZero;<br>
+ }<br>
+<br>
+ if (isa<ConstantFP>(C)) {<br>
+ const ConstantFP *CF = cast<ConstantFP>(C);<br>
+ uint32_t Props = CF->isNegative() ? (NegOrZero|NonZero)<br>
+ : PosOrZero;<br>
+ if (CF->isZero())<br>
+ return (Props & ~NumericProperties) | (Zero|Finite);<br>
+ Props = (Props & ~NumericProperties) | NonZero;<br>
+ if (CF->isNaN())<br>
+ return (Props & ~NumericProperties) | NaN;<br>
+ const APFloat &Val = CF->getValueAPF();<br>
+ if (Val.isInfinity())<br>
+ return (Props & ~NumericProperties) | Infinity;<br>
+ Props |= Finite;<br>
+ return Props;<br>
+ }<br>
+<br>
+ return Unknown;<br>
+}<br>
+<br>
+<br>
+// Convert a cell from a set of specific values to a cell that tracks<br>
+// properties.<br>
+bool LatticeCell::convertToProperty() {<br>
+ if (isProperty())<br>
+ return false;<br>
+ // Corner case: converting a fresh (top) cell to "special".<br>
+ // This can happen, when adding a property to a top cell.<br>
+ uint32_t Everything = ConstantProperties::Everything;<br>
+ uint32_t Ps = !isTop() ? properties()<br>
+ : Everything;<br>
+ if (Ps != ConstantProperties::Unknown) {<br>
+ Properties = Ps;<br>
+ setProperty();<br>
+ } else {<br>
+ setBottom();<br>
+ }<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+void LatticeCell::print(raw_ostream &os) const {<br>
+ if (isProperty()) {<br>
+ os << "{ ";<br>
+ uint32_t Ps = properties();<br>
+ if (Ps & ConstantProperties::Zero)<br>
+ os << "zero ";<br>
+ if (Ps & ConstantProperties::NonZero)<br>
+ os << "nonzero ";<br>
+ if (Ps & ConstantProperties::Finite)<br>
+ os << "finite ";<br>
+ if (Ps & ConstantProperties::Infinity)<br>
+ os << "infinity ";<br>
+ if (Ps & ConstantProperties::NaN)<br>
+ os << "nan ";<br>
+ if (Ps & ConstantProperties::PosOrZero)<br>
+ os << "poz ";<br>
+ if (Ps & ConstantProperties::NegOrZero)<br>
+ os << "nez ";<br>
+ os << '}';<br>
+ return;<br>
+ }<br>
+<br>
+ os << "{ ";<br>
+ if (isBottom()) {<br>
+ os << "bottom";<br>
+ } else if (isTop()) {<br>
+ os << "top";<br>
+ } else {<br>
+ for (unsigned i = 0; i < size(); ++i) {<br>
+ const Constant *C = Values[i];<br>
+ if (i != 0)<br>
+ os << ", ";<br>
+ C->print(os);<br>
+ }<br>
+ }<br>
+ os << " }";<br>
+}<br>
+<br>
+<br>
+// "Meet" operation on two cells. This is the key of the propagation<br>
+// algorithm.<br>
+bool LatticeCell::meet(const LatticeCell &L) {<br>
+ bool Changed = false;<br>
+ if (L.isBottom())<br>
+ Changed = setBottom();<br>
+ if (isBottom() || L.isTop())<br>
+ return Changed;<br>
+ if (isTop()) {<br>
+ *this = L;<br>
+ // L can be neither Top nor Bottom, so *this must have changed.<br>
+ return true;<br>
+ }<br>
+<br>
+ // Top/bottom cases covered. Need to integrate L's set into ours.<br>
+ if (L.isProperty())<br>
+ return add(L.properties());<br>
+ for (unsigned i = 0; i < L.size(); ++i) {<br>
+ const Constant *LC = L.Values[i];<br>
+ Changed |= add(LC);<br>
+ }<br>
+ return Changed;<br>
+}<br>
+<br>
+<br>
+// Add a new constant to the cell. This is actually where the cell update<br>
+// happens. If a cell has room for more constants, the new constant is added.<br>
+// Otherwise, the cell is converted to a "property" cell (i.e. a cell that<br>
+// will track properties of the associated values, and not the values<br>
+// themselves. Care is taken to handle special cases, like "bottom", etc.<br>
+bool LatticeCell::add(const Constant *LC) {<br>
+ assert(LC);<br>
+ if (isBottom())<br>
+ return false;<br>
+<br>
+ if (!isProperty()) {<br>
+ // Cell is not special. Try to add the constant here first,<br>
+ // if there is room.<br>
+ unsigned Index = 0;<br>
+ while (Index < Size) {<br>
+ const Constant *C = Values[Index];<br>
+ // If the constant is already here, no change is needed.<br>
+ if (C == LC)<br>
+ return false;<br>
+ Index++;<br>
+ }<br>
+ if (Index < MaxCellSize) {<br>
+ Values[Index] = LC;<br>
+ Kind = Normal;<br>
+ Size++;<br>
+ return true;<br>
+ }<br>
+ }<br>
+<br>
+ bool Changed = false;<br>
+<br>
+ // This cell is special, or is not special, but is full. After this<br>
+ // it will be special.<br>
+ Changed = convertToProperty();<br>
+ uint32_t Ps = properties();<br>
+ uint32_t NewPs = Ps & ConstantProperties::deduce(LC);<br>
+ if (NewPs == ConstantProperties::Unknown) {<br>
+ setBottom();<br>
+ return true;<br>
+ }<br>
+ if (Ps != NewPs) {<br>
+ Properties = NewPs;<br>
+ Changed = true;<br>
+ }<br>
+ return Changed;<br>
+}<br>
+<br>
+<br>
+// Add a property to the cell. This will force the cell to become a property-<br>
+// tracking cell.<br>
+bool LatticeCell::add(uint32_t Property) {<br>
+ bool Changed = convertToProperty();<br>
+ uint32_t Ps = properties();<br>
+ if (Ps == (Ps & Property))<br>
+ return Changed;<br>
+ Properties = Property & Ps;<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+// Return the properties of the values in the cell. This is valid for any<br>
+// cell, and does not alter the cell itself.<br>
+uint32_t LatticeCell::properties() const {<br>
+ if (isProperty())<br>
+ return Properties;<br>
+ assert(!isTop() && "Should not call this for a top cell");<br>
+ if (isBottom())<br>
+ return ConstantProperties::Unknown;<br>
+<br>
+ assert(size() > 0 && "Empty cell");<br>
+ uint32_t Ps = ConstantProperties::deduce(Values[0]);<br>
+ for (unsigned i = 1; i < size(); ++i) {<br>
+ if (Ps == ConstantProperties::Unknown)<br>
+ break;<br>
+ Ps &= ConstantProperties::deduce(Values[i]);<br>
+ }<br>
+ return Ps;<br>
+}<br>
+<br>
+<br>
+void MachineConstPropagator::CellMap::print(raw_ostream &os,<br>
+ const TargetRegisterInfo &TRI) const {<br>
+ for (auto &I : Map)<br>
+ dbgs() << " " << PrintReg(I.first, &TRI) << " -> " << I.second << '\n';<br>
+}<br>
+<br>
+<br>
+void MachineConstPropagator::visitPHI(const MachineInstr &PN) {<br>
+ const MachineBasicBlock *MB = PN.getParent();<br>
+ unsigned MBN = MB->getNumber();<br>
+ DEBUG(dbgs() << "Visiting FI(BB#" << MBN << "): " << PN);<br>
+<br>
+ const MachineOperand &MD = PN.getOperand(0);<br>
+ Register DefR(MD);<br>
+ assert(TargetRegisterInfo::isVirtualRegister(DefR.Reg));<br>
+<br>
+ bool Changed = false;<br>
+<br>
+ // If the def has a sub-register, set the corresponding cell to "bottom".<br>
+ if (DefR.SubReg) {<br>
+Bottomize:<br>
+ const LatticeCell &T = Cells.get(DefR.Reg);<br>
+ Changed = !T.isBottom();<br>
+ Cells.update(DefR.Reg, Bottom);<br>
+ if (Changed)<br>
+ visitUsesOf(DefR.Reg);<br>
+ return;<br>
+ }<br>
+<br>
+ LatticeCell DefC = Cells.get(DefR.Reg);<br>
+<br>
+ for (unsigned i = 1, n = PN.getNumOperands(); i < n; i += 2) {<br>
+ const MachineBasicBlock *PB = PN.getOperand(i+1).getMBB();<br>
+ unsigned PBN = PB->getNumber();<br>
+ if (!EdgeExec.count(CFGEdge(PBN, MBN))) {<br>
+ DEBUG(dbgs() << " edge BB#" << PBN << "->BB#" << MBN<br>
+ << " not executable\n");<br>
+ continue;<br>
+ }<br>
+ const MachineOperand &SO = PN.getOperand(i);<br>
+ Register UseR(SO);<br>
+ // If the input is not a virtual register, we don't really know what<br>
+ // value it holds.<br>
+ if (!TargetRegisterInfo::isVirtualRegister(UseR.Reg))<br>
+ goto Bottomize;<br>
+ // If there is no cell for an input register, it means top.<br>
+ if (!Cells.has(UseR.Reg))<br>
+ continue;<br>
+<br>
+ LatticeCell SrcC;<br>
+ bool Eval = MCE.evaluate(UseR, Cells.get(UseR.Reg), SrcC);<br>
+ DEBUG(dbgs() << " edge from BB#" << PBN << ": "<br>
+ << PrintReg(UseR.Reg, &MCE.TRI, UseR.SubReg)<br>
+ << SrcC << '\n');<br>
+ Changed |= Eval ? DefC.meet(SrcC)<br>
+ : DefC.setBottom();<br>
+ Cells.update(DefR.Reg, DefC);<br>
+ if (DefC.isBottom())<br>
+ break;<br>
+ }<br>
+ if (Changed)<br>
+ visitUsesOf(DefR.Reg);<br>
+}<br>
+<br>
+<br>
+void MachineConstPropagator::visitNonBranch(const MachineInstr &MI) {<br>
+ DEBUG(dbgs() << "Visiting MI(BB#" << MI.getParent()->getNumber()<br>
+ << "): " << MI);<br>
+ CellMap Outputs;<br>
+ bool Eval = MCE.evaluate(MI, Cells, Outputs);<br>
+ DEBUG({<br>
+ if (Eval) {<br>
+ dbgs() << " outputs:";<br>
+ for (auto &I : Outputs)<br>
+ dbgs() << ' ' << I.second;<br>
+ dbgs() << '\n';<br>
+ }<br>
+ });<br>
+<br>
+ // Update outputs. If the value was not computed, set all the<br>
+ // def cells to bottom.<br>
+ for (const MachineOperand &MO : MI.operands()) {<br>
+ if (!MO.isReg() || !MO.isDef())<br>
+ continue;<br>
+ Register DefR(MO);<br>
+ // Only track virtual registers.<br>
+ if (!TargetRegisterInfo::isVirtualRegister(DefR.Reg))<br>
+ continue;<br>
+ bool Changed = false;<br>
+ // If the evaluation failed, set cells for all output registers to bottom.<br>
+ if (!Eval) {<br>
+ const LatticeCell &T = Cells.get(DefR.Reg);<br>
+ Changed = !T.isBottom();<br>
+ Cells.update(DefR.Reg, Bottom);<br>
+ } else {<br>
+ // Find the corresponding cell in the computed outputs.<br>
+ // If it's not there, go on to the next def.<br>
+ if (!Outputs.has(DefR.Reg))<br>
+ continue;<br>
+ LatticeCell RC = Cells.get(DefR.Reg);<br>
+ Changed = RC.meet(Outputs.get(DefR.Reg));<br>
+ Cells.update(DefR.Reg, RC);<br>
+ }<br>
+ if (Changed)<br>
+ visitUsesOf(DefR.Reg);<br>
+ }<br>
+}<br>
+<br>
+<br>
+// \brief Starting at a given branch, visit remaining branches in the block.<br>
+// Traverse over the subsequent branches for as long as the preceding one<br>
+// can fall through. Add all the possible targets to the flow work queue,<br>
+// including the potential fall-through to the layout-successor block.<br>
+void MachineConstPropagator::visitBranchesFrom(const MachineInstr &BrI) {<br>
+ const MachineBasicBlock &B = *BrI.getParent();<br>
+ unsigned MBN = B.getNumber();<br>
+ MachineBasicBlock::const_iterator It = BrI.getIterator();<br>
+ MachineBasicBlock::const_iterator End = B.end();<br>
+<br>
+ SetVector<const MachineBasicBlock*> Targets;<br>
+ bool EvalOk = true, FallsThru = true;<br>
+ while (It != End) {<br>
+ const MachineInstr &MI = *It;<br>
+ InstrExec.insert(&MI);<br>
+ DEBUG(dbgs() << "Visiting " << (EvalOk ? "BR" : "br") << "(BB#"<br>
+ << MBN << "): " << MI);<br>
+ // Do not evaluate subsequent branches if the evaluation of any of the<br>
+ // previous branches failed. Keep iterating over the branches only<br>
+ // to mark them as executable.<br>
+ EvalOk = EvalOk && MCE.evaluate(MI, Cells, Targets, FallsThru);<br>
+ if (!EvalOk)<br>
+ FallsThru = true;<br>
+ if (!FallsThru)<br>
+ break;<br>
+ ++It;<br>
+ }<br>
+<br>
+ if (EvalOk) {<br>
+ // Need to add all CFG successors that lead to EH landing pads.<br>
+ // There won't be explicit branches to these blocks, but they must<br>
+ // be processed.<br>
+ for (const MachineBasicBlock *SB : B.successors()) {<br>
+ if (SB->isEHPad())<br>
+ Targets.insert(SB);<br>
+ }<br>
+ if (FallsThru) {<br>
+ const MachineFunction &MF = *B.getParent();<br>
+ MachineFunction::const_iterator BI = B.getIterator();<br>
+ MachineFunction::const_iterator Next = std::next(BI);<br>
+ if (Next != MF.end())<br>
+ Targets.insert(&*Next);<br>
+ }<br>
+ } else {<br>
+ // If the evaluation of the branches failed, make "Targets" to be the<br>
+ // set of all successors of the block from the CFG.<br>
+ // If the evaluation succeeded for all visited branches, then if the<br>
+ // last one set "FallsThru", then add an edge to the layout successor<br>
+ // to the targets.<br>
+ Targets.clear();<br>
+ DEBUG(dbgs() << " failed to evaluate a branch...adding all CFG "<br>
+ "successors\n");<br>
+ for (const MachineBasicBlock *SB : B.successors())<br>
+ Targets.insert(SB);<br>
+ }<br>
+<br>
+ for (const MachineBasicBlock *TB : Targets) {<br>
+ unsigned TBN = TB->getNumber();<br>
+ DEBUG(dbgs() << " pushing edge BB#" << MBN << " -> BB#" << TBN << "\n");<br>
+ FlowQ.push(CFGEdge(MBN, TBN));<br>
+ }<br>
+}<br>
+<br>
+<br>
+void MachineConstPropagator::visitUsesOf(unsigned Reg) {<br>
+ DEBUG(dbgs() << "Visiting uses of " << PrintReg(Reg, &MCE.TRI)<br>
+ << Cells.get(Reg) << '\n');<br>
+ for (MachineInstr &MI : MRI->use_nodbg_instructions(Reg)) {<br>
+ // Do not process non-executable instructions. They can become exceutable<br>
+ // later (via a flow-edge in the work queue). In such case, the instruc-<br>
+ // tion will be visited at that time.<br>
+ if (!InstrExec.count(&MI))<br>
+ continue;<br>
+ if (MI.isPHI())<br>
+ visitPHI(MI);<br>
+ else if (!MI.isBranch())<br>
+ visitNonBranch(MI);<br>
+ else<br>
+ visitBranchesFrom(MI);<br>
+ }<br>
+}<br>
+<br>
+<br>
+bool MachineConstPropagator::isExecutable(const MachineBasicBlock *MB) const {<br>
+ unsigned MBN = MB->getNumber();<br>
+ for (const MachineBasicBlock *PB : MB->predecessors()) {<br>
+ unsigned PBN = PB->getNumber();<br>
+ if (EdgeExec.count(CFGEdge(PBN, MBN)))<br>
+ return true;<br>
+ }<br>
+ return false;<br>
+}<br>
+<br>
+<br>
+void MachineConstPropagator::pushLayoutSuccessor(const MachineBasicBlock *MB) {<br>
+ MachineFunction::const_iterator BI = MB->getIterator();<br>
+ unsigned MBN = MB->getNumber();<br>
+ unsigned SBN = std::next(BI)->getNumber();<br>
+ FlowQ.push(CFGEdge(MBN, SBN));<br>
+}<br>
+<br>
+<br>
+bool MachineConstPropagator::computeBlockSuccessors(const MachineBasicBlock *MB,<br>
+ SetVector<const MachineBasicBlock*> &Targets) {<br>
+ MachineBasicBlock::const_iterator FirstBr = MB->end();<br>
+ for (const MachineInstr &MI : *MB) {<br>
+ if (MI.isDebugValue())<br>
+ continue;<br>
+ if (MI.isBranch()) {<br>
+ FirstBr = MI.getIterator();<br>
+ break;<br>
+ }<br>
+ }<br>
+<br>
+ Targets.clear();<br>
+ MachineBasicBlock::const_iterator End = MB->end();<br>
+<br>
+ bool DoNext = true;<br>
+ for (MachineBasicBlock::const_iterator I = FirstBr; I != End; ++I) {<br>
+ const MachineInstr &MI = *I;<br>
+ // Can there be debug instructions between branches?<br>
+ if (MI.isDebugValue())<br>
+ continue;<br>
+ if (!InstrExec.count(&MI))<br>
+ continue;<br>
+ bool Eval = MCE.evaluate(MI, Cells, Targets, DoNext);<br>
+ if (!Eval)<br>
+ return false;<br>
+ if (!DoNext)<br>
+ break;<br>
+ }<br>
+ // If the last branch could fall-through, add block's layout successor.<br>
+ if (DoNext) {<br>
+ MachineFunction::const_iterator BI = MB->getIterator();<br>
+ MachineFunction::const_iterator NextI = std::next(BI);<br>
+ if (NextI != MB->getParent()->end())<br>
+ Targets.insert(&*NextI);<br>
+ }<br>
+<br>
+ // Add all the EH landing pads.<br>
+ for (const MachineBasicBlock *SB : MB->successors())<br>
+ if (SB->isEHPad())<br>
+ Targets.insert(SB);<br>
+<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+void MachineConstPropagator::removeCFGEdge(MachineBasicBlock *From,<br>
+ MachineBasicBlock *To) {<br>
+ // First, remove the CFG successor/predecessor information.<br>
+ From->removeSuccessor(To);<br>
+ // Remove all corresponding PHI operands in the To block.<br>
+ for (auto I = To->begin(), E = To->getFirstNonPHI(); I != E; ++I) {<br>
+ MachineInstr *PN = &*I;<br>
+ // reg0 = PHI reg1, bb2, reg3, bb4, ...<br>
+ int N = PN->getNumOperands()-2;<br>
+ while (N > 0) {<br>
+ if (PN->getOperand(N+1).getMBB() == From) {<br>
+ PN->RemoveOperand(N+1);<br>
+ PN->RemoveOperand(N);<br>
+ }<br>
+ N -= 2;<br>
+ }<br>
+ }<br>
+}<br>
+<br>
+<br>
+void MachineConstPropagator::propagate(MachineFunction &MF) {<br>
+ MachineBasicBlock *Entry = GraphTraits<MachineFunction*>::getEntryNode(&MF);<br>
+ unsigned EntryNum = Entry->getNumber();<br>
+<br>
+ // Start with a fake edge, just to process the entry node.<br>
+ FlowQ.push(CFGEdge(EntryNum, EntryNum));<br>
+<br>
+ while (!FlowQ.empty()) {<br>
+ CFGEdge Edge = FlowQ.front();<br>
+ FlowQ.pop();<br>
+<br>
+ DEBUG(dbgs() << "Picked edge BB#" << Edge.first << "->BB#"<br>
+ << Edge.second << '\n');<br>
+ if (Edge.first != EntryNum)<br>
+ if (EdgeExec.count(Edge))<br>
+ continue;<br>
+ EdgeExec.insert(Edge);<br>
+ MachineBasicBlock *SB = MF.getBlockNumbered(Edge.second);<br>
+<br>
+ // Process the block in three stages:<br>
+ // - visit all PHI nodes,<br>
+ // - visit all non-branch instructions,<br>
+ // - visit block branches.<br>
+ MachineBasicBlock::const_iterator It = SB->begin(), End = SB->end();<br>
+<br>
+ // Visit PHI nodes in the successor block.<br>
+ while (It != End && It->isPHI()) {<br>
+ InstrExec.insert(&*It);<br>
+ visitPHI(*It);<br>
+ ++It;<br>
+ }<br>
+<br>
+ // If the successor block just became executable, visit all instructions.<br>
+ // To see if this is the first time we're visiting it, check the first<br>
+ // non-debug instruction to see if it is executable.<br>
+ while (It != End && It->isDebugValue())<br>
+ ++It;<br>
+ assert(It == End || !It->isPHI());<br>
+ // If this block has been visited, go on to the next one.<br>
+ if (It != End && InstrExec.count(&*It))<br>
+ continue;<br>
+ // For now, scan all non-branch instructions. Branches require different<br>
+ // processing.<br>
+ while (It != End && !It->isBranch()) {<br>
+ if (!It->isDebugValue()) {<br>
+ InstrExec.insert(&*It);<br>
+ visitNonBranch(*It);<br>
+ }<br>
+ ++It;<br>
+ }<br>
+<br>
+ // Time to process the end of the block. This is different from<br>
+ // processing regular (non-branch) instructions, because there can<br>
+ // be multiple branches in a block, and they can cause the block to<br>
+ // terminate early.<br>
+ if (It != End) {<br>
+ visitBranchesFrom(*It);<br>
+ } else {<br>
+ // If the block didn't have a branch, add all successor edges to the<br>
+ // work queue. (There should really be only one successor in such case.)<br>
+ unsigned SBN = SB->getNumber();<br>
+ for (const MachineBasicBlock *SSB : SB->successors())<br>
+ FlowQ.push(CFGEdge(SBN, SSB->getNumber()));<br>
+ }<br>
+ } // while (FlowQ)<br>
+<br>
+ DEBUG({<br>
+ dbgs() << "Cells after propagation:\n";<br>
+ Cells.print(dbgs(), MCE.TRI);<br>
+ dbgs() << "Dead CFG edges:\n";<br>
+ for (const MachineBasicBlock &B : MF) {<br>
+ unsigned BN = B.getNumber();<br>
+ for (const MachineBasicBlock *SB : B.successors()) {<br>
+ unsigned SN = SB->getNumber();<br>
+ if (!EdgeExec.count(CFGEdge(BN, SN)))<br>
+ dbgs() << " BB#" << BN << " -> BB#" << SN << '\n';<br>
+ }<br>
+ }<br>
+ });<br>
+}<br>
+<br>
+<br>
+bool MachineConstPropagator::rewrite(MachineFunction &MF) {<br>
+ bool Changed = false;<br>
+ // Rewrite all instructions based on the collected cell information.<br>
+ //<br>
+ // Traverse the instructions in a post-order, so that rewriting an<br>
+ // instruction can make changes "downstream" in terms of control-flow<br>
+ // without affecting the rewriting process. (We should not change<br>
+ // instructions that have not yet been visited by the rewriter.)<br>
+ // The reason for this is that the rewriter can introduce new vregs,<br>
+ // and replace uses of old vregs (which had corresponding cells<br>
+ // computed during propagation) with these new vregs (which at this<br>
+ // point would not have any cells, and would appear to be "top").<br>
+ // If an attempt was made to evaluate an instruction with a fresh<br>
+ // "top" vreg, it would cause an error (abend) in the evaluator.<br>
+<br>
+ // Collect the post-order-traversal block ordering. The subsequent<br>
+ // traversal/rewrite will update block successors, so it's safer<br>
+ // if the visiting order it computed ahead of time.<br>
+ std::vector<MachineBasicBlock*> POT;<br>
+ for (MachineBasicBlock *B : post_order(&MF))<br>
+ if (!B->empty())<br>
+ POT.push_back(B);<br>
+<br>
+ for (MachineBasicBlock *B : POT) {<br>
+ // Walk the block backwards (which usually begin with the branches).<br>
+ // If any branch is rewritten, we may need to update the successor<br>
+ // information for this block. Unless the block's successors can be<br>
+ // precisely determined (which may not be the case for indirect<br>
+ // branches), we cannot modify any branch.<br>
+<br>
+ // Compute the successor information.<br>
+ SetVector<const MachineBasicBlock*> Targets;<br>
+ bool HaveTargets = computeBlockSuccessors(B, Targets);<br>
+ // Rewrite the executable instructions. Skip branches if we don't<br>
+ // have block successor information.<br>
+ for (auto I = B->rbegin(), E = B->rend(); I != E; ++I) {<br>
+ MachineInstr &MI = *I;<br>
+ if (InstrExec.count(&MI)) {<br>
+ if (MI.isBranch() && !HaveTargets)<br>
+ continue;<br>
+ Changed |= MCE.rewrite(MI, Cells);<br>
+ }<br>
+ }<br>
+ // The rewriting could rewrite PHI nodes to non-PHI nodes, causing<br>
+ // regular instructions to appear in between PHI nodes. Bring all<br>
+ // the PHI nodes to the beginning of the block.<br>
+ for (auto I = B->begin(), E = B->end(); I != E; ++I) {<br>
+ if (I->isPHI())<br>
+ continue;<br>
+ // I is not PHI. Find the next PHI node P.<br>
+ auto P = I;<br>
+ while (++P != E)<br>
+ if (P->isPHI())<br>
+ break;<br>
+ // Not found.<br>
+ if (P == E)<br>
+ break;<br>
+ // Splice P right before I.<br>
+ B->splice(I, B, P);<br>
+ // Reset I to point at the just spliced PHI node.<br>
+ --I;<br>
+ }<br>
+ // Update the block successor information: remove unnecessary successors.<br>
+ if (HaveTargets) {<br>
+ SmallVector<MachineBasicBlock*,2> ToRemove;<br>
+ for (MachineBasicBlock *SB : B->successors()) {<br>
+ if (!Targets.count(SB))<br>
+ ToRemove.push_back(const_cast<MachineBasicBlock*>(SB));<br>
+ Targets.remove(SB);<br>
+ }<br>
+ for (unsigned i = 0, n = ToRemove.size(); i < n; ++i)<br>
+ removeCFGEdge(B, ToRemove[i]);<br>
+ // If there are any blocks left in the computed targets, it means that<br>
+ // we think that the block could go somewhere, but the CFG does not.<br>
+ // This could legitimately happen in blocks that have non-returning<br>
+ // calls---we would think that the execution can continue, but the<br>
+ // CFG will not have a successor edge.<br>
+ }<br>
+ }<br>
+ // Need to do some final post-processing.<br>
+ // If a branch was not executable, it will not get rewritten, but should<br>
+ // be removed (or replaced with something equivalent to a A2_nop). We can't<br>
+ // erase instructions during rewriting, so this needs to be delayed until<br>
+ // now.<br>
+ for (MachineBasicBlock &B : MF) {<br>
+ MachineBasicBlock::iterator I = B.begin(), E = B.end();<br>
+ while (I != E) {<br>
+ auto Next = std::next(I);<br>
+ if (I->isBranch() && !InstrExec.count(&*I))<br>
+ B.erase(I);<br>
+ I = Next;<br>
+ }<br>
+ }<br>
+ return Changed;<br>
+}<br>
+<br>
+<br>
+// This is the constant propagation algorithm as described by Wegman-Zadeck.<br>
+// Most of the terminology comes from there.<br>
+bool MachineConstPropagator::run(MachineFunction &MF) {<br>
+ DEBUG(MF.print(dbgs() << "Starting MachineConstPropagator\n", 0));<br>
+<br>
+ MRI = &MF.getRegInfo();<br>
+<br>
+ Cells.clear();<br>
+ EdgeExec.clear();<br>
+ InstrExec.clear();<br>
+ assert(FlowQ.empty());<br>
+<br>
+ propagate(MF);<br>
+ bool Changed = rewrite(MF);<br>
+<br>
+ DEBUG({<br>
+ dbgs() << "End of MachineConstPropagator (Changed=" << Changed << ")\n";<br>
+ if (Changed)<br>
+ MF.print(dbgs(), 0);<br>
+ });<br>
+ return Changed;<br>
+}<br>
+<br>
+<br>
+// --------------------------------------------------------------------<br>
+// Machine const evaluator.<br>
+<br>
+bool MachineConstEvaluator::getCell(const Register &R, const CellMap &Inputs,<br>
+ LatticeCell &RC) {<br>
+ if (!TargetRegisterInfo::isVirtualRegister(R.Reg))<br>
+ return false;<br>
+ const LatticeCell &L = Inputs.get(R.Reg);<br>
+ if (!R.SubReg) {<br>
+ RC = L;<br>
+ return !RC.isBottom();<br>
+ }<br>
+ bool Eval = evaluate(R, L, RC);<br>
+ return Eval && !RC.isBottom();<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::constToInt(const Constant *C,<br>
+ APInt &Val) const {<br>
+ const ConstantInt *CI = dyn_cast<ConstantInt>(C);<br>
+ if (!CI)<br>
+ return false;<br>
+ Val = CI->getValue();<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+const ConstantInt *MachineConstEvaluator::intToConst(const APInt &Val) const {<br>
+ return ConstantInt::get(CX, Val);<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCMPrr(uint32_t Cmp, const Register &R1,<br>
+ const Register &R2, const CellMap &Inputs, bool &Result) {<br>
+ assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));<br>
+ LatticeCell LS1, LS2;<br>
+ if (!getCell(R1, Inputs, LS1) || !getCell(R2, Inputs, LS2))<br>
+ return false;<br>
+<br>
+ bool IsProp1 = LS1.isProperty();<br>
+ bool IsProp2 = LS2.isProperty();<br>
+ if (IsProp1) {<br>
+ uint32_t Prop1 = LS1.properties();<br>
+ if (IsProp2)<br>
+ return evaluateCMPpp(Cmp, Prop1, LS2.properties(), Result);<br>
+ uint32_t NegCmp = Comparison::negate(Cmp);<br>
+ return evaluateCMPrp(NegCmp, R2, Prop1, Inputs, Result);<br>
+ }<br>
+ if (IsProp2) {<br>
+ uint32_t Prop2 = LS2.properties();<br>
+ return evaluateCMPrp(Cmp, R1, Prop2, Inputs, Result);<br>
+ }<br>
+<br>
+ APInt A;<br>
+ bool IsTrue = true, IsFalse = true;<br>
+ for (unsigned i = 0; i < LS2.size(); ++i) {<br>
+ bool Res;<br>
+ bool Computed = constToInt(LS2.Values[i], A) &&<br>
+ evaluateCMPri(Cmp, R1, A, Inputs, Res);<br>
+ if (!Computed)<br>
+ return false;<br>
+ IsTrue &= Res;<br>
+ IsFalse &= !Res;<br>
+ }<br>
+ assert(!IsTrue || !IsFalse);<br>
+ // The actual logical value of the comparison is same as IsTrue.<br>
+ Result = IsTrue;<br>
+ // Return true if the result was proven to be true or proven to be false.<br>
+ return IsTrue || IsFalse;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCMPri(uint32_t Cmp, const Register &R1,<br>
+ const APInt &A2, const CellMap &Inputs, bool &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ LatticeCell LS;<br>
+ if (!getCell(R1, Inputs, LS))<br>
+ return false;<br>
+ if (LS.isProperty())<br>
+ return evaluateCMPpi(Cmp, LS.properties(), A2, Result);<br>
+<br>
+ APInt A;<br>
+ bool IsTrue = true, IsFalse = true;<br>
+ for (unsigned i = 0; i < LS.size(); ++i) {<br>
+ bool Res;<br>
+ bool Computed = constToInt(LS.Values[i], A) &&<br>
+ evaluateCMPii(Cmp, A, A2, Res);<br>
+ if (!Computed)<br>
+ return false;<br>
+ IsTrue &= Res;<br>
+ IsFalse &= !Res;<br>
+ }<br>
+ assert(!IsTrue || !IsFalse);<br>
+ // The actual logical value of the comparison is same as IsTrue.<br>
+ Result = IsTrue;<br>
+ // Return true if the result was proven to be true or proven to be false.<br>
+ return IsTrue || IsFalse;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCMPrp(uint32_t Cmp, const Register &R1,<br>
+ uint64_t Props2, const CellMap &Inputs, bool &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ LatticeCell LS;<br>
+ if (!getCell(R1, Inputs, LS))<br>
+ return false;<br>
+ if (LS.isProperty())<br>
+ return evaluateCMPpp(Cmp, LS.properties(), Props2, Result);<br>
+<br>
+ APInt A;<br>
+ uint32_t NegCmp = Comparison::negate(Cmp);<br>
+ bool IsTrue = true, IsFalse = true;<br>
+ for (unsigned i = 0; i < LS.size(); ++i) {<br>
+ bool Res;<br>
+ bool Computed = constToInt(LS.Values[i], A) &&<br>
+ evaluateCMPpi(NegCmp, Props2, A, Res);<br>
+ if (!Computed)<br>
+ return false;<br>
+ IsTrue &= Res;<br>
+ IsFalse &= !Res;<br>
+ }<br>
+ assert(!IsTrue || !IsFalse);<br>
+ Result = IsTrue;<br>
+ return IsTrue || IsFalse;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCMPii(uint32_t Cmp, const APInt &A1,<br>
+ const APInt &A2, bool &Result) {<br>
+ // NE is a special kind of comparison (not composed of smaller properties).<br>
+ if (Cmp == Comparison::NE) {<br>
+ Result = !APInt::isSameValue(A1, A2);<br>
+ return true;<br>
+ }<br>
+ if (Cmp == Comparison::EQ) {<br>
+ Result = APInt::isSameValue(A1, A2);<br>
+ return true;<br>
+ }<br>
+ if (Cmp & Comparison::EQ) {<br>
+ if (APInt::isSameValue(A1, A2))<br>
+ return (Result = true);<br>
+ }<br>
+ assert((Cmp & (Comparison::L | Comparison::G)) && "Malformed comparison");<br>
+ Result = false;<br>
+<br>
+ unsigned W1 = A1.getBitWidth();<br>
+ unsigned W2 = A2.getBitWidth();<br>
+ unsigned MaxW = (W1 >= W2) ? W1 : W2;<br>
+ if (Cmp & Comparison::U) {<br>
+ const APInt Zx1 = A1.zextOrSelf(MaxW);<br>
+ const APInt Zx2 = A2.zextOrSelf(MaxW);<br>
+ if (Cmp & Comparison::L)<br>
+ Result = Zx1.ult(Zx2);<br>
+ else if (Cmp & Comparison::G)<br>
+ Result = Zx2.ult(Zx1);<br>
+ return true;<br>
+ }<br>
+<br>
+ // Signed comparison.<br>
+ const APInt Sx1 = A1.sextOrSelf(MaxW);<br>
+ const APInt Sx2 = A2.sextOrSelf(MaxW);<br>
+ if (Cmp & Comparison::L)<br>
+ Result = Sx1.slt(Sx2);<br>
+ else if (Cmp & Comparison::G)<br>
+ Result = Sx2.slt(Sx1);<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCMPpi(uint32_t Cmp, uint32_t Props,<br>
+ const APInt &A2, bool &Result) {<br>
+ if (Props == ConstantProperties::Unknown)<br>
+ return false;<br>
+<br>
+ // Should never see NaN here, but check for it for completeness.<br>
+ if (Props & ConstantProperties::NaN)<br>
+ return false;<br>
+ // Infinity could theoretically be compared to a number, but the<br>
+ // presence of infinity here would be very suspicious. If we don't<br>
+ // know for sure that the number is finite, bail out.<br>
+ if (!(Props & ConstantProperties::Finite))<br>
+ return false;<br>
+<br>
+ // Let X be a number that has properties Props.<br>
+<br>
+ if (Cmp & Comparison::U) {<br>
+ // In case of unsigned comparisons, we can only compare against 0.<br>
+ if (A2 == 0) {<br>
+ // Any x!=0 will be considered >0 in an unsigned comparison.<br>
+ if (Props & ConstantProperties::Zero)<br>
+ Result = (Cmp & Comparison::EQ);<br>
+ else if (Props & ConstantProperties::NonZero)<br>
+ Result = (Cmp & Comparison::G) || (Cmp == Comparison::NE);<br>
+ else<br>
+ return false;<br>
+ return true;<br>
+ }<br>
+ // A2 is not zero. The only handled case is if X = 0.<br>
+ if (Props & ConstantProperties::Zero) {<br>
+ Result = (Cmp & Comparison::L) || (Cmp == Comparison::NE);<br>
+ return true;<br>
+ }<br>
+ return false;<br>
+ }<br>
+<br>
+ // Signed comparisons are different.<br>
+ if (Props & ConstantProperties::Zero) {<br>
+ if (A2 == 0)<br>
+ Result = (Cmp & Comparison::EQ);<br>
+ else<br>
+ Result = (Cmp == Comparison::NE) ||<br>
+ ((Cmp & Comparison::L) && !A2.isNegative()) ||<br>
+ ((Cmp & Comparison::G) && A2.isNegative());<br>
+ return true;<br>
+ }<br>
+ if (Props & ConstantProperties::PosOrZero) {<br>
+ // X >= 0 and !(A2 < 0) => cannot compare<br>
+ if (!A2.isNegative())<br>
+ return false;<br>
+ // X >= 0 and A2 < 0<br>
+ Result = (Cmp & Comparison::G) || (Cmp == Comparison::NE);<br>
+ return true;<br>
+ }<br>
+ if (Props & ConstantProperties::NegOrZero) {<br>
+ // X <= 0 and Src1 < 0 => cannot compare<br>
+ if (A2 == 0 || A2.isNegative())<br>
+ return false;<br>
+ // X <= 0 and A2 > 0<br>
+ Result = (Cmp & Comparison::L) || (Cmp == Comparison::NE);<br>
+ return true;<br>
+ }<br>
+<br>
+ return false;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCMPpp(uint32_t Cmp, uint32_t Props1,<br>
+ uint32_t Props2, bool &Result) {<br>
+ typedef ConstantProperties P;<br>
+ if ((Props1 & P::NaN) && (Props2 & P::NaN))<br>
+ return false;<br>
+ if (!(Props1 & P::Finite) || !(Props2 & P::Finite))<br>
+ return false;<br>
+<br>
+ bool Zero1 = (Props1 & P::Zero), Zero2 = (Props2 & P::Zero);<br>
+ bool NonZero1 = (Props1 & P::NonZero), NonZero2 = (Props2 & P::NonZero);<br>
+ if (Zero1 && Zero2) {<br>
+ Result = (Cmp & Comparison::EQ);<br>
+ return true;<br>
+ }<br>
+ if (Cmp == Comparison::NE) {<br>
+ if ((Zero1 && NonZero2) || (NonZero1 && Zero2))<br>
+ return (Result = true);<br>
+ return false;<br>
+ }<br>
+<br>
+ if (Cmp & Comparison::U) {<br>
+ // In unsigned comparisons, we can only compare against a known zero,<br>
+ // or a known non-zero.<br>
+ if (Zero1 && NonZero2) {<br>
+ Result = (Cmp & Comparison::L);<br>
+ return true;<br>
+ }<br>
+ if (NonZero1 && Zero2) {<br>
+ Result = (Cmp & Comparison::G);<br>
+ return true;<br>
+ }<br>
+ return false;<br>
+ }<br>
+<br>
+ // Signed comparison. The comparison is not NE.<br>
+ bool Poz1 = (Props1 & P::PosOrZero), Poz2 = (Props2 & P::PosOrZero);<br>
+ bool Nez1 = (Props1 & P::NegOrZero), Nez2 = (Props2 & P::NegOrZero);<br>
+ if (Nez1 && Poz2) {<br>
+ if (NonZero1 || NonZero2) {<br>
+ Result = (Cmp & Comparison::L);<br>
+ return true;<br>
+ }<br>
+ // Either (or both) could be zero. Can only say that X <= Y.<br>
+ if ((Cmp & Comparison::EQ) && (Cmp & Comparison::L))<br>
+ return (Result = true);<br>
+ }<br>
+ if (Poz1 && Nez2) {<br>
+ if (NonZero1 || NonZero2) {<br>
+ Result = (Cmp & Comparison::G);<br>
+ return true;<br>
+ }<br>
+ // Either (or both) could be zero. Can only say that X >= Y.<br>
+ if ((Cmp & Comparison::EQ) && (Cmp & Comparison::G))<br>
+ return (Result = true);<br>
+ }<br>
+<br>
+ return false;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCOPY(const Register &R1,<br>
+ const CellMap &Inputs, LatticeCell &Result) {<br>
+ return getCell(R1, Inputs, Result);<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateANDrr(const Register &R1,<br>
+ const Register &R2, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));<br>
+ const LatticeCell &L1 = Inputs.get(R2.Reg);<br>
+ const LatticeCell &L2 = Inputs.get(R2.Reg);<br>
+ // If both sources are bottom, exit. Otherwise try to evaluate ANDri<br>
+ // with the non-bottom argument passed as the immediate. This is to<br>
+ // catch cases of ANDing with 0.<br>
+ if (L2.isBottom()) {<br>
+ if (L1.isBottom())<br>
+ return false;<br>
+ return evaluateANDrr(R2, R1, Inputs, Result);<br>
+ }<br>
+ LatticeCell LS2;<br>
+ if (!evaluate(R2, L2, LS2))<br>
+ return false;<br>
+ if (LS2.isBottom() || LS2.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A;<br>
+ for (unsigned i = 0; i < LS2.size(); ++i) {<br>
+ LatticeCell RC;<br>
+ bool Eval = constToInt(LS2.Values[i], A) &&<br>
+ evaluateANDri(R1, A, Inputs, RC);<br>
+ if (!Eval)<br>
+ return false;<br>
+ Result.meet(RC);<br>
+ }<br>
+ return !Result.isBottom();<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateANDri(const Register &R1,<br>
+ const APInt &A2, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ if (A2 == -1)<br>
+ return getCell(R1, Inputs, Result);<br>
+ if (A2 == 0) {<br>
+ LatticeCell RC;<br>
+ RC.add(intToConst(A2));<br>
+ // Overwrite Result.<br>
+ Result = RC;<br>
+ return true;<br>
+ }<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isBottom() || LS1.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A, ResA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateANDii(A, A2, ResA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(ResA);<br>
+ Result.add(C);<br>
+ }<br>
+ return !Result.isBottom();<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateANDii(const APInt &A1,<br>
+ const APInt &A2, APInt &Result) {<br>
+ Result = A1 & A2;<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateORrr(const Register &R1,<br>
+ const Register &R2, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));<br>
+ const LatticeCell &L1 = Inputs.get(R2.Reg);<br>
+ const LatticeCell &L2 = Inputs.get(R2.Reg);<br>
+ // If both sources are bottom, exit. Otherwise try to evaluate ORri<br>
+ // with the non-bottom argument passed as the immediate. This is to<br>
+ // catch cases of ORing with -1.<br>
+ if (L2.isBottom()) {<br>
+ if (L1.isBottom())<br>
+ return false;<br>
+ return evaluateORrr(R2, R1, Inputs, Result);<br>
+ }<br>
+ LatticeCell LS2;<br>
+ if (!evaluate(R2, L2, LS2))<br>
+ return false;<br>
+ if (LS2.isBottom() || LS2.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A;<br>
+ for (unsigned i = 0; i < LS2.size(); ++i) {<br>
+ LatticeCell RC;<br>
+ bool Eval = constToInt(LS2.Values[i], A) &&<br>
+ evaluateORri(R1, A, Inputs, RC);<br>
+ if (!Eval)<br>
+ return false;<br>
+ Result.meet(RC);<br>
+ }<br>
+ return !Result.isBottom();<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateORri(const Register &R1,<br>
+ const APInt &A2, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ if (A2 == 0)<br>
+ return getCell(R1, Inputs, Result);<br>
+ if (A2 == -1) {<br>
+ LatticeCell RC;<br>
+ RC.add(intToConst(A2));<br>
+ // Overwrite Result.<br>
+ Result = RC;<br>
+ return true;<br>
+ }<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isBottom() || LS1.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A, ResA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateORii(A, A2, ResA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(ResA);<br>
+ Result.add(C);<br>
+ }<br>
+ return !Result.isBottom();<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateORii(const APInt &A1,<br>
+ const APInt &A2, APInt &Result) {<br>
+ Result = A1 | A2;<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateXORrr(const Register &R1,<br>
+ const Register &R2, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));<br>
+ LatticeCell LS1, LS2;<br>
+ if (!getCell(R1, Inputs, LS1) || !getCell(R2, Inputs, LS2))<br>
+ return false;<br>
+ if (LS1.isProperty()) {<br>
+ if (LS1.properties() & ConstantProperties::Zero)<br>
+ return !(Result = LS2).isBottom();<br>
+ return false;<br>
+ }<br>
+ if (LS2.isProperty()) {<br>
+ if (LS2.properties() & ConstantProperties::Zero)<br>
+ return !(Result = LS1).isBottom();<br>
+ return false;<br>
+ }<br>
+<br>
+ APInt A;<br>
+ for (unsigned i = 0; i < LS2.size(); ++i) {<br>
+ LatticeCell RC;<br>
+ bool Eval = constToInt(LS2.Values[i], A) &&<br>
+ evaluateXORri(R1, A, Inputs, RC);<br>
+ if (!Eval)<br>
+ return false;<br>
+ Result.meet(RC);<br>
+ }<br>
+ return !Result.isBottom();<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateXORri(const Register &R1,<br>
+ const APInt &A2, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isProperty()) {<br>
+ if (LS1.properties() & ConstantProperties::Zero) {<br>
+ const Constant *C = intToConst(A2);<br>
+ Result.add(C);<br>
+ return !Result.isBottom();<br>
+ }<br>
+ return false;<br>
+ }<br>
+<br>
+ APInt A, XA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateXORii(A, A2, XA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(XA);<br>
+ Result.add(C);<br>
+ }<br>
+ return !Result.isBottom();<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateXORii(const APInt &A1,<br>
+ const APInt &A2, APInt &Result) {<br>
+ Result = A1 ^ A2;<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateZEXTr(const Register &R1, unsigned Width,<br>
+ unsigned Bits, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A, XA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateZEXTi(A, Width, Bits, XA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(XA);<br>
+ Result.add(C);<br>
+ }<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateZEXTi(const APInt &A1, unsigned Width,<br>
+ unsigned Bits, APInt &Result) {<br>
+ unsigned BW = A1.getBitWidth();<br>
+ assert(Width >= Bits && BW >= Bits);<br>
+ APInt Mask = APInt::getLowBitsSet(Width, Bits);<br>
+ Result = A1.zextOrTrunc(Width) & Mask;<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateSEXTr(const Register &R1, unsigned Width,<br>
+ unsigned Bits, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isBottom() || LS1.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A, XA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateSEXTi(A, Width, Bits, XA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(XA);<br>
+ Result.add(C);<br>
+ }<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateSEXTi(const APInt &A1, unsigned Width,<br>
+ unsigned Bits, APInt &Result) {<br>
+ unsigned BW = A1.getBitWidth();<br>
+ assert(Width >= Bits && BW >= Bits);<br>
+ // Special case to make things faster for smaller source widths.<br>
+ // Sign extension of 0 bits generates 0 as a result. This is consistent<br>
+ // with what the HW does.<br>
+ if (Bits == 0) {<br>
+ Result = APInt(Width, 0);<br>
+ return true;<br>
+ }<br>
+ // In C, shifts by 64 invoke undefined behavior: handle that case in APInt.<br>
+ if (BW <= 64 && Bits != 0) {<br>
+ int64_t V = A1.getSExtValue();<br>
+ switch (Bits) {<br>
+ case 8:<br>
+ V = static_cast<int8_t>(V);<br>
+ break;<br>
+ case 16:<br>
+ V = static_cast<int16_t>(V);<br>
+ break;<br>
+ case 32:<br>
+ V = static_cast<int32_t>(V);<br>
+ break;<br>
+ default:<br>
+ // Shift left to lose all bits except lower "Bits" bits, then shift<br>
+ // the value back, replicating what was a sign bit after the first<br>
+ // shift.<br>
+ V = (V << (64-Bits)) >> (64-Bits);<br>
+ break;<br>
+ }<br>
+ // V is a 64-bit sign-extended value. Convert it to APInt of desired<br>
+ // width.<br>
+ Result = APInt(Width, V, true);<br>
+ return true;<br>
+ }<br>
+ // Slow case: the value doesn't fit in int64_t.<br>
+ if (Bits < BW)<br>
+ Result = A1.trunc(Bits).sext(Width);<br>
+ else // Bits == BW<br>
+ Result = A1.sext(Width);<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCLBr(const Register &R1, bool Zeros,<br>
+ bool Ones, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isBottom() || LS1.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A, CA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateCLBi(A, Zeros, Ones, CA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(CA);<br>
+ Result.add(C);<br>
+ }<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCLBi(const APInt &A1, bool Zeros,<br>
+ bool Ones, APInt &Result) {<br>
+ unsigned BW = A1.getBitWidth();<br>
+ if (!Zeros && !Ones)<br>
+ return false;<br>
+ unsigned Count = 0;<br>
+ if (Zeros && (Count == 0))<br>
+ Count = A1.countLeadingZeros();<br>
+ if (Ones && (Count == 0))<br>
+ Count = A1.countLeadingOnes();<br>
+ Result = APInt(BW, static_cast<uint64_t>(Count), false);<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCTBr(const Register &R1, bool Zeros,<br>
+ bool Ones, const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isBottom() || LS1.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A, CA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateCTBi(A, Zeros, Ones, CA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(CA);<br>
+ Result.add(C);<br>
+ }<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateCTBi(const APInt &A1, bool Zeros,<br>
+ bool Ones, APInt &Result) {<br>
+ unsigned BW = A1.getBitWidth();<br>
+ if (!Zeros && !Ones)<br>
+ return false;<br>
+ unsigned Count = 0;<br>
+ if (Zeros && (Count == 0))<br>
+ Count = A1.countTrailingZeros();<br>
+ if (Ones && (Count == 0))<br>
+ Count = A1.countTrailingOnes();<br>
+ Result = APInt(BW, static_cast<uint64_t>(Count), false);<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateEXTRACTr(const Register &R1,<br>
+ unsigned Width, unsigned Bits, unsigned Offset, bool Signed,<br>
+ const CellMap &Inputs, LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ assert(Bits+Offset <= Width);<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isBottom())<br>
+ return false;<br>
+ if (LS1.isProperty()) {<br>
+ uint32_t Ps = LS1.properties();<br>
+ if (Ps & ConstantProperties::Zero) {<br>
+ const Constant *C = intToConst(APInt(Width, 0, false));<br>
+ Result.add(C);<br>
+ return true;<br>
+ }<br>
+ return false;<br>
+ }<br>
+<br>
+ APInt A, CA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateEXTRACTi(A, Bits, Offset, Signed, CA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(CA);<br>
+ Result.add(C);<br>
+ }<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateEXTRACTi(const APInt &A1, unsigned Bits,<br>
+ unsigned Offset, bool Signed, APInt &Result) {<br>
+ unsigned BW = A1.getBitWidth();<br>
+ assert(Bits+Offset <= BW);<br>
+ // Extracting 0 bits generates 0 as a result (as indicated by the HW people).<br>
+ if (Bits == 0) {<br>
+ Result = APInt(BW, 0);<br>
+ return true;<br>
+ }<br>
+ if (BW <= 64) {<br>
+ int64_t V = A1.getZExtValue();<br>
+ V <<= (64-Bits-Offset);<br>
+ if (Signed)<br>
+ V >>= (64-Bits);<br>
+ else<br>
+ V = static_cast<uint64_t>(V) >> (64-Bits);<br>
+ Result = APInt(BW, V, Signed);<br>
+ return true;<br>
+ }<br>
+ if (Signed)<br>
+ Result = A1.shl(BW-Bits-Offset).ashr(BW-Bits);<br>
+ else<br>
+ Result = A1.shl(BW-Bits-Offset).lshr(BW-Bits);<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateSplatr(const Register &R1,<br>
+ unsigned Bits, unsigned Count, const CellMap &Inputs,<br>
+ LatticeCell &Result) {<br>
+ assert(Inputs.has(R1.Reg));<br>
+ LatticeCell LS1;<br>
+ if (!getCell(R1, Inputs, LS1))<br>
+ return false;<br>
+ if (LS1.isBottom() || LS1.isProperty())<br>
+ return false;<br>
+<br>
+ APInt A, SA;<br>
+ for (unsigned i = 0; i < LS1.size(); ++i) {<br>
+ bool Eval = constToInt(LS1.Values[i], A) &&<br>
+ evaluateSplati(A, Bits, Count, SA);<br>
+ if (!Eval)<br>
+ return false;<br>
+ const Constant *C = intToConst(SA);<br>
+ Result.add(C);<br>
+ }<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+bool MachineConstEvaluator::evaluateSplati(const APInt &A1, unsigned Bits,<br>
+ unsigned Count, APInt &Result) {<br>
+ assert(Count > 0);<br>
+ unsigned BW = A1.getBitWidth(), SW = Count*Bits;<br>
+ APInt LoBits = (Bits < BW) ? A1.trunc(Bits) : A1.zextOrSelf(Bits);<br>
+ if (Count > 1)<br>
+ LoBits = LoBits.zext(SW);<br>
+<br>
+ APInt Res(SW, 0, false);<br>
+ for (unsigned i = 0; i < Count; ++i) {<br>
+ Res <<= Bits;<br>
+ Res |= LoBits;<br>
+ }<br>
+ Result = Res;<br>
+ return true;<br>
+}<br>
+<br>
+<br>
+// ----------------------------------------------------------------------<br>
+// Hexagon-specific code.<br>
+<br>
+namespace llvm {<br>
+ FunctionPass *createHexagonConstPropagationPass();<br>
+ void initializeHexagonConstPropagationPass(PassRegistry &Registry);<br>
+}<br>
+<br>
+namespace {<br>
+ class HexagonConstEvaluator : public MachineConstEvaluator {<br>
+ public:<br>
+ HexagonConstEvaluator(MachineFunction &Fn);<br>
+<br>
+ bool evaluate(const MachineInstr &MI, const CellMap &Inputs,<br>
+ CellMap &Outputs) override;<br>
+ bool evaluate(const Register &R, const LatticeCell &SrcC,<br>
+ LatticeCell &Result) override;<br>
+ bool evaluate(const MachineInstr &BrI, const CellMap &Inputs,<br>
+ SetVector<const MachineBasicBlock*> &Targets, bool &FallsThru)<br>
+ override;<br>
+ bool rewrite(MachineInstr &MI, const CellMap &Inputs) override;<br>
+<br>
+<br>
+ private:<br>
+ unsigned getRegBitWidth(unsigned Reg) const;<br>
+<br>
+ static uint32_t getCmp(unsigned Opc);<br>
+ static APInt getCmpImm(unsigned Opc, unsigned OpX,<br>
+ const MachineOperand &MO);<br>
+ void replaceWithNop(MachineInstr &MI);<br>
+<br>
+ bool evaluateHexRSEQ32(Register RL, Register RH, const CellMap &Inputs,<br>
+ LatticeCell &Result);<br>
+ bool evaluateHexCompare(const MachineInstr &MI, const CellMap &Inputs,<br>
+ CellMap &Outputs);<br>
+ // This is suitable to be called for compare-and-jump instructions.<br>
+ bool evaluateHexCompare2(uint32_t Cmp, const MachineOperand &Src1,<br>
+ const MachineOperand &Src2, const CellMap &Inputs, bool &Result);<br>
+ bool evaluateHexLogical(const MachineInstr &MI, const CellMap &Inputs,<br>
+ CellMap &Outputs);<br>
+ bool evaluateHexCondMove(const MachineInstr &MI, const CellMap &Inputs,<br>
+ CellMap &Outputs);<br>
+ bool evaluateHexExt(const MachineInstr &MI, const CellMap &Inputs,<br>
+ CellMap &Outputs);<br>
+ bool evaluateHexVector1(const MachineInstr &MI, const CellMap &Inputs,<br>
+ CellMap &Outputs);<br>
+ bool evaluateHexVector2(const MachineInstr &MI, const CellMap &Inputs,<br>
+ CellMap &Outputs);<br>
+<br>
+ void replaceAllRegUsesWith(unsigned FromReg, unsigned ToReg);<br>
+ bool rewriteHexBranch(MachineInstr &BrI, const CellMap &Inputs);<br>
+ bool rewriteHexConstDefs(MachineInstr &MI, const CellMap &Inputs,<br>
+ bool &AllDefs);<br>
+ bool rewriteHexConstUses(MachineInstr &MI, const CellMap &Inputs);<br>
+<br>
+ MachineRegisterInfo *MRI;<br>
+ const HexagonInstrInfo &HII;<br>
+ const HexagonRegisterInfo &HRI;<br>
+ };<br>
+<br>
+<br>
+ class HexagonConstPropagation : public MachineFunctionPass {<br>
+ public:<br>
+ static char ID;<br>
+ HexagonConstPropagation() : MachineFunctionPass(ID) {<br>
+ PassRegistry &Registry = *PassRegistry::getPassRegistry();<br>
+ initializeHexagonConstPropagationPass(Registry);<br>
+ }<br>
+ const char *getPassName() const override {<br>
+ return "Hexagon Constant Propagation";<br>
+ }<br>
+ bool runOnMachineFunction(MachineFunction &MF) override {<br>
+ const Function *F = MF.getFunction();<br>
+ if (!F)<br>
+ return false;<br>
+ if (skipFunction(*F))<br>
+ return false;<br>
+<br>
+ HexagonConstEvaluator HCE(MF);<br>
+ return MachineConstPropagator(HCE).run(MF);<br>
+ }<br>
+ };<br>
+<br>
+ char HexagonConstPropagation::ID = 0;<br>
+}<br>
+<br>
+INITIALIZE_PASS(HexagonConstPropagation, "hcp", "Hexagon Constant Propagation",<br>
+ false, false)<br>
+<br>
+<br>
+HexagonConstEvaluator::HexagonConstEvaluator(MachineFunction &Fn)<br>
+ : MachineConstEvaluator(Fn),<br>
+ HII(*Fn.getSubtarget<HexagonSubtarget>().getInstrInfo()),<br>
+ HRI(*Fn.getSubtarget<HexagonSubtarget>().getRegisterInfo()) {<br>
+ MRI = &Fn.getRegInfo();<br>
+}<br>
+<br>
+<br>
+bool HexagonConstEvaluator::evaluate(const MachineInstr &MI,<br>
+ const CellMap &Inputs, CellMap &Outputs) {<br>
+ if (MI.isCall())<br>
+ return false;<br>
+ if (MI.getNumOperands() == 0 || !MI.getOperand(0).isReg())<br>
+ return false;<br>
+ const MachineOperand &MD = MI.getOperand(0);<br>
+ if (!MD.isDef())<br>
+ return false;<br>
+<br>
+ unsigned Opc = MI.getOpcode();<br>
+ Register DefR(MD);<br>
+ assert(!DefR.SubReg);<br>
+ if (!TargetRegisterInfo::isVirtualRegister(DefR.Reg))<br>
+ return false;<br>
+<br>
+ if (MI.isCopy()) {<br>
+ LatticeCell RC;<br>
+ Register SrcR(MI.getOperand(1));<br>
+ bool Eval = evaluateCOPY(SrcR, Inputs, RC);<br>
+ if (!Eval)<br>
+ return false;<br>
+ Outputs.update(DefR.Reg, RC);<br>
+ return true;<br>
+ }<br>
+ if (MI.isRegSequence()) {<br>
+ unsigned Sub1 = MI.getOperand(2).getImm();<br>
+ unsigned Sub2 = MI.getOperand(4).getImm();<br>
+ if (Sub1 != Hexagon::subreg_loreg && Sub1 != Hexagon::subreg_hireg)<br>
+ return false;<br>
+ if (Sub2 != Hexagon::subreg_loreg && Sub2 != Hexagon::subreg_hireg)<br>
+ return false;<br>
+ assert(Sub1 != Sub2);<br>
+ bool LoIs1 = (Sub1 == Hexagon::subreg_loreg);<br>
+ const MachineOperand &OpLo = LoIs1 ? MI.getOperand(1) : MI.getOperand(3);<br>
+ const MachineOperand &OpHi = LoIs1 ? MI.getOperand(3) : MI.getOperand(1);<br>
+ LatticeCell RC;<br>
+ Register SrcRL(OpLo), SrcRH(OpHi);<br>
+ bool Eval = evaluateHexRSEQ32(SrcRL, SrcRH, Inputs, RC);<br>
+ if (!Eval)<br>
+ return false;<br>
+ Outputs.update(DefR.Reg, RC);<br>
+ return true;<br>
+ }<br>
+ if (MI.isCompare()) {<br>
+ bool Eval = evaluateHexCompare(MI, Inputs, Outputs);<br>
+ return Eval;<br>
+ }<br>
+<br>
+ switch (Opc) {<br>
+ defa</blockquote></div><div dir="ltr">-- <br></div><div data-smartmail="gmail_signature">Mike<br>Sent from phone</div>