<html><head><style>body{font-family:Helvetica,Arial;font-size:13px}</style></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;"><div id="bloop_customfont" style="font-family:Helvetica,Arial;font-size:13px; color: rgba(0,0,0,1.0); margin: 0px; line-height: auto;">Hi Alina, </div><div id="bloop_customfont" style="font-family:Helvetica,Arial;font-size:13px; color: rgba(0,0,0,1.0); margin: 0px; line-height: auto;"><br></div><div id="bloop_customfont" style="font-family:Helvetica,Arial;font-size:13px; color: rgba(0,0,0,1.0); margin: 0px; line-height: auto;">I get a cmake warning for each of the tests you added:</div><div id="bloop_customfont" style="font-family:Helvetica,Arial;font-size:13px; color: rgba(0,0,0,1.0); margin: 0px; line-height: auto;"><br></div><div id="bloop_customfont" style="font-family:Helvetica,Arial;font-size:13px; color: rgba(0,0,0,1.0); margin: 0px; line-height: auto;"><pre style="word-wrap: break-word; white-space: pre-wrap;">-- No reference output found for test widen_bug
-- No reference output found for test simd_ops_test_op_addpd_190
-- No reference output found for test simd_ops_test_op_addpd_205
-- No reference output found for test simd_ops_test_op_addpd_220
-- No reference output found for test simd_ops_test_op_addps_117
-- No reference output found for test simd_ops_test_op_addps_165
-- No reference output found for test simd_ops_test_op_addps_21
-- No reference output found for test simd_ops_test_op_addps_69
-- No reference output found for test simd_ops_test_op_andps_186
-- No reference output found for test simd_ops_test_op_blendvpd_254
-- No reference output found for test simd_ops_test_op_blendvpd_277
-- No reference output found for test simd_ops_test_op_blendvpd_300
-- No reference output found for test simd_ops_test_op_blendvps_253
-- No reference output found for test simd_ops_test_op_blendvps_276
</pre><pre style="word-wrap: break-word; white-space: pre-wrap;">Could you clean that up? </pre><div><a href="http://lab.llvm.org:8080/green/job/Compiler_Verifiers/2924/">http://lab.llvm.org:8080/green/job/Compiler_Verifiers/2924/</a></div><div><br></div><div>Also, a test fails when —verifymachine-instrs is passed:</div><div><br></div><div><pre style="word-wrap: break-word; white-space: pre-wrap;"> /Users/buildslave/jenkins/workspace/Compiler_Verifiers/build1/tools/timeit --summary Bitcode/simd_ops/CMakeFiles/simd_ops_test_op_roundpd_267.dir/x86_scalar_tests/scalar_test_op_roundpd_267.bc.o.time /Users/buildslave/jenkins/workspace/Compiler_Verifiers/host-compiler/bin/c++ -DNDEBUG -I/Users/buildslave/jenkins/workspace/Compiler_Verifiers/test-suite/Bitcode/simd_ops -IBitcode/simd_ops -mllvm -verify-machineinstrs -save-temps=obj -O3 -DNDEBUG -w -Werror=date-time -MMD -MT Bitcode/simd_ops/CMakeFiles/simd_ops_test_op_roundpd_267.dir/x86_scalar_tests/scalar_test_op_roundpd_267.bc.o -MF Bitcode/simd_ops/CMakeFiles/simd_ops_test_op_roundpd_267.dir/x86_scalar_tests/scalar_test_op_roundpd_267.bc.o.d -o Bitcode/simd_ops/CMakeFiles/simd_ops_test_op_roundpd_267.dir/x86_scalar_tests/scalar_test_op_roundpd_267.bc.o -c /Users/buildslave/jenkins/workspace/Compiler_Verifiers/test-suite/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_roundpd_267.bc
# After Peephole Optimizations
# Machine code for function __scalar_test_op: Properties: <>
Frame Objects:
fi#-5: size=8, align=16, fixed, at location [SP+40]
fi#-4: size=8, align=8, fixed, at location [SP+32]
fi#-3: size=8, align=16, fixed, at location [SP+24]
fi#-2: size=8, align=8, fixed, at location [SP+16]
fi#-1: size=8, align=16, fixed, at location [SP+8]
Function Live Ins: %RSI in %vreg12
BB#0: derived from LLVM BB %"produce scalar_op_roundpd_267"
Live Ins: %RSI
%vreg12<def> = COPY %RSI; GR64:%vreg12
%vreg17<def> = MOV64rm <fi#-5>, 1, %noreg, 0, %noreg; mem:LD8[FixedStack-5](align=16) GR64:%vreg17
%vreg18<def> = MOV32rm %vreg17, 1, %noreg, 20, %noreg; mem:LD4[%buf_extent168] GR32:%vreg18 GR64:%vreg17
TEST32rr %vreg18, %vreg18, %EFLAGS<imp-def>; GR32:%vreg18
JLE_1 <BB#5>, %EFLAGS<imp-use>
JMP_1 <BB#1>
Successors according to CFG: BB#1(0x80000000 / 0x80000000 = 100.00%) BB#5(0x00000000 / 0x80000000 = 0.00%)
BB#1: derived from LLVM BB %"for scalar_op_roundpd_267.s0.y.preheader"
Predecessors according to CFG: BB#0
%vreg0<def> = MOV64rm %vreg12, 1, %noreg, 8, %noreg; mem:LD8[%0] GR64:%vreg0,%vreg12
%vreg1<def> = MOV32rm %vreg17, 1, %noreg, 52, %noreg; mem:LD4[%buf_min176] GR32:%vreg1 GR64:%vreg17
%vreg2<def,tied1> = ADD32rr %vreg1<tied0>, %vreg18, %EFLAGS<imp-def,dead>; GR32:%vreg2,%vreg1,%vreg18
%vreg19<def> = MOVSX64rm32 %vreg17, 1, %noreg, 48, %noreg; mem:LD4[%buf_min175] GR64:%vreg19,%vreg17
%vreg20<def> = MOVSX64rm32 %vreg17, 1, %noreg, 36, %noreg; mem:LD4[%buf_stride172] GR64:%vreg20,%vreg17
%vreg21<def> = MOV64rm %vreg17, 1, %noreg, 8, %noreg; mem:LD8[%buf_host163] GR64:%vreg21,%vreg17
%vreg22<def,tied1> = SHL64ri %vreg19<tied0>, 3, %EFLAGS<imp-def,dead>; GR64:%vreg22,%vreg19
%vreg3<def,tied1> = SUB64rr %vreg21<tied0>, %vreg22<kill>, %EFLAGS<imp-def,dead>; GR64:%vreg3,%vreg21,%vreg22
%vreg4<def,tied1> = SHL64ri %vreg20<tied0>, 3, %EFLAGS<imp-def,dead>; GR64:%vreg4,%vreg20
%vreg24<def> = MOV32r0 %EFLAGS<imp-def,dead>; GR32:%vreg24
%vreg27<def> = IMPLICIT_DEF; FR64:%vreg27
%vreg30<def> = IMPLICIT_DEF; FR64:%vreg30
%vreg33<def> = IMPLICIT_DEF; FR64:%vreg33
%vreg36<def> = IMPLICIT_DEF; FR64:%vreg36
%vreg39<def> = IMPLICIT_DEF; FR64:%vreg39
%vreg42<def> = IMPLICIT_DEF; FR64:%vreg42
%vreg45<def> = IMPLICIT_DEF; FR64:%vreg45
%vreg48<def> = IMPLICIT_DEF; FR64:%vreg48
Successors according to CFG: BB#2(?%)
BB#2: derived from LLVM BB %"for scalar_op_roundpd_267.s0.x.preheader"
Predecessors according to CFG: BB#1 BB#4
%vreg5<def> = PHI %vreg3, <BB#1>, %vreg10, <BB#4>; GR64:%vreg5,%vreg3,%vreg10
%vreg6<def> = PHI %vreg1, <BB#1>, %vreg9, <BB#4>; GR32:%vreg6,%vreg1,%vreg9
%vreg23<def> = SUBREG_TO_REG 0, %vreg24, 4; GR64:%vreg23 GR32:%vreg24
Successors according to CFG: BB#3(?%)
BB#3: derived from LLVM BB %"for scalar_op_roundpd_267.s0.x"
Predecessors according to CFG: BB#2 BB#3
%vreg7<def> = PHI %vreg23, <BB#2>, %vreg8, <BB#3>; GR64_NOSP:%vreg7 GR64:%vreg23,%vreg8
%vreg26<def> = VROUNDSDm %vreg27, %vreg0, 8, %vreg7, 0, %noreg, 12; mem:LD8[%sunkaddr32](tbaa=!6) FR64:%vreg26,%vreg27 GR64:%vreg0 GR64_NOSP:%vreg7
VMOVSDmr %vreg5, 8, %vreg7, 0, %noreg, %vreg26<kill>; mem:ST8[%scevgep4](tbaa=!9) GR64:%vreg5 GR64_NOSP:%vreg7 FR64:%vreg26
%vreg29<def> = VROUNDSDm %vreg30, %vreg0, 8, %vreg7, 8, %noreg, 12; mem:LD8[%sunkaddr37](tbaa=!6) FR64:%vreg29,%vreg30 GR64:%vreg0 GR64_NOSP:%vreg7
VMOVSDmr %vreg5, 8, %vreg7, 8, %noreg, %vreg29<kill>; mem:ST8[%scevgep21](tbaa=!9) GR64:%vreg5 GR64_NOSP:%vreg7 FR64:%vreg29
%vreg32<def> = VROUNDSDm %vreg33, %vreg0, 8, %vreg7, 16, %noreg, 12; mem:LD8[%sunkaddr42](tbaa=!6) FR64:%vreg32,%vreg33 GR64:%vreg0 GR64_NOSP:%vreg7
VMOVSDmr %vreg5, 8, %vreg7, 16, %noreg, %vreg32<kill>; mem:ST8[%scevgep22](tbaa=!9) GR64:%vreg5 GR64_NOSP:%vreg7 FR64:%vreg32
%vreg35<def> = VROUNDSDm %vreg36, %vreg0, 8, %vreg7, 24, %noreg, 12; mem:LD8[%sunkaddr47](tbaa=!6) FR64:%vreg35,%vreg36 GR64:%vreg0 GR64_NOSP:%vreg7
VMOVSDmr %vreg5, 8, %vreg7, 24, %noreg, %vreg35<kill>; mem:ST8[%scevgep23](tbaa=!9) GR64:%vreg5 GR64_NOSP:%vreg7 FR64:%vreg35
%vreg38<def> = VROUNDSDm %vreg39, %vreg0, 8, %vreg7, 32, %noreg, 12; mem:LD8[%sunkaddr52](tbaa=!6) FR64:%vreg38,%vreg39 GR64:%vreg0 GR64_NOSP:%vreg7
VMOVSDmr %vreg5, 8, %vreg7, 32, %noreg, %vreg38<kill>; mem:ST8[%scevgep24](tbaa=!9) GR64:%vreg5 GR64_NOSP:%vreg7 FR64:%vreg38
%vreg41<def> = VROUNDSDm %vreg42, %vreg0, 8, %vreg7, 40, %noreg, 12; mem:LD8[%sunkaddr57](tbaa=!6) FR64:%vreg41,%vreg42 GR64:%vreg0 GR64_NOSP:%vreg7
VMOVSDmr %vreg5, 8, %vreg7, 40, %noreg, %vreg41<kill>; mem:ST8[%scevgep25](tbaa=!9) GR64:%vreg5 GR64_NOSP:%vreg7 FR64:%vreg41
%vreg44<def> = VROUNDSDm %vreg45, %vreg0, 8, %vreg7, 48, %noreg, 12; mem:LD8[%sunkaddr62](tbaa=!6) FR64:%vreg44,%vreg45 GR64:%vreg0 GR64_NOSP:%vreg7
VMOVSDmr %vreg5, 8, %vreg7, 48, %noreg, %vreg44<kill>; mem:ST8[%scevgep26](tbaa=!9) GR64:%vreg5 GR64_NOSP:%vreg7 FR64:%vreg44
%vreg47<def> = VROUNDSDm %vreg48, %vreg0, 8, %vreg7, 56, %noreg, 12; mem:LD8[%sunkaddr67](tbaa=!6) FR64:%vreg47,%vreg48 GR64:%vreg0 GR64_NOSP:%vreg7
VMOVSDmr %vreg5, 8, %vreg7, 56, %noreg, %vreg47<kill>; mem:ST8[%scevgep27](tbaa=!9) GR64:%vreg5 GR64_NOSP:%vreg7 FR64:%vreg47
%vreg8<def,tied1> = ADD64ri8 %vreg7<tied0>, 8, %EFLAGS<imp-def,dead>; GR64:%vreg8 GR64_NOSP:%vreg7
CMP64ri32 %vreg8, 256, %EFLAGS<imp-def>; GR64:%vreg8
JNE_1 <BB#3>, %EFLAGS<imp-use>
JMP_1 <BB#4>
Successors according to CFG: BB#4(0x04000000 / 0x80000000 = 3.12%) BB#3(0x7c000000 / 0x80000000 = 96.88%)
BB#4: derived from LLVM BB %"end for scalar_op_roundpd_267.s0.x"
Predecessors according to CFG: BB#3
%vreg9<def,tied1> = ADD32ri8 %vreg6<tied0>, 1, %EFLAGS<imp-def,dead>; GR32:%vreg9,%vreg6
%vreg10<def,tied1> = ADD64rr %vreg5<tied0>, %vreg4, %EFLAGS<imp-def,dead>; GR64:%vreg10,%vreg5,%vreg4
CMP32rr %vreg9, %vreg2, %EFLAGS<imp-def>; GR32:%vreg9,%vreg2
JNE_1 <BB#2>, %EFLAGS<imp-use>
JMP_1 <BB#5>
Successors according to CFG: BB#5(0x04000000 / 0x80000000 = 3.12%) BB#2(0x7c000000 / 0x80000000 = 96.88%)
BB#5: derived from LLVM BB %destructor_block
Predecessors according to CFG: BB#0 BB#4
%vreg51<def> = MOV32r0 %EFLAGS<imp-def,dead>; GR32:%vreg51
%EAX<def> = COPY %vreg51; GR32:%vreg51
RET 0, %EAX
# End machine code for function __scalar_test_op.
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg26<def> = VROUNDSDm
- operand 0: %vreg26<def>
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg26<def> = VROUNDSDm
- operand 1: %vreg27
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg29<def> = VROUNDSDm
- operand 0: %vreg29<def>
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg29<def> = VROUNDSDm
- operand 1: %vreg30
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg32<def> = VROUNDSDm
- operand 0: %vreg32<def>
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg32<def> = VROUNDSDm
- operand 1: %vreg33
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg35<def> = VROUNDSDm
- operand 0: %vreg35<def>
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg35<def> = VROUNDSDm
- operand 1: %vreg36
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg38<def> = VROUNDSDm
- operand 0: %vreg38<def>
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg38<def> = VROUNDSDm
- operand 1: %vreg39
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg41<def> = VROUNDSDm
- operand 0: %vreg41<def>
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg41<def> = VROUNDSDm
- operand 1: %vreg42
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg44<def> = VROUNDSDm
- operand 0: %vreg44<def>
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg44<def> = VROUNDSDm
- operand 1: %vreg45
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg47<def> = VROUNDSDm
- operand 0: %vreg47<def>
Expected a VR128 register, but got a FR64 register
*** Bad machine code: Illegal virtual register for instruction ***
- function: __scalar_test_op
- basic block: BB#3 for scalar_op_roundpd_267.s0.x (0x7fef7c8a24a0)
- instruction: %vreg47<def> = VROUNDSDm
- operand 1: %vreg48
Expected a VR128 register, but got a FR64 register
fatal error: error in backend: Found 16 machine code errors.
clang-3.8: error: clang frontend command failed with exit code 70 (use -v to see invocation)
Apple clang version 3.8.0 (master 275827) (based on LLVM 3.8.0)
Target: x86_64-apple-darwin14.5.0
Thread model: posix
</pre></div><div><br></div></div> <br> <div id="bloop_sign_1468958436537518080" class="bloop_sign"></div> <br><p class="airmail_on">On July 18, 2016 at 1:12:47 PM, Alina Sbirlea via llvm-commits (<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>) wrote:</p> <blockquote type="cite" class="clean_bq"><span><div><div></div><div>Author: asbirlea<br>Date: Mon Jul 18 15:04:31 2016<br>New Revision: 275897<br><br>URL: http://llvm.org/viewvc/llvm-project?rev=275897&view=rev<br>Log:<br>Test from Halide suite checking simd operations.<br><br>Summary: This is an initial patch for feedback request on: 1. Location<br>of bitcode files 2. Building to assembly (separate discussion for using<br>llc with metadata from bitcode files) 3. Creating a single test vs a test for each simd operation<br><br>Subscribers: tberghammer, danalbert, srhines<br><br>Differential Revision: http://reviews.llvm.org/D17726<br><br>Added:<br> test-suite/trunk/Bitcode/<br> test-suite/trunk/Bitcode/CMakeLists.txt<br> test-suite/trunk/Bitcode/README_HalideCodegen<br> test-suite/trunk/Bitcode/Regression/<br> test-suite/trunk/Bitcode/Regression/CMakeLists.txt<br> test-suite/trunk/Bitcode/Regression/vector_widen/<br> test-suite/trunk/Bitcode/Regression/vector_widen/CMakeLists.txt<br> test-suite/trunk/Bitcode/Regression/vector_widen/driver.cpp<br> test-suite/trunk/Bitcode/Regression/vector_widen/halide_buffer.h<br> test-suite/trunk/Bitcode/Regression/vector_widen/halide_runtime.bc<br> test-suite/trunk/Bitcode/Regression/vector_widen/vector_widen.bc<br> test-suite/trunk/Bitcode/simd_ops/<br> test-suite/trunk/Bitcode/simd_ops/CMakeLists.txt<br> test-suite/trunk/Bitcode/simd_ops/filter_test_op.h<br> test-suite/trunk/Bitcode/simd_ops/halide_buffer.h<br> test-suite/trunk/Bitcode/simd_ops/simd_op_check_runtime.bc<br> test-suite/trunk/Bitcode/simd_ops/simd_ops.cpp<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_190.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_205.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_220.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_117.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_165.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_21.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_69.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_andps_186.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_blendvpd_254.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_blendvpd_277.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_blendvpd_300.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_blendvps_253.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_blendvps_276.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_blendvps_299.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpeqpd_197.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpeqpd_212.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpeqpd_227.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpeqps_136.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpeqps_184.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpeqps_40.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpeqps_88.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpltpd_198.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpltpd_213.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpltpd_228.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpltps_137.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpltps_185.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpltps_41.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_cmpltps_89.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_divpd_193.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_divpd_208.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_divpd_223.bc<br> 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test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminub_180.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminub_36.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminub_84.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminud_263.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminud_286.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminud_309.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminuw_261.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminuw_284.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pminuw_307.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_110.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_133.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_134.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_135.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_14.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_158.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_181.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_182.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_183.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_37.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_38.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_39.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_62.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_85.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmulhuw_86.bc<br> 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test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmuludq_216.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmuludq_231.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmuludq_251.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmuludq_274.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_pmuludq_297.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubb_139.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubb_43.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubb_91.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubd_144.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubd_48.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubd_96.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubq_200.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubq_215.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubq_230.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubsb_147.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubsb_3.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubsb_51.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubsb_99.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubsw_103.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubsw_151.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubsw_55.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubsw_7.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubusb_101.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubusb_149.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubusb_5.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubusb_53.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubusw_105.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubusw_153.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubusw_57.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubusw_9.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubw_141.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubw_45.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_psubw_93.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_rcpps_120.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_rcpps_168.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_rcpps_24.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_rcpps_72.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_267.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_269.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_271.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_290.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_292.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_294.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_313.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_315.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundpd_317.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_266.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_268.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_270.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_289.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_291.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_293.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_312.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_314.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_roundps_316.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_rsqrtps_122.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_rsqrtps_170.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_rsqrtps_26.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_rsqrtps_74.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_shufps_189.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_sqrtpd_194.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_sqrtpd_209.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_sqrtpd_224.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_sqrtps_121.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_sqrtps_169.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_sqrtps_25.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_sqrtps_73.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_subpd_191.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_subpd_206.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_subpd_221.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_subps_118.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_subps_166.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_subps_22.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_subps_70.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vaddpd_326.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vaddps_325.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vblendvpd_342.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vblendvps_341.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcmpeqpd_337.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcmpeqps_339.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcmpltpd_338.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcmpltps_340.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcvtdq2pd_346.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcvtdq2ps_344.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcvtpd2ps_348.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcvtps2pd_347.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcvttpd2dq_345.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vcvttps2dq_343.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vmaxpd_334.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vmaxps_333.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vminpd_332.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vminps_331.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vmulpd_328.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vmulps_327.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vrcpps_324.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vroundpd_336.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vroundps_335.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vrsqrtps_323.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vsqrtpd_322.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vsqrtps_321.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vsubpd_330.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_vsubps_329.bc<br> test-suite/trunk/Bitcode/simd_ops/x86_unopt_bcfiles/test_op_xorps_188.bc<br><br>Added: test-suite/trunk/Bitcode/CMakeLists.txt<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/CMakeLists.txt?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/CMakeLists.txt (added)<br>+++ test-suite/trunk/Bitcode/CMakeLists.txt Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,7 @@<br>+if(NOT TEST_SUITE_BENCHMARKING_ONLY)<br>+ llvm_add_subdirectories(Regression)<br>+ if(ARCH STREQUAL "x86")<br>+ llvm_add_subdirectories(simd_ops)<br>+ endif()<br>+endif()<br>+<br><br>Added: test-suite/trunk/Bitcode/README_HalideCodegen<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/README_HalideCodegen?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/README_HalideCodegen (added)<br>+++ test-suite/trunk/Bitcode/README_HalideCodegen Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,28 @@<br>+Intro to Halide codegeneration pattern (based on Halide documentation)<br>+===========================================================================<br>+<br>+<br>+functionName:<br>+============<br>+Functions generated by Halide are regular functions with a user chosen name and arguments.<br>+These functions are considered to be the public methods called by external programs.<br>+The body checks the correctness of its arguments, then calls the function<br>+that contains the actual computation. This function is called "__functionName".<br>+<br>+__functionName:<br>+=============<br>+Actual function as defined by the Halide programmer.<br>+These are considered to be private functions, called through the above public function.<br>+<br>+functionName_argv:<br>+=================<br>+If the function is externally visible, Halide also creates an argv wrapper.<br>+This is useful for calling from JIT and other machine interfaces.<br>+The wrapper calls the function with an array of pointer arguments.<br>+This is easier for the JIT to call than a function with an unknown<br>+(at compile time) argument list.<br>+<br>+<br>+E.g. The unit tests "simd_ops" contain functions called "unopt_test_op" and "unopt_scalar_test_op"<br>+<br>+<br><br>Added: test-suite/trunk/Bitcode/Regression/CMakeLists.txt<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/Regression/CMakeLists.txt?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/Regression/CMakeLists.txt (added)<br>+++ test-suite/trunk/Bitcode/Regression/CMakeLists.txt Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,3 @@<br>+if(ARCH STREQUAL "x86")<br>+ add_subdirectory(vector_widen)<br>+endif()<br><br>Added: test-suite/trunk/Bitcode/Regression/vector_widen/CMakeLists.txt<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/Regression/vector_widen/CMakeLists.txt?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/Regression/vector_widen/CMakeLists.txt (added)<br>+++ test-suite/trunk/Bitcode/Regression/vector_widen/CMakeLists.txt Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,10 @@<br>+SET_SOURCE_FILES_PROPERTIES(${CMAKE_CURRENT_SOURCE_DIR}/halide_runtime.bc PROPERTIES LANGUAGE CXX)<br>+SET_SOURCE_FILES_PROPERTIES(${CMAKE_CURRENT_SOURCE_DIR}/vector_widen.bc PROPERTIES LANGUAGE CXX)<br>+<br>+list(APPEND LDFLAGS -lpthread -ldl)<br>+<br>+set(Source ${CMAKE_CURRENT_SOURCE_DIR}/driver.cpp ${CMAKE_CURRENT_SOURCE_DIR}/halide_runtime.bc ${CMAKE_CURRENT_SOURCE_DIR}/vector_widen.bc)<br>+set(PROG widen_bug)<br>+llvm_multisource()<br>+<br>+<br><br>Added: test-suite/trunk/Bitcode/Regression/vector_widen/driver.cpp<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/Regression/vector_widen/driver.cpp?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/Regression/vector_widen/driver.cpp (added)<br>+++ test-suite/trunk/Bitcode/Regression/vector_widen/driver.cpp Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,63 @@<br>+#include "halide_buffer.h"<br>+<br>+template<typename T><br>+T rand_value() {<br>+ return (T)(rand() * 0.125) - 100;<br>+}<br>+<br>+template<typename T><br>+buffer_t make_buffer(int w, int h) {<br>+ T *mem = new T[w*h];<br>+ buffer_t buf = {0};<br>+ buf.host = (uint8_t *)mem;<br>+ buf.extent[0] = w;<br>+ buf.extent[1] = h;<br>+ buf.elem_size = sizeof(T);<br>+ buf.stride[0] = 1;<br>+ buf.stride[1] = w;<br>+<br>+ for (int i = 0; i < w*h; i++) {<br>+ mem[i] = rand_value<T>();<br>+ }<br>+<br>+ return buf;<br>+}<br>+<br>+<br>+int main(int argc, char **argv) {<br>+ unsigned int err_code = 0;<br>+#if (!__has_builtin(__builtin_cpu_supports) && (defined(__i386__) || defined(__x86_64__)))<br>+ return err_code;<br>+#endif<br>+#if defined(__i386__) || defined(__x86_64__)<br>+ if (!__builtin_cpu_supports("avx")) {<br>+ return err_code;<br>+ }<br>+#endif<br>+ time_t seed;<br>+ if (argc > 1) {<br>+ seed = atoi(argv[1]);<br>+ }<br>+ else {<br>+ seed = time(NULL);<br>+ srand (seed);<br>+ }<br>+ const int W = 4096, H = 512;<br>+ // Make some input buffers<br>+ buffer_t bufs[] = {<br>+ make_buffer<uint8_t>(W, H),<br>+ make_buffer<int32_t>(W, H)<br>+ };<br>+<br>+ for (int i = 0; i < 1; i++) {<br>+ filter f = filters[i];<br>+ f.fn(bufs + 0,<br>+ bufs + 1);<br>+ }<br>+<br>+ for (int i = 0; i < sizeof(bufs)/sizeof(buffer_t); i++) {<br>+ delete[] bufs[i].host;<br>+ }<br>+<br>+ return err_code;<br>+}<br><br>Added: test-suite/trunk/Bitcode/Regression/vector_widen/halide_buffer.h<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/Regression/vector_widen/halide_buffer.h?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/Regression/vector_widen/halide_buffer.h (added)<br>+++ test-suite/trunk/Bitcode/Regression/vector_widen/halide_buffer.h Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,54 @@<br>+#include <stdlib.h><br>+#include <stdio.h><br>+#include <time.h><br>+#ifndef HALIDE_ATTRIBUTE_ALIGN<br>+ #ifdef _MSC_VER<br>+ #define HALIDE_ATTRIBUTE_ALIGN(x) __declspec(align(x))<br>+ #else<br>+ #define HALIDE_ATTRIBUTE_ALIGN(x) __attribute__((aligned(x)))<br>+ #endif<br>+#endif<br>+#ifndef BUFFER_T_DEFINED<br>+#define BUFFER_T_DEFINED<br>+#include <stdbool.h><br>+#include <stdint.h><br>+typedef struct buffer_t {<br>+ uint64_t dev;<br>+ uint8_t* host;<br>+ int32_t extent[4];<br>+ int32_t stride[4];<br>+ int32_t min[4];<br>+ int32_t elem_size;<br>+ HALIDE_ATTRIBUTE_ALIGN(1) bool host_dirty;<br>+ HALIDE_ATTRIBUTE_ALIGN(1) bool dev_dirty;<br>+ HALIDE_ATTRIBUTE_ALIGN(1) uint8_t _padding[10 - sizeof(void *)];<br>+} buffer_t;<br>+#endif<br>+struct halide_filter_metadata_t;<br>+#ifndef HALIDE_FUNCTION_ATTRS<br>+#define HALIDE_FUNCTION_ATTRS<br>+#endif<br>+#ifndef FILTER_T_DEFINED<br>+#define FILTER_T_DEFINED<br>+typedef struct filter {<br>+ const char *name;<br>+ int (*fn)(buffer_t *, // uint8<br>+ buffer_t *); // uint32<br>+} filter;<br>+#endif<br>+<br>+#ifdef __cplusplus<br>+extern "C" {<br>+#endif<br>+int vector_widen(buffer_t *_in_u8_buffer, buffer_t *widen_buffer) HALIDE_FUNCTION_ATTRS;<br>+int vector_widen_argv(void **args) HALIDE_FUNCTION_ATTRS;<br>+extern const struct halide_filter_metadata_t vector_widen_metadata;<br>+#ifdef __cplusplus<br>+} // extern "C"<br>+#endif<br>+<br>+filter filters[] = {<br>+{"vector_widen", &vector_widen},<br>+{NULL, NULL}};<br>+<br>+<br><br>Added: test-suite/trunk/Bitcode/Regression/vector_widen/halide_runtime.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/Regression/vector_widen/halide_runtime.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/Regression/vector_widen/halide_runtime.bc (added) and test-suite/trunk/Bitcode/Regression/vector_widen/halide_runtime.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/Regression/vector_widen/vector_widen.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/Regression/vector_widen/vector_widen.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/Regression/vector_widen/vector_widen.bc (added) and test-suite/trunk/Bitcode/Regression/vector_widen/vector_widen.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/simd_ops/CMakeLists.txt<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/CMakeLists.txt?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/simd_ops/CMakeLists.txt (added)<br>+++ test-suite/trunk/Bitcode/simd_ops/CMakeLists.txt Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,18 @@<br>+file(GLOB uosources ${CMAKE_CURRENT_SOURCE_DIR}/${ARCH}_tests/*.bc)<br>+SET_SOURCE_FILES_PROPERTIES(${uosources} PROPERTIES LANGUAGE CXX)<br>+file(GLOB scalar_sources ${CMAKE_CURRENT_SOURCE_DIR}/${ARCH}_scalar_tests/*.bc)<br>+SET_SOURCE_FILES_PROPERTIES(${scalar_sources} PROPERTIES LANGUAGE CXX)<br>+SET_SOURCE_FILES_PROPERTIES(${CMAKE_CURRENT_SOURCE_DIR}/simd_op_check_runtime.bc PROPERTIES LANGUAGE CXX)<br>+<br>+list(APPEND LDFLAGS -lpthread -ldl)<br>+<br>+foreach(sourcebc ${uosources})<br>+ string(REGEX REPLACE ".[cp]+$" "" pathbc ${sourcebc})<br>+ string(REGEX REPLACE ".*/" "" namebc ${pathbc})<br>+ string(REPLACE "." "" namebc ${namebc})<br>+ set(Source ${CMAKE_CURRENT_SOURCE_DIR}/simd_ops.cpp ${CMAKE_CURRENT_SOURCE_DIR}/simd_op_check_runtime.bc ${CMAKE_CURRENT_SOURCE_DIR}/${ARCH}_tests/${namebc}.bc ${CMAKE_CURRENT_SOURCE_DIR}/${ARCH}_scalar_tests/scalar_${namebc}.bc)<br>+ set(PROG simd_ops_${namebc})<br>+ llvm_multisource()<br>+endforeach()<br>+<br>+<br><br>Added: test-suite/trunk/Bitcode/simd_ops/filter_test_op.h<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/filter_test_op.h?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/simd_ops/filter_test_op.h (added)<br>+++ test-suite/trunk/Bitcode/simd_ops/filter_test_op.h Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,37 @@<br>+#include "halide_buffer.h"<br>+#ifndef FILTER_T_DEFINED<br>+#define FILTER_T_DEFINED<br>+typedef struct filter {<br>+ const char *name;<br>+ int (*fn)(buffer_t *, // float32<br>+ buffer_t *, // float64<br>+ buffer_t *, // int8<br>+ buffer_t *, // uint8<br>+ buffer_t *, // int16<br>+ buffer_t *, // uint16<br>+ buffer_t *, // int32<br>+ buffer_t *, // uint32<br>+ buffer_t *, // int64<br>+ buffer_t *, // uint64<br>+ buffer_t *); // output<br>+} filter;<br>+#endif<br>+#ifdef __cplusplus<br>+extern "C" {<br>+#endif<br>+int test_op(buffer_t *_in_f32_buffer, buffer_t *_in_f64_buffer, buffer_t *_in_i8_buffer, buffer_t *_in_u8_buffer, buffer_t *_in_i16_buffer, buffer_t *_in_u16_buffer, buffer_t *_in_i32_buffer, buffer_t *_in_u32_buffer, buffer_t *_in_i64_buffer, buffer_t *_in_u64_buffer, buffer_t *_out_op_buffer) HALIDE_FUNCTION_ATTRS;<br>+int test_op_argv(void **args) HALIDE_FUNCTION_ATTRS;<br>+extern const struct halide_filter_metadata_t test_op_metadata;<br>+<br>+int scalar_test_op(buffer_t *_in_f32_buffer, buffer_t *_in_f64_buffer, buffer_t *_in_i8_buffer, buffer_t *_in_u8_buffer, buffer_t *_in_i16_buffer, buffer_t *_in_u16_buffer, buffer_t *_in_i32_buffer, buffer_t *_in_u32_buffer, buffer_t *_in_i64_buffer, buffer_t *_in_u64_buffer, buffer_t *_out_op_buffer) HALIDE_FUNCTION_ATTRS;<br>+int scalar_test_op_argv(void **args) HALIDE_FUNCTION_ATTRS;<br>+extern const struct halide_filter_metadata_t scalar_test_op_metadata;<br>+#ifdef __cplusplus<br>+} // extern "C"<br>+#endif<br>+<br>+filter filters[] = {<br>+{"test_op", &test_op},<br>+{"scalar_test_op", &scalar_test_op},<br>+{NULL, NULL}};<br>+<br><br>Added: test-suite/trunk/Bitcode/simd_ops/halide_buffer.h<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/halide_buffer.h?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/simd_ops/halide_buffer.h (added)<br>+++ test-suite/trunk/Bitcode/simd_ops/halide_buffer.h Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,31 @@<br>+#include <stdlib.h><br>+#include <stdio.h><br>+#include <time.h><br>+#ifndef HALIDE_ATTRIBUTE_ALIGN<br>+ #ifdef _MSC_VER<br>+ #define HALIDE_ATTRIBUTE_ALIGN(x) __declspec(align(x))<br>+ #else<br>+ #define HALIDE_ATTRIBUTE_ALIGN(x) __attribute__((aligned(x)))<br>+ #endif<br>+#endif<br>+#ifndef BUFFER_T_DEFINED<br>+#define BUFFER_T_DEFINED<br>+#include <stdbool.h><br>+#include <stdint.h><br>+typedef struct buffer_t {<br>+ uint64_t dev;<br>+ uint8_t* host;<br>+ int32_t extent[4];<br>+ int32_t stride[4];<br>+ int32_t min[4];<br>+ int32_t elem_size;<br>+ HALIDE_ATTRIBUTE_ALIGN(1) bool host_dirty;<br>+ HALIDE_ATTRIBUTE_ALIGN(1) bool dev_dirty;<br>+ HALIDE_ATTRIBUTE_ALIGN(1) uint8_t _padding[10 - sizeof(void *)];<br>+} buffer_t;<br>+#endif<br>+struct halide_filter_metadata_t;<br>+#ifndef HALIDE_FUNCTION_ATTRS<br>+#define HALIDE_FUNCTION_ATTRS<br>+#endif<br>+<br><br>Added: test-suite/trunk/Bitcode/simd_ops/simd_op_check_runtime.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/simd_op_check_runtime.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/simd_ops/simd_op_check_runtime.bc (added) and test-suite/trunk/Bitcode/simd_ops/simd_op_check_runtime.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/simd_ops/simd_ops.cpp<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/simd_ops.cpp?rev=275897&view=auto<br>==============================================================================<br>--- test-suite/trunk/Bitcode/simd_ops/simd_ops.cpp (added)<br>+++ test-suite/trunk/Bitcode/simd_ops/simd_ops.cpp Mon Jul 18 15:04:31 2016<br>@@ -0,0 +1,107 @@<br>+#include "filter_test_op.h"<br>+<br>+template<typename T><br>+T rand_value() {<br>+ return (T)(rand() * 0.125) - 100;<br>+}<br>+<br>+// Even on android, we want errors to stdout<br>+extern "C" void halide_print(void *, const char *msg) {<br>+ printf("%s\n", msg);<br>+}<br>+<br>+template<typename T><br>+buffer_t make_buffer(int w, int h) {<br>+ T *mem = new T[w*h];<br>+ buffer_t buf = {0};<br>+ buf.host = (uint8_t *)mem;<br>+ buf.extent[0] = w;<br>+ buf.extent[1] = h;<br>+ buf.elem_size = sizeof(T);<br>+ buf.stride[0] = 1;<br>+ buf.stride[1] = w;<br>+<br>+ for (int i = 0; i < w*h; i++) {<br>+ mem[i] = rand_value<T>();<br>+ }<br>+<br>+ return buf;<br>+}<br>+<br>+<br>+int main(int argc, char **argv) {<br>+ unsigned int err_code = 0;<br>+#if (!__has_builtin(__builtin_cpu_supports) && (defined(__i386__) || defined(__x86_64__)))<br>+ return err_code;<br>+#endif<br>+#if defined(__i386__) || defined(__x86_64__)<br>+ if (!__builtin_cpu_supports("avx")) {<br>+ return err_code;<br>+ }<br>+#endif<br>+ time_t seed;<br>+ if (argc > 1) {<br>+ seed = atoi(argv[1]);<br>+ }<br>+ else {<br>+ seed = time(NULL);<br>+ srand (seed);<br>+ }<br>+ int W = 256, H = 100;<br>+ // Make some input buffers<br>+ buffer_t bufs[] = {<br>+ make_buffer<float>(W, H),<br>+ make_buffer<double>(W, H),<br>+ make_buffer<int8_t>(W, H),<br>+ make_buffer<uint8_t>(W, H),<br>+ make_buffer<int16_t>(W, H),<br>+ make_buffer<uint16_t>(W, H),<br>+ make_buffer<int32_t>(W, H),<br>+ make_buffer<uint32_t>(W, H),<br>+ make_buffer<int64_t>(W, H),<br>+ make_buffer<uint64_t>(W, H)<br>+ };<br>+<br>+ int NO = 2;<br>+ buffer_t out[] = {<br>+ make_buffer<double>(W, H),<br>+ make_buffer<double>(W, H)<br>+ };<br>+ double *out_value[NO];<br>+<br>+ for (int i = 0; i < NO; i++) {<br>+ filter f = filters[i];<br>+ f.fn(bufs + 0,<br>+ bufs + 1,<br>+ bufs + 2,<br>+ bufs + 3,<br>+ bufs + 4,<br>+ bufs + 5,<br>+ bufs + 6,<br>+ bufs + 7,<br>+ bufs + 8,<br>+ bufs + 9,<br>+ &(out[i]));<br>+ out_value[i] = (double *)(out[i].host);<br>+ }<br>+<br>+ int err;<br>+ for (int i = 0; i < W*H; i++) {<br>+ if ((err = out_value[0][i] - out_value[1][i]) > 0.0001) {<br>+ fprintf(stderr, "Code generation error (%d): %d. Seer used %ld\n", i, err, seed);<br>+ err_code = 1;<br>+ break;<br>+ }<br>+ }<br>+<br>+ for (int i = 0; i < sizeof(bufs)/sizeof(buffer_t); i++) {<br>+ delete[] bufs[i].host;<br>+ }<br>+<br>+ for (int i = 0; i < NO; i++) {<br>+ delete[] out[i].host;<br>+ }<br>+<br>+ return err_code;<br>+}<br>+<br><br>Added: test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_190.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_190.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_190.bc (added) and test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_190.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_205.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_205.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_205.bc (added) and test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_205.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_220.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_220.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_220.bc (added) and test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addpd_220.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_117.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_117.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_117.bc (added) and test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_117.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_165.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_165.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_165.bc (added) and test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_165.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_21.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_21.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_21.bc (added) and test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_21.bc Mon Jul 18 15:04:31 2016 differ<br><br>Added: test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_69.bc<br>URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Bitcode/simd_ops/x86_scalar_tests/scalar_test_op_addps_69.bc?rev=275897&view=auto<br>==============================================================================<br>Binary files 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