<div dir="ltr">Hi Pirama,<div><br></div><div>Next time you have an llvm change and a clang change that depends on it, please commit the llvm part *first*. Otherwise it causes widespread breakage in the buildbots, since the top-of-trunk clang + llvm combination no longer builds.</div><div><br></div><div>Thanks,</div><div> Michael</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Jul 1, 2016 at 5:23 PM, Pirama Arumuga Nainar via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: pirama<br>
Date: Fri Jul 1 19:23:09 2016<br>
New Revision: 274412<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=274412&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=274412&view=rev</a><br>
Log:<br>
Add RenderScript ArchType<br>
<br>
Summary:<br>
Add renderscript32 and renderscript64 ArchTypes. This is to configure<br>
the ABI requirement on 32-bit RenderScript that 'long' types have 64-bit<br>
size and alignment. 64-bit RenderScript is the same as AArch64, but is<br>
added here for completeness.<br>
<br>
Reviewers: echristo, rsmith<br>
<br>
Subscribers: aemerson, jfb, rampitec, dschuff, mehdi_amini, llvm-commits, srhines<br>
<br>
Differential Revision: <a href="http://reviews.llvm.org/D21333" rel="noreferrer" target="_blank">http://reviews.llvm.org/D21333</a><br>
<br>
Modified:<br>
llvm/trunk/include/llvm/ADT/Triple.h<br>
llvm/trunk/lib/Support/Triple.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/ADT/Triple.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=274412&r1=274411&r2=274412&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=274412&r1=274411&r2=274412&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/ADT/Triple.h (original)<br>
+++ llvm/trunk/include/llvm/ADT/Triple.h Fri Jul 1 19:23:09 2016<br>
@@ -46,50 +46,52 @@ public:<br>
enum ArchType {<br>
UnknownArch,<br>
<br>
- arm, // ARM (little endian): arm, armv.*, xscale<br>
- armeb, // ARM (big endian): armeb<br>
- aarch64, // AArch64 (little endian): aarch64<br>
- aarch64_be, // AArch64 (big endian): aarch64_be<br>
- avr, // AVR: Atmel AVR microcontroller<br>
- bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)<br>
- bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)<br>
- hexagon, // Hexagon: hexagon<br>
- mips, // MIPS: mips, mipsallegrex<br>
- mipsel, // MIPSEL: mipsel, mipsallegrexel<br>
- mips64, // MIPS64: mips64<br>
- mips64el, // MIPS64EL: mips64el<br>
- msp430, // MSP430: msp430<br>
- ppc, // PPC: powerpc<br>
- ppc64, // PPC64: powerpc64, ppu<br>
- ppc64le, // PPC64LE: powerpc64le<br>
- r600, // R600: AMD GPUs HD2XXX - HD6XXX<br>
- amdgcn, // AMDGCN: AMD GCN GPUs<br>
- sparc, // Sparc: sparc<br>
- sparcv9, // Sparcv9: Sparcv9<br>
- sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant<br>
- systemz, // SystemZ: s390x<br>
- tce, // TCE (<a href="http://tce.cs.tut.fi/" rel="noreferrer" target="_blank">http://tce.cs.tut.fi/</a>): tce<br>
- thumb, // Thumb (little endian): thumb, thumbv.*<br>
- thumbeb, // Thumb (big endian): thumbeb<br>
- x86, // X86: i[3-9]86<br>
- x86_64, // X86-64: amd64, x86_64<br>
- xcore, // XCore: xcore<br>
- nvptx, // NVPTX: 32-bit<br>
- nvptx64, // NVPTX: 64-bit<br>
- le32, // le32: generic little-endian 32-bit CPU (PNaCl)<br>
- le64, // le64: generic little-endian 64-bit CPU (PNaCl)<br>
- amdil, // AMDIL<br>
- amdil64, // AMDIL with 64-bit pointers<br>
- hsail, // AMD HSAIL<br>
- hsail64, // AMD HSAIL with 64-bit pointers<br>
- spir, // SPIR: standard portable IR for OpenCL 32-bit version<br>
- spir64, // SPIR: standard portable IR for OpenCL 64-bit version<br>
- kalimba, // Kalimba: generic kalimba<br>
- shave, // SHAVE: Movidius vector VLIW processors<br>
- lanai, // Lanai: Lanai 32-bit<br>
- wasm32, // WebAssembly with 32-bit pointers<br>
- wasm64, // WebAssembly with 64-bit pointers<br>
- LastArchType = wasm64<br>
+ arm, // ARM (little endian): arm, armv.*, xscale<br>
+ armeb, // ARM (big endian): armeb<br>
+ aarch64, // AArch64 (little endian): aarch64<br>
+ aarch64_be, // AArch64 (big endian): aarch64_be<br>
+ avr, // AVR: Atmel AVR microcontroller<br>
+ bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)<br>
+ bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)<br>
+ hexagon, // Hexagon: hexagon<br>
+ mips, // MIPS: mips, mipsallegrex<br>
+ mipsel, // MIPSEL: mipsel, mipsallegrexel<br>
+ mips64, // MIPS64: mips64<br>
+ mips64el, // MIPS64EL: mips64el<br>
+ msp430, // MSP430: msp430<br>
+ ppc, // PPC: powerpc<br>
+ ppc64, // PPC64: powerpc64, ppu<br>
+ ppc64le, // PPC64LE: powerpc64le<br>
+ r600, // R600: AMD GPUs HD2XXX - HD6XXX<br>
+ amdgcn, // AMDGCN: AMD GCN GPUs<br>
+ sparc, // Sparc: sparc<br>
+ sparcv9, // Sparcv9: Sparcv9<br>
+ sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant<br>
+ systemz, // SystemZ: s390x<br>
+ tce, // TCE (<a href="http://tce.cs.tut.fi/" rel="noreferrer" target="_blank">http://tce.cs.tut.fi/</a>): tce<br>
+ thumb, // Thumb (little endian): thumb, thumbv.*<br>
+ thumbeb, // Thumb (big endian): thumbeb<br>
+ x86, // X86: i[3-9]86<br>
+ x86_64, // X86-64: amd64, x86_64<br>
+ xcore, // XCore: xcore<br>
+ nvptx, // NVPTX: 32-bit<br>
+ nvptx64, // NVPTX: 64-bit<br>
+ le32, // le32: generic little-endian 32-bit CPU (PNaCl)<br>
+ le64, // le64: generic little-endian 64-bit CPU (PNaCl)<br>
+ amdil, // AMDIL<br>
+ amdil64, // AMDIL with 64-bit pointers<br>
+ hsail, // AMD HSAIL<br>
+ hsail64, // AMD HSAIL with 64-bit pointers<br>
+ spir, // SPIR: standard portable IR for OpenCL 32-bit version<br>
+ spir64, // SPIR: standard portable IR for OpenCL 64-bit version<br>
+ kalimba, // Kalimba: generic kalimba<br>
+ shave, // SHAVE: Movidius vector VLIW processors<br>
+ lanai, // Lanai: Lanai 32-bit<br>
+ wasm32, // WebAssembly with 32-bit pointers<br>
+ wasm64, // WebAssembly with 64-bit pointers<br>
+ renderscript32, // 32-bit RenderScript<br>
+ renderscript64, // 64-bit RenderScript<br>
+ LastArchType = renderscript64<br>
};<br>
enum SubArchType {<br>
NoSubArch,<br>
<br>
Modified: llvm/trunk/lib/Support/Triple.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=274412&r1=274411&r2=274412&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=274412&r1=274411&r2=274412&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Support/Triple.cpp (original)<br>
+++ llvm/trunk/lib/Support/Triple.cpp Fri Jul 1 19:23:09 2016<br>
@@ -19,51 +19,53 @@ using namespace llvm;<br>
<br>
const char *Triple::getArchTypeName(ArchType Kind) {<br>
switch (Kind) {<br>
- case UnknownArch: return "unknown";<br>
+ case UnknownArch: return "unknown";<br>
<br>
- case aarch64: return "aarch64";<br>
- case aarch64_be: return "aarch64_be";<br>
- case arm: return "arm";<br>
- case armeb: return "armeb";<br>
- case avr: return "avr";<br>
- case bpfel: return "bpfel";<br>
- case bpfeb: return "bpfeb";<br>
- case hexagon: return "hexagon";<br>
- case mips: return "mips";<br>
- case mipsel: return "mipsel";<br>
- case mips64: return "mips64";<br>
- case mips64el: return "mips64el";<br>
- case msp430: return "msp430";<br>
- case ppc64: return "powerpc64";<br>
- case ppc64le: return "powerpc64le";<br>
- case ppc: return "powerpc";<br>
- case r600: return "r600";<br>
- case amdgcn: return "amdgcn";<br>
- case sparc: return "sparc";<br>
- case sparcv9: return "sparcv9";<br>
- case sparcel: return "sparcel";<br>
- case systemz: return "s390x";<br>
- case tce: return "tce";<br>
- case thumb: return "thumb";<br>
- case thumbeb: return "thumbeb";<br>
- case x86: return "i386";<br>
- case x86_64: return "x86_64";<br>
- case xcore: return "xcore";<br>
- case nvptx: return "nvptx";<br>
- case nvptx64: return "nvptx64";<br>
- case le32: return "le32";<br>
- case le64: return "le64";<br>
- case amdil: return "amdil";<br>
- case amdil64: return "amdil64";<br>
- case hsail: return "hsail";<br>
- case hsail64: return "hsail64";<br>
- case spir: return "spir";<br>
- case spir64: return "spir64";<br>
- case kalimba: return "kalimba";<br>
- case lanai: return "lanai";<br>
- case shave: return "shave";<br>
- case wasm32: return "wasm32";<br>
- case wasm64: return "wasm64";<br>
+ case aarch64: return "aarch64";<br>
+ case aarch64_be: return "aarch64_be";<br>
+ case arm: return "arm";<br>
+ case armeb: return "armeb";<br>
+ case avr: return "avr";<br>
+ case bpfel: return "bpfel";<br>
+ case bpfeb: return "bpfeb";<br>
+ case hexagon: return "hexagon";<br>
+ case mips: return "mips";<br>
+ case mipsel: return "mipsel";<br>
+ case mips64: return "mips64";<br>
+ case mips64el: return "mips64el";<br>
+ case msp430: return "msp430";<br>
+ case ppc64: return "powerpc64";<br>
+ case ppc64le: return "powerpc64le";<br>
+ case ppc: return "powerpc";<br>
+ case r600: return "r600";<br>
+ case amdgcn: return "amdgcn";<br>
+ case sparc: return "sparc";<br>
+ case sparcv9: return "sparcv9";<br>
+ case sparcel: return "sparcel";<br>
+ case systemz: return "s390x";<br>
+ case tce: return "tce";<br>
+ case thumb: return "thumb";<br>
+ case thumbeb: return "thumbeb";<br>
+ case x86: return "i386";<br>
+ case x86_64: return "x86_64";<br>
+ case xcore: return "xcore";<br>
+ case nvptx: return "nvptx";<br>
+ case nvptx64: return "nvptx64";<br>
+ case le32: return "le32";<br>
+ case le64: return "le64";<br>
+ case amdil: return "amdil";<br>
+ case amdil64: return "amdil64";<br>
+ case hsail: return "hsail";<br>
+ case hsail64: return "hsail64";<br>
+ case spir: return "spir";<br>
+ case spir64: return "spir64";<br>
+ case kalimba: return "kalimba";<br>
+ case lanai: return "lanai";<br>
+ case shave: return "shave";<br>
+ case wasm32: return "wasm32";<br>
+ case wasm64: return "wasm64";<br>
+ case renderscript32: return "renderscript32";<br>
+ case renderscript64: return "renderscript64";<br>
}<br>
<br>
llvm_unreachable("Invalid ArchType!");<br>
@@ -280,6 +282,8 @@ Triple::ArchType Triple::getArchTypeForL<br>
.Case("shave", shave)<br>
.Case("wasm32", wasm32)<br>
.Case("wasm64", wasm64)<br>
+ .Case("renderscript32", renderscript32)<br>
+ .Case("renderscript64", renderscript64)<br>
.Default(UnknownArch);<br>
}<br>
<br>
@@ -389,6 +393,8 @@ static Triple::ArchType parseArch(String<br>
.Case("shave", Triple::shave)<br>
.Case("wasm32", Triple::wasm32)<br>
.Case("wasm64", Triple::wasm64)<br>
+ .Case("renderscript32", Triple::renderscript32)<br>
+ .Case("renderscript64", Triple::renderscript64)<br>
.Default(Triple::UnknownArch);<br>
<br>
// Some architectures require special parsing logic just to compute the<br>
@@ -594,6 +600,8 @@ static Triple::ObjectFormatType getDefau<br>
case Triple::nvptx64:<br>
case Triple::ppc64le:<br>
case Triple::r600:<br>
+ case Triple::renderscript32:<br>
+ case Triple::renderscript64:<br>
case Triple::shave:<br>
case Triple::sparc:<br>
case Triple::sparcel:<br>
@@ -1135,6 +1143,7 @@ static unsigned getArchPointerBitWidth(l<br>
case llvm::Triple::lanai:<br>
case llvm::Triple::shave:<br>
case llvm::Triple::wasm32:<br>
+ case llvm::Triple::renderscript32:<br>
return 32;<br>
<br>
case llvm::Triple::aarch64:<br>
@@ -1155,6 +1164,7 @@ static unsigned getArchPointerBitWidth(l<br>
case llvm::Triple::hsail64:<br>
case llvm::Triple::spir64:<br>
case llvm::Triple::wasm64:<br>
+ case llvm::Triple::renderscript64:<br>
return 64;<br>
}<br>
llvm_unreachable("Invalid architecture value");<br>
@@ -1209,22 +1219,24 @@ Triple Triple::get32BitArchVariant() con<br>
case Triple::lanai:<br>
case Triple::shave:<br>
case Triple::wasm32:<br>
+ case Triple::renderscript32:<br>
// Already 32-bit.<br>
break;<br>
<br>
- case Triple::aarch64: T.setArch(Triple::arm); break;<br>
- case Triple::aarch64_be: T.setArch(Triple::armeb); break;<br>
- case Triple::le64: T.setArch(Triple::le32); break;<br>
- case Triple::mips64: T.setArch(Triple::mips); break;<br>
- case Triple::mips64el: T.setArch(Triple::mipsel); break;<br>
- case Triple::nvptx64: T.setArch(Triple::nvptx); break;<br>
- case Triple::ppc64: T.setArch(Triple::ppc); break;<br>
- case Triple::sparcv9: T.setArch(Triple::sparc); break;<br>
- case Triple::x86_64: T.setArch(Triple::x86); break;<br>
- case Triple::amdil64: T.setArch(Triple::amdil); break;<br>
- case Triple::hsail64: T.setArch(Triple::hsail); break;<br>
- case Triple::spir64: T.setArch(Triple::spir); break;<br>
- case Triple::wasm64: T.setArch(Triple::wasm32); break;<br>
+ case Triple::aarch64: T.setArch(Triple::arm); break;<br>
+ case Triple::aarch64_be: T.setArch(Triple::armeb); break;<br>
+ case Triple::le64: T.setArch(Triple::le32); break;<br>
+ case Triple::mips64: T.setArch(Triple::mips); break;<br>
+ case Triple::mips64el: T.setArch(Triple::mipsel); break;<br>
+ case Triple::nvptx64: T.setArch(Triple::nvptx); break;<br>
+ case Triple::ppc64: T.setArch(Triple::ppc); break;<br>
+ case Triple::sparcv9: T.setArch(Triple::sparc); break;<br>
+ case Triple::x86_64: T.setArch(Triple::x86); break;<br>
+ case Triple::amdil64: T.setArch(Triple::amdil); break;<br>
+ case Triple::hsail64: T.setArch(Triple::hsail); break;<br>
+ case Triple::spir64: T.setArch(Triple::spir); break;<br>
+ case Triple::wasm64: T.setArch(Triple::wasm32); break;<br>
+ case Triple::renderscript64: T.setArch(Triple::renderscript32); break;<br>
}<br>
return T;<br>
}<br>
@@ -1264,24 +1276,26 @@ Triple Triple::get64BitArchVariant() con<br>
case Triple::systemz:<br>
case Triple::x86_64:<br>
case Triple::wasm64:<br>
+ case Triple::renderscript64:<br>
// Already 64-bit.<br>
break;<br>
<br>
- case Triple::arm: T.setArch(Triple::aarch64); break;<br>
- case Triple::armeb: T.setArch(Triple::aarch64_be); break;<br>
- case Triple::le32: T.setArch(Triple::le64); break;<br>
- case Triple::mips: T.setArch(Triple::mips64); break;<br>
- case Triple::mipsel: T.setArch(Triple::mips64el); break;<br>
- case Triple::nvptx: T.setArch(Triple::nvptx64); break;<br>
- case Triple::ppc: T.setArch(Triple::ppc64); break;<br>
- case Triple::sparc: T.setArch(Triple::sparcv9); break;<br>
- case Triple::x86: T.setArch(Triple::x86_64); break;<br>
- case Triple::amdil: T.setArch(Triple::amdil64); break;<br>
- case Triple::hsail: T.setArch(Triple::hsail64); break;<br>
- case Triple::spir: T.setArch(Triple::spir64); break;<br>
- case Triple::thumb: T.setArch(Triple::aarch64); break;<br>
- case Triple::thumbeb: T.setArch(Triple::aarch64_be); break;<br>
- case Triple::wasm32: T.setArch(Triple::wasm64); break;<br>
+ case Triple::arm: T.setArch(Triple::aarch64); break;<br>
+ case Triple::armeb: T.setArch(Triple::aarch64_be); break;<br>
+ case Triple::le32: T.setArch(Triple::le64); break;<br>
+ case Triple::mips: T.setArch(Triple::mips64); break;<br>
+ case Triple::mipsel: T.setArch(Triple::mips64el); break;<br>
+ case Triple::nvptx: T.setArch(Triple::nvptx64); break;<br>
+ case Triple::ppc: T.setArch(Triple::ppc64); break;<br>
+ case Triple::sparc: T.setArch(Triple::sparcv9); break;<br>
+ case Triple::x86: T.setArch(Triple::x86_64); break;<br>
+ case Triple::amdil: T.setArch(Triple::amdil64); break;<br>
+ case Triple::hsail: T.setArch(Triple::hsail64); break;<br>
+ case Triple::spir: T.setArch(Triple::spir64); break;<br>
+ case Triple::thumb: T.setArch(Triple::aarch64); break;<br>
+ case Triple::thumbeb: T.setArch(Triple::aarch64_be); break;<br>
+ case Triple::wasm32: T.setArch(Triple::wasm64); break;<br>
+ case Triple::renderscript32: T.setArch(Triple::renderscript64); break;<br>
}<br>
return T;<br>
}<br>
@@ -1315,6 +1329,8 @@ Triple Triple::getBigEndianArchVariant()<br>
case Triple::x86:<br>
case Triple::x86_64:<br>
case Triple::xcore:<br>
+ case Triple::renderscript32:<br>
+ case Triple::renderscript64:<br>
<br>
// ARM is intentionally unsupported here, changing the architecture would<br>
// drop any arch suffixes.<br>
@@ -1399,6 +1415,8 @@ bool Triple::isLittleEndian() const {<br>
case Triple::x86:<br>
case Triple::x86_64:<br>
case Triple::xcore:<br>
+ case Triple::renderscript32:<br>
+ case Triple::renderscript64:<br>
return true;<br>
default:<br>
return false;<br>
<br>
<br>
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</blockquote></div><br></div>