<div dir="ltr"><div style="font-size:12.8px">Hi Haicheng,</div><span class="gmail-im" style="font-size:12.8px"><div><br></div></span><div style="font-size:12.8px">I've seen the work you've been doing on tail-merging, and I'm not sure you're taking the right approach here.</div><span class="gmail-im" style="font-size:12.8px"><div><br></div></span><div style="font-size:12.8px">As far as I can tell, your current approach is to do layout, then tail-merge, and if there were changes, re-do layout.</div><span class="gmail-im" style="font-size:12.8px"><div> </div><div><span style="font-size:12.8px">This is problematic for a few reasons:</span></div><div><span style="font-size:12.8px">1) If tail-merging made changes, the analysis that layout relies is now invalidated. The Dominator tree will give spurious results.</span></div><div><span style="font-size:12.8px">2) It's expensive. Re-doing layout for an entire function because one new block was created isn't the best approach. It would be better to find these blocks as they are laid out so that the ongoing layout can use the updated CFG</span></div><div><span style="font-size:12.8px">3) It undoes tail-duplication during layout (see D18226).</span></div><div><span style="font-size:12.8px"> The tail-dup-layout.ll test shows this best. After rebasing to your patch, I re-ran the tests, and this one was no longer passing. After I figured out why it was failing (Block missing from MDT), I was able to get it to pass again and generate the correct layout, but what's happening makes me think that we may not be taking the best approach. Tail-duplication occurs during layout, is completely removed by tail-merging, and then is re-applied during the second attempt at layout. We definitely need to arrange the thresholds and behaviors so that tail-duplication is not undone by tail merging, and doing it in place would give more scope for that.</span></div><div><span style="font-size:12.8px"> Another example that is troubling is test/X86/block-placement.ll, specifically test_loop_rotate, in this test, tail duplication copies the loop condition into the entry, and then tail merging removes it. This results in a different order for the loop from what was created in an earlier pass, and so the test, correctly, fails.</span></div><div><span style="font-size:12.8px"><br></span></div><div>I think the simplest alternative that would allow you to keep your simple approach would be to make tail-merging strictly honor the instruction-count threshold during layout. That would prevent undoing the work that tail-duplication does, and be a good first step.</div><div><br></div><div>Thanks,</div><div>Kyle.</div><div><span style="font-size:12.8px"><br></span></div></span></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Jun 9, 2016 at 8:24 AM, Haicheng Wu via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: haicheng<br>
Date: Thu Jun 9 10:24:29 2016<br>
New Revision: 272267<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=272267&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=272267&view=rev</a><br>
Log:<br>
Reapply "[MBP] Reduce code size by running tail merging in MBP.""<br>
<br>
This reapplies commit r271930, r271915, r271923. They hit a bug in<br>
Thumb which is fixed in r272258 now.<br>
<br>
The original message:<br>
<br>
The code layout that TailMerging (inside BranchFolding) works on is not the<br>
final layout optimized based on the branch probability. Generally, after<br>
BlockPlacement, many new merging opportunities emerge.<br>
<br>
This patch calls Tail Merging after MBP and calls MBP again if Tail Merging<br>
merges anything.<br>
<br>
Added:<br>
llvm/trunk/test/CodeGen/AArch64/tailmerging_in_mbp.ll<br>
Modified:<br>
llvm/trunk/lib/CodeGen/BranchFolding.cpp<br>
llvm/trunk/lib/CodeGen/BranchFolding.h<br>
llvm/trunk/lib/CodeGen/IfConversion.cpp<br>
llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp<br>
llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll<br>
<br>
Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=272267&r1=272266&r2=272267&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=272267&r1=272266&r2=272267&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Thu Jun 9 10:24:29 2016<br>
@@ -27,6 +27,7 @@<br>
#include "llvm/CodeGen/MachineFunctionPass.h"<br>
#include "llvm/CodeGen/MachineJumpTableInfo.h"<br>
#include "llvm/CodeGen/MachineMemOperand.h"<br>
+#include "llvm/CodeGen/MachineLoopInfo.h"<br>
#include "llvm/CodeGen/MachineModuleInfo.h"<br>
#include "llvm/CodeGen/MachineRegisterInfo.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
@@ -99,8 +100,9 @@ bool BranchFolderPass::runOnMachineFunct<br>
// HW that requires structurized CFG.<br>
bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&<br>
PassConfig->getEnableTailMerge();<br>
- BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true,<br>
- getAnalysis<MachineBlockFrequencyInfo>(),<br>
+ BranchFolder::MBFIWrapper MBBFreqInfo(<br>
+ getAnalysis<MachineBlockFrequencyInfo>());<br>
+ BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,<br>
getAnalysis<MachineBranchProbabilityInfo>());<br>
return Folder.OptimizeFunction(MF, MF.getSubtarget().getInstrInfo(),<br>
MF.getSubtarget().getRegisterInfo(),<br>
@@ -108,7 +110,7 @@ bool BranchFolderPass::runOnMachineFunct<br>
}<br>
<br>
BranchFolder::BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,<br>
- const MachineBlockFrequencyInfo &FreqInfo,<br>
+ MBFIWrapper &FreqInfo,<br>
const MachineBranchProbabilityInfo &ProbInfo)<br>
: EnableHoistCommonCode(CommonHoist), MBBFreqInfo(FreqInfo),<br>
MBPI(ProbInfo) {<br>
@@ -136,6 +138,8 @@ void BranchFolder::RemoveDeadBlock(Machi<br>
// Remove the block.<br>
MF->erase(MBB);<br>
FuncletMembership.erase(MBB);<br>
+ if (MLI)<br>
+ MLI->removeBlock(MBB);<br>
}<br>
<br>
/// OptimizeImpDefsBlock - If a basic block is just a bunch of implicit_def<br>
@@ -192,18 +196,22 @@ bool BranchFolder::OptimizeImpDefsBlock(<br>
}<br>
<br>
/// OptimizeFunction - Perhaps branch folding, tail merging and other<br>
-/// CFG optimizations on the given function.<br>
+/// CFG optimizations on the given function. Block placement changes the layout<br>
+/// and may create new tail merging opportunities.<br>
bool BranchFolder::OptimizeFunction(MachineFunction &MF,<br>
const TargetInstrInfo *tii,<br>
const TargetRegisterInfo *tri,<br>
- MachineModuleInfo *mmi) {<br>
+ MachineModuleInfo *mmi,<br>
+ MachineLoopInfo *mli, bool AfterPlacement) {<br>
if (!tii) return false;<br>
<br>
TriedMerging.clear();<br>
<br>
+ AfterBlockPlacement = AfterPlacement;<br>
TII = tii;<br>
TRI = tri;<br>
MMI = mmi;<br>
+ MLI = mli;<br>
RS = nullptr;<br>
<br>
// Use a RegScavenger to help update liveness when required.<br>
@@ -229,7 +237,10 @@ bool BranchFolder::OptimizeFunction(Mach<br>
bool MadeChangeThisIteration = true;<br>
while (MadeChangeThisIteration) {<br>
MadeChangeThisIteration = TailMergeBlocks(MF);<br>
- MadeChangeThisIteration |= OptimizeBranches(MF);<br>
+ // No need to clean up if tail merging does not change anything after the<br>
+ // block placement.<br>
+ if (!AfterBlockPlacement || MadeChangeThisIteration)<br>
+ MadeChangeThisIteration |= OptimizeBranches(MF);<br>
if (EnableHoistCommonCode)<br>
MadeChangeThisIteration |= HoistCommonCode(MF);<br>
MadeChange |= MadeChangeThisIteration;<br>
@@ -446,6 +457,11 @@ MachineBasicBlock *BranchFolder::SplitMB<br>
// Splice the code over.<br>
NewMBB->splice(NewMBB->end(), &CurMBB, BBI1, CurMBB.end());<br>
<br>
+ // NewMBB belongs to the same loop as CurMBB.<br>
+ if (MLI)<br>
+ if (MachineLoop *ML = MLI->getLoopFor(&CurMBB))<br>
+ ML->addBasicBlockToLoop(NewMBB, MLI->getBase());<br>
+<br>
// NewMBB inherits CurMBB's block frequency.<br>
MBBFreqInfo.setBlockFreq(NewMBB, MBBFreqInfo.getBlockFreq(&CurMBB));<br>
<br>
@@ -540,6 +556,18 @@ void BranchFolder::MBFIWrapper::setBlock<br>
MergedBBFreq[MBB] = F;<br>
}<br>
<br>
+raw_ostream &<br>
+BranchFolder::MBFIWrapper::printBlockFreq(raw_ostream &OS,<br>
+ const MachineBasicBlock *MBB) const {<br>
+ return MBFI.printBlockFreq(OS, getBlockFreq(MBB));<br>
+}<br>
+<br>
+raw_ostream &<br>
+BranchFolder::MBFIWrapper::printBlockFreq(raw_ostream &OS,<br>
+ const BlockFrequency Freq) const {<br>
+ return MBFI.printBlockFreq(OS, Freq);<br>
+}<br>
+<br>
/// CountTerminators - Count the number of terminators in the given<br>
/// block and set I to the position of the first non-terminator, if there<br>
/// is one, or MBB->end() otherwise.<br>
@@ -921,23 +949,27 @@ bool BranchFolder::TailMergeBlocks(Machi<br>
if (!EnableTailMerge) return MadeChange;<br>
<br>
// First find blocks with no successors.<br>
- MergePotentials.clear();<br>
- for (MachineBasicBlock &MBB : MF) {<br>
+ // Block placement does not create new tail merging opportunities for these<br>
+ // blocks.<br>
+ if (!AfterBlockPlacement) {<br>
+ MergePotentials.clear();<br>
+ for (MachineBasicBlock &MBB : MF) {<br>
+ if (MergePotentials.size() == TailMergeThreshold)<br>
+ break;<br>
+ if (!TriedMerging.count(&MBB) && MBB.succ_empty())<br>
+ MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(MBB), &MBB));<br>
+ }<br>
+<br>
+ // If this is a large problem, avoid visiting the same basic blocks<br>
+ // multiple times.<br>
if (MergePotentials.size() == TailMergeThreshold)<br>
- break;<br>
- if (!TriedMerging.count(&MBB) && MBB.succ_empty())<br>
- MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(MBB), &MBB));<br>
- }<br>
+ for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)<br>
+ TriedMerging.insert(MergePotentials[i].getBlock());<br>
<br>
- // If this is a large problem, avoid visiting the same basic blocks<br>
- // multiple times.<br>
- if (MergePotentials.size() == TailMergeThreshold)<br>
- for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)<br>
- TriedMerging.insert(MergePotentials[i].getBlock());<br>
-<br>
- // See if we can do any tail merging on those.<br>
- if (MergePotentials.size() >= 2)<br>
- MadeChange |= TryTailMergeBlocks(nullptr, nullptr);<br>
+ // See if we can do any tail merging on those.<br>
+ if (MergePotentials.size() >= 2)<br>
+ MadeChange |= TryTailMergeBlocks(nullptr, nullptr);<br>
+ }<br>
<br>
// Look at blocks (IBB) with multiple predecessors (PBB).<br>
// We change each predecessor to a canonical form, by<br>
@@ -984,6 +1016,17 @@ bool BranchFolder::TailMergeBlocks(Machi<br>
if (PBB->hasEHPadSuccessor())<br>
continue;<br>
<br>
+ // Bail out if the loop header (IBB) is not the top of the loop chain<br>
+ // after the block placement. Otherwise, the common tail of IBB's<br>
+ // predecessors may become the loop top if block placement is called again<br>
+ // and the predecessors may branch to this common tail.<br>
+ // FIXME: Relaxed this check if the algorithm of finding loop top is<br>
+ // changed in MBP.<br>
+ if (AfterBlockPlacement && MLI)<br>
+ if (MachineLoop *ML = MLI->getLoopFor(IBB))<br>
+ if (IBB == ML->getHeader() && ML == MLI->getLoopFor(PBB))<br>
+ continue;<br>
+<br>
MachineBasicBlock *TBB = nullptr, *FBB = nullptr;<br>
SmallVector<MachineOperand, 4> Cond;<br>
if (!TII->AnalyzeBranch(*PBB, TBB, FBB, Cond, true)) {<br>
<br>
Modified: llvm/trunk/lib/CodeGen/BranchFolding.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.h?rev=272267&r1=272266&r2=272267&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.h?rev=272267&r1=272266&r2=272267&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/BranchFolding.h (original)<br>
+++ llvm/trunk/lib/CodeGen/BranchFolding.h Thu Jun 9 10:24:29 2016<br>
@@ -20,20 +20,24 @@ namespace llvm {<br>
class MachineBranchProbabilityInfo;<br>
class MachineFunction;<br>
class MachineModuleInfo;<br>
+ class MachineLoopInfo;<br>
class RegScavenger;<br>
class TargetInstrInfo;<br>
class TargetRegisterInfo;<br>
<br>
class LLVM_LIBRARY_VISIBILITY BranchFolder {<br>
public:<br>
+ class MBFIWrapper;<br>
+<br>
explicit BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,<br>
- const MachineBlockFrequencyInfo &MBFI,<br>
+ MBFIWrapper &MBFI,<br>
const MachineBranchProbabilityInfo &MBPI);<br>
<br>
- bool OptimizeFunction(MachineFunction &MF,<br>
- const TargetInstrInfo *tii,<br>
- const TargetRegisterInfo *tri,<br>
- MachineModuleInfo *mmi);<br>
+ bool OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii,<br>
+ const TargetRegisterInfo *tri, MachineModuleInfo *mmi,<br>
+ MachineLoopInfo *mli = nullptr,<br>
+ bool AfterPlacement = false);<br>
+<br>
private:<br>
class MergePotentialsElt {<br>
unsigned Hash;<br>
@@ -91,13 +95,16 @@ namespace llvm {<br>
};<br>
std::vector<SameTailElt> SameTails;<br>
<br>
+ bool AfterBlockPlacement;<br>
bool EnableTailMerge;<br>
bool EnableHoistCommonCode;<br>
const TargetInstrInfo *TII;<br>
const TargetRegisterInfo *TRI;<br>
MachineModuleInfo *MMI;<br>
+ MachineLoopInfo *MLI;<br>
RegScavenger *RS;<br>
<br>
+ public:<br>
/// \brief This class keeps track of branch frequencies of newly created<br>
/// blocks and tail-merged blocks.<br>
class MBFIWrapper {<br>
@@ -105,13 +112,18 @@ namespace llvm {<br>
MBFIWrapper(const MachineBlockFrequencyInfo &I) : MBFI(I) {}<br>
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const;<br>
void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F);<br>
+ raw_ostream &printBlockFreq(raw_ostream &OS,<br>
+ const MachineBasicBlock *MBB) const;<br>
+ raw_ostream &printBlockFreq(raw_ostream &OS,<br>
+ const BlockFrequency Freq) const;<br>
<br>
private:<br>
const MachineBlockFrequencyInfo &MBFI;<br>
DenseMap<const MachineBasicBlock *, BlockFrequency> MergedBBFreq;<br>
};<br>
<br>
- MBFIWrapper MBBFreqInfo;<br>
+ private:<br>
+ MBFIWrapper &MBBFreqInfo;<br>
const MachineBranchProbabilityInfo &MBPI;<br>
<br>
bool TailMergeBlocks(MachineFunction &MF);<br>
<br>
Modified: llvm/trunk/lib/CodeGen/IfConversion.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=272267&r1=272266&r2=272267&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/IfConversion.cpp?rev=272267&r1=272266&r2=272267&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/IfConversion.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/IfConversion.cpp Thu Jun 9 10:24:29 2016<br>
@@ -163,7 +163,6 @@ namespace {<br>
const TargetLoweringBase *TLI;<br>
const TargetInstrInfo *TII;<br>
const TargetRegisterInfo *TRI;<br>
- const MachineBlockFrequencyInfo *MBFI;<br>
const MachineBranchProbabilityInfo *MBPI;<br>
MachineRegisterInfo *MRI;<br>
<br>
@@ -291,7 +290,7 @@ bool IfConverter::runOnMachineFunction(M<br>
TLI = ST.getTargetLowering();<br>
TII = ST.getInstrInfo();<br>
TRI = ST.getRegisterInfo();<br>
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();<br>
+ BranchFolder::MBFIWrapper MBFI(getAnalysis<MachineBlockFrequencyInfo>());<br>
MBPI = &getAnalysis<MachineBranchProbabilityInfo>();<br>
MRI = &MF.getRegInfo();<br>
SchedModel.init(ST.getSchedModel(), &ST, TII);<br>
@@ -303,7 +302,7 @@ bool IfConverter::runOnMachineFunction(M<br>
bool BFChange = false;<br>
if (!PreRegAlloc) {<br>
// Tail merge tend to expose more if-conversion opportunities.<br>
- BranchFolder BF(true, false, *MBFI, *MBPI);<br>
+ BranchFolder BF(true, false, MBFI, *MBPI);<br>
BFChange = BF.OptimizeFunction(MF, TII, ST.getRegisterInfo(),<br>
getAnalysisIfAvailable<MachineModuleInfo>());<br>
}<br>
@@ -427,7 +426,7 @@ bool IfConverter::runOnMachineFunction(M<br>
BBAnalysis.clear();<br>
<br>
if (MadeChange && IfCvtBranchFold) {<br>
- BranchFolder BF(false, false, *MBFI, *MBPI);<br>
+ BranchFolder BF(false, false, MBFI, *MBPI);<br>
BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),<br>
getAnalysisIfAvailable<MachineModuleInfo>());<br>
}<br>
<br>
Modified: llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp?rev=272267&r1=272266&r2=272267&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp?rev=272267&r1=272266&r2=272267&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp Thu Jun 9 10:24:29 2016<br>
@@ -26,6 +26,8 @@<br>
//===----------------------------------------------------------------------===//<br>
<br>
#include "llvm/CodeGen/Passes.h"<br>
+#include "llvm/CodeGen/TargetPassConfig.h"<br>
+#include "BranchFolding.h"<br>
#include "llvm/ADT/DenseMap.h"<br>
#include "llvm/ADT/SmallPtrSet.h"<br>
#include "llvm/ADT/SmallVector.h"<br>
@@ -116,6 +118,12 @@ static cl::opt<unsigned> JumpInstCost("j<br>
cl::desc("Cost of jump instructions."),<br>
cl::init(1), cl::Hidden);<br>
<br>
+static cl::opt<bool><br>
+BranchFoldPlacement("branch-fold-placement",<br>
+ cl::desc("Perform branch folding during placement. "<br>
+ "Reduces code size."),<br>
+ cl::init(true), cl::Hidden);<br>
+<br>
extern cl::opt<unsigned> StaticLikelyProb;<br>
<br>
namespace {<br>
@@ -232,10 +240,10 @@ class MachineBlockPlacement : public Mac<br>
const MachineBranchProbabilityInfo *MBPI;<br>
<br>
/// \brief A handle to the function-wide block frequency pass.<br>
- const MachineBlockFrequencyInfo *MBFI;<br>
+ std::unique_ptr<BranchFolder::MBFIWrapper> MBFI;<br>
<br>
/// \brief A handle to the loop info.<br>
- const MachineLoopInfo *MLI;<br>
+ MachineLoopInfo *MLI;<br>
<br>
/// \brief A handle to the target's instruction info.<br>
const TargetInstrInfo *TII;<br>
@@ -323,6 +331,7 @@ public:<br>
AU.addRequired<MachineBlockFrequencyInfo>();<br>
AU.addRequired<MachineDominatorTree>();<br>
AU.addRequired<MachineLoopInfo>();<br>
+ AU.addRequired<TargetPassConfig>();<br>
MachineFunctionPass::getAnalysisUsage(AU);<br>
}<br>
};<br>
@@ -1469,7 +1478,8 @@ bool MachineBlockPlacement::runOnMachine<br>
return false;<br>
<br>
MBPI = &getAnalysis<MachineBranchProbabilityInfo>();<br>
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();<br>
+ MBFI = llvm::make_unique<BranchFolder::MBFIWrapper>(<br>
+ getAnalysis<MachineBlockFrequencyInfo>());<br>
MLI = &getAnalysis<MachineLoopInfo>();<br>
TII = F.getSubtarget().getInstrInfo();<br>
TLI = F.getSubtarget().getTargetLowering();<br>
@@ -1477,6 +1487,29 @@ bool MachineBlockPlacement::runOnMachine<br>
assert(BlockToChain.empty());<br>
<br>
buildCFGChains(F);<br>
+<br>
+ // Changing the layout can create new tail merging opportunities.<br>
+ TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();<br>
+ // TailMerge can create jump into if branches that make CFG irreducible for<br>
+ // HW that requires structurized CFG.<br>
+ bool EnableTailMerge = !F.getTarget().requiresStructuredCFG() &&<br>
+ PassConfig->getEnableTailMerge() &&<br>
+ BranchFoldPlacement;<br>
+ // No tail merging opportunities if the block number is less than four.<br>
+ if (F.size() > 3 && EnableTailMerge) {<br>
+ BranchFolder BF(/*EnableTailMerge=*/true, /*CommonHoist=*/false, *MBFI,<br>
+ *MBPI);<br>
+<br>
+ if (BF.OptimizeFunction(F, TII, F.getSubtarget().getRegisterInfo(),<br>
+ getAnalysisIfAvailable<MachineModuleInfo>(), MLI,<br>
+ /*AfterBlockPlacement=*/true)) {<br>
+ // Redo the layout if tail merging creates/removes/moves blocks.<br>
+ BlockToChain.clear();<br>
+ ChainAllocator.DestroyAll();<br>
+ buildCFGChains(F);<br>
+ }<br>
+ }<br>
+<br>
optimizeBranches(F);<br>
alignBlocks(F);<br>
<br>
<br>
Added: llvm/trunk/test/CodeGen/AArch64/tailmerging_in_mbp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/tailmerging_in_mbp.ll?rev=272267&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/tailmerging_in_mbp.ll?rev=272267&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/AArch64/tailmerging_in_mbp.ll (added)<br>
+++ llvm/trunk/test/CodeGen/AArch64/tailmerging_in_mbp.ll Thu Jun 9 10:24:29 2016<br>
@@ -0,0 +1,63 @@<br>
+; RUN: llc <%s -march=aarch64 | FileCheck %s<br>
+<br>
+; CHECK-LABEL: test:<br>
+; CHECK: LBB0_7:<br>
+; CHECK: b.hi<br>
+; CHECK-NEXT: b<br>
+; CHECK-NEXT: LBB0_8:<br>
+; CHECK-NEXT: mov x8, x9<br>
+; CHECK-NEXT: LBB0_9:<br>
+define i64 @test(i64 %n, i64* %a, i64* %b, i64* %c, i64* %d, i64* %e, i64* %f) {<br>
+entry:<br>
+ %cmp28 = icmp sgt i64 %n, 1<br>
+ br i1 %cmp28, label %for.body, label %for.end<br>
+<br>
+for.body: ; preds = %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a>, %if.end<br>
+ %j = phi i64 [ %n, %entry ], [ %div, %if.end ]<br>
+ %div = lshr i64 %j, 1<br>
+ %a.arrayidx = getelementptr inbounds i64, i64* %a, i64 %div<br>
+ %a.j = load i64, i64* %a.arrayidx<br>
+ %b.arrayidx = getelementptr inbounds i64, i64* %b, i64 %div<br>
+ %b.j = load i64, i64* %b.arrayidx<br>
+ %cmp.i = icmp slt i64 %a.j, %b.j<br>
+ br i1 %cmp.i, label %for.end.loopexit, label %cond.false.i<br>
+<br>
+cond.false.i: ; preds = %for.body<br>
+ %cmp4.i = icmp sgt i64 %a.j, %b.j<br>
+ br i1 %cmp4.i, label %if.end, label %cond.false6.i<br>
+<br>
+cond.false6.i: ; preds = %cond.false.i<br>
+ %c.arrayidx = getelementptr inbounds i64, i64* %c, i64 %div<br>
+ %c.j = load i64, i64* %c.arrayidx<br>
+ %d.arrayidx = getelementptr inbounds i64, i64* %d, i64 %div<br>
+ %d.j = load i64, i64* %d.arrayidx<br>
+ %cmp9.i = icmp slt i64 %c.j, %d.j<br>
+ br i1 %cmp9.i, label %for.end.loopexit, label %cond.false11.i<br>
+<br>
+cond.false11.i: ; preds = %cond.false6.i<br>
+ %cmp14.i = icmp sgt i64 %c.j, %d.j<br>
+ br i1 %cmp14.i, label %if.end, label %cond.false12.i<br>
+<br>
+cond.false12.i: ; preds = %cond.false11.i<br>
+ %e.arrayidx = getelementptr inbounds i64, i64* %e, i64 %div<br>
+ %e.j = load i64, i64* %e.arrayidx<br>
+ %f.arrayidx = getelementptr inbounds i64, i64* %f, i64 %div<br>
+ %f.j = load i64, i64* %f.arrayidx<br>
+ %cmp19.i = icmp sgt i64 %e.j, %f.j<br>
+ br i1 %cmp19.i, label %if.end, label %for.end.loopexit<br>
+<br>
+if.end: ; preds = %cond.false12.i, %cond.false11.i, %cond.false.i<br>
+ %cmp = icmp ugt i64 %j, 3<br>
+ br i1 %cmp, label %for.body, label %for.end.loopexit<br>
+<br>
+for.end.loopexit: ; preds = %cond.false12.i, %cond.false6.i, %for.body, %if.end<br>
+ %<a href="http://j.0.lcssa.ph" rel="noreferrer" target="_blank">j.0.lcssa.ph</a> = phi i64 [ %j, %cond.false12.i ], [ %j, %cond.false6.i ], [ %j, %for.body ], [ %div, %if.end ]<br>
+ br label %for.end<br>
+<br>
+for.end: ; preds = %for.end.loopexit, %entry<br>
+ %j.0.lcssa = phi i64 [ %n, %entry ], [ %<a href="http://j.0.lcssa.ph" rel="noreferrer" target="_blank">j.0.lcssa.ph</a>, %for.end.loopexit ]<br>
+ %j.2 = add i64 %j.0.lcssa, %n<br>
+ %j.3 = mul i64 %j.2, %n<br>
+ %j.4 = add i64 %j.3, 10<br>
+ ret i64 %j.4<br>
+}<br>
<br>
Modified: llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll?rev=272267&r1=272266&r2=272267&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll?rev=272267&r1=272266&r2=272267&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll (original)<br>
+++ llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll Thu Jun 9 10:24:29 2016<br>
@@ -49,7 +49,7 @@ tailrecurse.switch:<br>
; V8-NEXT: beq<br>
; V8-NEXT: %tailrecurse.switch<br>
; V8: cmp<br>
-; V8-NEXT: bne<br>
+; V8-NEXT: beq<br>
; V8-NEXT: b<br>
; The trailing space in the last line checks that the branch is unconditional<br>
switch i32 %and, label %sw.epilog [<br>
<br>
<br>
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</blockquote></div><br></div>