<div dir="ltr">Hey, thanks for getting to this so quick :)<div><br></div><div>-eric<br><br><div class="gmail_quote"><div dir="ltr">On Wed, Jun 8, 2016 at 8:03 PM Saleem Abdulrasool via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: compnerd<br>
Date: Wed Jun  8 21:56:40 2016<br>
New Revision: 272241<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=272241&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=272241&view=rev</a><br>
Log:<br>
AArch64: support the `.arch` directive in the IAS<br>
<br>
Add support to the AArch64 IAS for the `.arch` directive.  This allows the<br>
assembly input to use architectural functionality in part of a file.  This is<br>
used in existing code like BoringSSL.<br>
<br>
Resolves PR26016!<br>
<br>
Added:<br>
    llvm/trunk/test/MC/AArch64/directive-arch.s<br>
Modified:<br>
    llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=272241&r1=272240&r2=272241&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=272241&r1=272240&r2=272241&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Wed Jun  8 21:56:40 2016<br>
@@ -30,6 +30,7 @@<br>
 #include "llvm/MC/MCSymbol.h"<br>
 #include "llvm/Support/ErrorHandling.h"<br>
 #include "llvm/Support/SourceMgr.h"<br>
+#include "llvm/Support/TargetParser.h"<br>
 #include "llvm/Support/TargetRegistry.h"<br>
 #include "llvm/Support/raw_ostream.h"<br>
 #include <cstdio><br>
@@ -69,6 +70,7 @@ private:<br>
   bool Error(SMLoc L, const Twine &Msg) { return getParser().Error(L, Msg); }<br>
   bool showMatchError(SMLoc Loc, unsigned ErrCode);<br>
<br>
+  bool parseDirectiveArch(SMLoc L);<br>
   bool parseDirectiveCPU(SMLoc L);<br>
   bool parseDirectiveWord(unsigned Size, SMLoc L);<br>
   bool parseDirectiveInst(SMLoc L);<br>
@@ -4195,6 +4197,8 @@ bool AArch64AsmParser::ParseDirective(As<br>
<br>
   StringRef IDVal = DirectiveID.getIdentifier();<br>
   SMLoc Loc = DirectiveID.getLoc();<br>
+  if (IDVal == ".arch")<br>
+    return parseDirectiveArch(Loc);<br>
   if (IDVal == ".cpu")<br>
     return parseDirectiveCPU(Loc);<br>
   if (IDVal == ".hword")<br>
@@ -4235,6 +4239,30 @@ static const struct {<br>
   { "profile", {} },<br>
 };<br>
<br>
+/// parseDirectiveArch<br>
+///   ::= .arch token<br>
+bool AArch64AsmParser::parseDirectiveArch(SMLoc L) {<br>
+  SMLoc ArchLoc = getLoc();<br>
+<br>
+  StringRef Arch, ExtensionString;<br>
+  std::tie(Arch, ExtensionString) =<br>
+      getParser().parseStringToEndOfStatement().trim().split('+');<br>
+<br>
+  unsigned ID = AArch64::parseArch(Arch);<br>
+  if (ID == ARM::AK_INVALID) {<br>
+    Error(ArchLoc, "unknown arch name");<br>
+    return false;<br>
+  }<br>
+<br>
+  MCSubtargetInfo &STI = copySTI();<br>
+  STI.setDefaultFeatures("", "");<br>
+  if (!ExtensionString.empty())<br>
+    STI.setDefaultFeatures("", ("+" + ExtensionString).str());<br>
+  setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));<br>
+<br>
+  return false;<br>
+}<br>
+<br>
 /// parseDirectiveCPU<br>
 ///   ::= .cpu id<br>
 bool AArch64AsmParser::parseDirectiveCPU(SMLoc L) {<br>
<br>
Added: llvm/trunk/test/MC/AArch64/directive-arch.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/directive-arch.s?rev=272241&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/directive-arch.s?rev=272241&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/AArch64/directive-arch.s (added)<br>
+++ llvm/trunk/test/MC/AArch64/directive-arch.s Wed Jun  8 21:56:40 2016<br>
@@ -0,0 +1,47 @@<br>
+// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | Filecheck %s<br>
+<br>
+       .arch axp64<br>
+# CHECK: error: unknown arch name<br>
+# CHECK:       .arch axp64<br>
+# CHECK:             ^<br>
+<br>
+       .arch armv8<br>
+<br>
+       fminnm d0, d0, d1<br>
+<br>
+# CHECK: error: instruction requires: fp-armv8<br>
+# CHECK:       fminnm d0, d0, d1<br>
+# CHECK:       ^<br>
+<br>
+       .arch armv8+fp<br>
+<br>
+# CHECK: '+fp' is not a recognized feature for this target (ignoring feature)<br>
+<br>
+       fminnm d0, d0, d1<br>
+<br>
+# CHECK: error: instruction requires: fp-armv8<br>
+# CHECK:       fminnm d0, d0, d1<br>
+# CHECK:       ^<br>
+<br>
+       .arch armv8+neon<br>
+<br>
+       fminnm d0, d0, d1<br>
+<br>
+       .arch armv8<br>
+<br>
+       fminnm d0, d0, d1<br>
+<br>
+# CHECK: error: instruction requires: fp-armv8<br>
+# CHECK:       fminnm d0, d0, d1<br>
+# CHECK:       ^<br>
+<br>
+       .arch armv8-a+crypto<br>
+<br>
+       aesd v0.16b, v2.16b<br>
+<br>
+       .arch armv8.1-a+ras<br>
+       esb<br>
+<br>
+# CHECK:       fminnm  d0, d0, d1<br>
+# CHECK:       aesd    v0.16b, v2.16b<br>
+# CHECK:       esb<br>
<br>
<br>
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</blockquote></div></div></div>