<div dir="ltr">And why wasn't the <span style="font-size:12.8px">_mm256_storeu_pd using the storeu intrinsic before?</span></div><div class="gmail_extra"><br><div class="gmail_quote">On Mon, May 30, 2016 at 11:58 AM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Do we have a script that generates these or are these maintained by hand?</div><div class="gmail_extra"><div><div class="h5"><br><div class="gmail_quote">On Mon, May 30, 2016 at 11:42 AM, Simon Pilgrim via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: rksimon<br>
Date: Mon May 30 13:42:51 2016<br>
New Revision: 271222<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=271222&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=271222&view=rev</a><br>
Log:<br>
[X86][SSE] Updated storeu fast-isel tests to match clang builtin tests<br>
<br>
Since rL271214 the headers have no longer used the storeu intrinsic<br>
<br>
Modified:<br>
llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll<br>
llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll<br>
llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll Mon May 30 13:42:51 2016<br>
@@ -3144,15 +3144,14 @@ define void @test_mm256_storeu2_m128(flo<br>
; X64-NEXT: vmovups %xmm0, (%rsi)<br>
; X64-NEXT: vzeroupper<br>
; X64-NEXT: retq<br>
- %arg0 = bitcast float* %a0 to i8*<br>
+ %arg0 = bitcast float* %a0 to <4 x float>*<br>
%lo = shufflevector <8 x float> %a2, <8 x float> %a2, <4 x i32> <i32 0, i32 1, i32 2, i32 3><br>
- call void @<a href="http://llvm.x86.sse.storeu.ps" rel="noreferrer" target="_blank">llvm.x86.sse.storeu.ps</a>(i8* %arg0, <4 x float> %lo)<br>
- %arg1 = bitcast float* %a1 to i8*<br>
+ store <4 x float> %lo, <4 x float>* %arg0, align 1<br>
+ %arg1 = bitcast float* %a1 to <4 x float>*<br>
%hi = shufflevector <8 x float> %a2, <8 x float> %a2, <4 x i32> <i32 4, i32 5, i32 6, i32 7><br>
- call void @<a href="http://llvm.x86.sse.storeu.ps" rel="noreferrer" target="_blank">llvm.x86.sse.storeu.ps</a>(i8* %arg1, <4 x float> %hi)<br>
+ store <4 x float> %hi, <4 x float>* %arg1, align 1<br>
ret void<br>
}<br>
-declare void @<a href="http://llvm.x86.sse.storeu.ps" rel="noreferrer" target="_blank">llvm.x86.sse.storeu.ps</a>(i8*, <4 x float>) nounwind readnone<br>
<br>
define void @test_mm256_storeu2_m128d(double* %a0, double* %a1, <4 x double> %a2) nounwind {<br>
; X32-LABEL: test_mm256_storeu2_m128d:<br>
@@ -3172,15 +3171,14 @@ define void @test_mm256_storeu2_m128d(do<br>
; X64-NEXT: vmovups %xmm0, (%rsi)<br>
; X64-NEXT: vzeroupper<br>
; X64-NEXT: retq<br>
- %arg0 = bitcast double* %a0 to i8*<br>
+ %arg0 = bitcast double* %a0 to <2 x double>*<br>
%lo = shufflevector <4 x double> %a2, <4 x double> %a2, <2 x i32> <i32 0, i32 1><br>
- call void @llvm.x86.sse2.storeu.pd(i8* %arg0, <2 x double> %lo)<br>
- %arg1 = bitcast double* %a1 to i8*<br>
+ store <2 x double> %lo, <2 x double>* %arg0, align 1<br>
+ %arg1 = bitcast double* %a1 to <2 x double>*<br>
%hi = shufflevector <4 x double> %a2, <4 x double> %a2, <2 x i32> <i32 2, i32 3><br>
- call void @llvm.x86.sse2.storeu.pd(i8* %arg1, <2 x double> %hi)<br>
+ store <2 x double> %hi, <2 x double>* %arg1, align 1<br>
ret void<br>
}<br>
-declare void @llvm.x86.sse2.storeu.pd(i8*, <2 x double>) nounwind readnone<br>
<br>
define void @test_mm256_storeu2_m128i(<2 x i64>* %a0, <2 x i64>* %a1, <4 x i64> %a2) nounwind {<br>
; X32-LABEL: test_mm256_storeu2_m128i:<br>
@@ -3200,17 +3198,14 @@ define void @test_mm256_storeu2_m128i(<2<br>
; X64-NEXT: vmovups %xmm0, (%rsi)<br>
; X64-NEXT: vzeroupper<br>
; X64-NEXT: retq<br>
- %arg0 = bitcast <2 x i64>* %a0 to i8*<br>
- %lo2 = shufflevector <4 x i64> %a2, <4 x i64> %a2, <2 x i32> <i32 0, i32 1><br>
- %lo = bitcast <2 x i64> %lo2 to <16 x i8><br>
- call void @llvm.x86.sse2.storeu.dq(i8* %arg0, <16 x i8> %lo)<br>
- %arg1 = bitcast <2 x i64>* %a1 to i8*<br>
- %hi2 = shufflevector <4 x i64> %a2, <4 x i64> %a2, <2 x i32> <i32 2, i32 3><br>
- %hi = bitcast <2 x i64> %hi2 to <16 x i8><br>
- call void @llvm.x86.sse2.storeu.dq(i8* %arg1, <16 x i8> %hi)<br>
+ %arg0 = bitcast <2 x i64>* %a0 to <2 x i64>*<br>
+ %lo = shufflevector <4 x i64> %a2, <4 x i64> %a2, <2 x i32> <i32 0, i32 1><br>
+ store <2 x i64> %lo, <2 x i64>* %arg0, align 1<br>
+ %arg1 = bitcast <2 x i64>* %a1 to <2 x i64>*<br>
+ %hi = shufflevector <4 x i64> %a2, <4 x i64> %a2, <2 x i32> <i32 2, i32 3><br>
+ store <2 x i64> %hi, <2 x i64>* %arg1, align 1<br>
ret void<br>
}<br>
-declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind readnone<br>
<br>
define void @test_mm256_stream_pd(double *%a0, <4 x double> %a1) nounwind {<br>
; X32-LABEL: test_mm256_stream_pd:<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll Mon May 30 13:42:51 2016<br>
@@ -1920,11 +1920,10 @@ define void @test_mm_storeu_ps(float *%a<br>
; X64: # BB#0:<br>
; X64-NEXT: movups %xmm0, (%rdi)<br>
; X64-NEXT: retq<br>
- %arg0 = bitcast float* %a0 to i8*<br>
- call void @<a href="http://llvm.x86.sse.storeu.ps" rel="noreferrer" target="_blank">llvm.x86.sse.storeu.ps</a>(i8* %arg0, <4 x float> %a1)<br>
+ %arg0 = bitcast float* %a0 to <4 x float>*<br>
+ store <4 x float> %a1, <4 x float>* %arg0, align 1<br>
ret void<br>
}<br>
-declare void @<a href="http://llvm.x86.sse.storeu.ps" rel="noreferrer" target="_blank">llvm.x86.sse.storeu.ps</a>(i8*, <4 x float>) nounwind<br>
<br>
define void @test_mm_stream_ps(float *%a0, <4 x float> %a1) {<br>
; X32-LABEL: test_mm_stream_ps:<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll?rev=271222&r1=271221&r2=271222&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll Mon May 30 13:42:51 2016<br>
@@ -3255,11 +3255,10 @@ define void @test_mm_storeu_pd(double *%<br>
; X64: # BB#0:<br>
; X64-NEXT: movups %xmm0, (%rdi)<br>
; X64-NEXT: retq<br>
- %arg0 = bitcast double* %a0 to i8*<br>
- call void @llvm.x86.sse2.storeu.pd(i8* %arg0, <2 x double> %a1)<br>
+ %arg0 = bitcast double* %a0 to <2 x double>*<br>
+ store <2 x double> %a1, <2 x double>* %arg0, align 1<br>
ret void<br>
}<br>
-declare void @llvm.x86.sse2.storeu.pd(i8*, <2 x double>) nounwind<br>
<br>
define void @test_mm_storeu_si128(<2 x i64> *%a0, <2 x i64> %a1) {<br>
; X32-LABEL: test_mm_storeu_si128:<br>
@@ -3272,12 +3271,9 @@ define void @test_mm_storeu_si128(<2 x i<br>
; X64: # BB#0:<br>
; X64-NEXT: movups %xmm0, (%rdi)<br>
; X64-NEXT: retq<br>
- %arg0 = bitcast <2 x i64>* %a0 to i8*<br>
- %arg1 = bitcast <2 x i64> %a1 to <16 x i8><br>
- call void @llvm.x86.sse2.storeu.dq(i8* %arg0, <16 x i8> %arg1)<br>
+ store <2 x i64> %a1, <2 x i64>* %a0, align 1<br>
ret void<br>
}<br>
-declare void @llvm.x86.sse2.storeu.dq(i8*, <16 x i8>) nounwind<br>
<br>
define void @test_mm_stream_pd(double *%a0, <2 x double> %a1) {<br>
; X32-LABEL: test_mm_stream_pd:<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div></div></div><span class="HOEnZb"><font color="#888888">-- <br><div>~Craig</div>
</font></span></div>
</blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature">~Craig</div>
</div>