<div dir="ltr">I can't tell from looking at the deleted test cases and the new test cases that it was picking the wrong instruction. What am I missing?</div><div class="gmail_extra"><br><div class="gmail_quote">On Sat, May 21, 2016 at 7:44 AM, Michael Zuckerman via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: mzuckerm<br>
Date: Sat May 21 09:44:18 2016<br>
New Revision: 270322<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=270322&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=270322&view=rev</a><br>
Log:<br>
[Clang][AVX512][intrinsics] Fix rcp and sqrt intrinsics.<br>
<br>
Differential Revision: <a href="http://reviews.llvm.org/D20438" rel="noreferrer" target="_blank">http://reviews.llvm.org/D20438</a><br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.h<br>
llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td<br>
llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br>
llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll<br>
llvm/trunk/test/CodeGen/X86/avx512-scalarIntrinsics.ll<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=270322&r1=270321&r2=270322&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=270322&r1=270321&r2=270322&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat May 21 09:44:18 2016<br>
@@ -21753,7 +21753,9 @@ const char *X86TargetLowering::getTarget<br>
case X86ISD::FMAXC: return "X86ISD::FMAXC";<br>
case X86ISD::FMINC: return "X86ISD::FMINC";<br>
case X86ISD::FRSQRT: return "X86ISD::FRSQRT";<br>
+ case X86ISD::FRSQRTS: return "X86ISD::FRSQRTS";<br>
case X86ISD::FRCP: return "X86ISD::FRCP";<br>
+ case X86ISD::FRCPS: return "X86ISD::FRCPS";<br>
case X86ISD::EXTRQI: return "X86ISD::EXTRQI";<br>
case X86ISD::INSERTQI: return "X86ISD::INSERTQI";<br>
case X86ISD::TLSADDR: return "X86ISD::TLSADDR";<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=270322&r1=270321&r2=270322&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=270322&r1=270321&r2=270322&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Sat May 21 09:44:18 2016<br>
@@ -250,7 +250,8 @@ namespace llvm {<br>
/// Note that these typically require refinement<br>
/// in order to obtain suitable precision.<br>
FRSQRT, FRCP,<br>
-<br>
+ FRSQRTS, FRCPS,<br>
+<br>
// Thread Local Storage.<br>
TLSADDR,<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=270322&r1=270321&r2=270322&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=270322&r1=270321&r2=270322&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Sat May 21 09:44:18 2016<br>
@@ -60,8 +60,8 @@ def X86fandn : SDNode<"X86ISD::FANDN",<br>
[SDNPCommutative, SDNPAssociative]>;<br>
def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;<br>
def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;<br>
-def X86frsqrt14s: SDNode<"X86ISD::FRSQRT", SDTFPBinOp>;<br>
-def X86frcp14s : SDNode<"X86ISD::FRCP", SDTFPBinOp>;<br>
+def X86frsqrt14s: SDNode<"X86ISD::FRSQRTS", SDTFPBinOp>;<br>
+def X86frcp14s : SDNode<"X86ISD::FRCPS", SDTFPBinOp>;<br>
def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;<br>
def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;<br>
def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=270322&r1=270321&r2=270322&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=270322&r1=270321&r2=270322&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h Sat May 21 09:44:18 2016<br>
@@ -2125,8 +2125,8 @@ static const IntrinsicData IntrinsicsWi<br>
X86_INTRINSIC_DATA(avx512_rcp14_ps_128, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),<br>
X86_INTRINSIC_DATA(avx512_rcp14_ps_256, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),<br>
X86_INTRINSIC_DATA(avx512_rcp14_ps_512, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),<br>
- X86_INTRINSIC_DATA(avx512_rcp14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRCP, 0),<br>
- X86_INTRINSIC_DATA(avx512_rcp14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRCP, 0),<br>
+ X86_INTRINSIC_DATA(avx512_rcp14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRCPS, 0),<br>
+ X86_INTRINSIC_DATA(avx512_rcp14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRCPS, 0),<br>
X86_INTRINSIC_DATA(avx512_rcp28_pd, INTR_TYPE_1OP_MASK_RM, X86ISD::RCP28, 0),<br>
X86_INTRINSIC_DATA(avx512_rcp28_ps, INTR_TYPE_1OP_MASK_RM, X86ISD::RCP28, 0),<br>
X86_INTRINSIC_DATA(avx512_rcp28_sd, INTR_TYPE_SCALAR_MASK_RM, X86ISD::RCP28, 0),<br>
@@ -2137,8 +2137,8 @@ static const IntrinsicData IntrinsicsWi<br>
X86_INTRINSIC_DATA(avx512_rsqrt14_ps_128, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),<br>
X86_INTRINSIC_DATA(avx512_rsqrt14_ps_256, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),<br>
X86_INTRINSIC_DATA(avx512_rsqrt14_ps_512, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),<br>
- X86_INTRINSIC_DATA(avx512_rsqrt14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRT, 0),<br>
- X86_INTRINSIC_DATA(avx512_rsqrt14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRT, 0),<br>
+ X86_INTRINSIC_DATA(avx512_rsqrt14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRTS, 0),<br>
+ X86_INTRINSIC_DATA(avx512_rsqrt14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRTS, 0),<br>
X86_INTRINSIC_DATA(avx512_rsqrt28_pd, INTR_TYPE_1OP_MASK_RM,X86ISD::RSQRT28, 0),<br>
X86_INTRINSIC_DATA(avx512_rsqrt28_ps, INTR_TYPE_1OP_MASK_RM,X86ISD::RSQRT28, 0),<br>
X86_INTRINSIC_DATA(avx512_rsqrt28_sd, INTR_TYPE_SCALAR_MASK_RM,X86ISD::RSQRT28, 0),<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=270322&r1=270321&r2=270322&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=270322&r1=270321&r2=270322&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll Sat May 21 09:44:18 2016<br>
@@ -126,26 +126,6 @@ define <16 x float> @test_rsqrt_ps_512(<<br>
}<br>
declare <16 x float> @llvm.x86.avx512.rsqrt14.ps.512(<16 x float>, <16 x float>, i16) nounwind readnone<br>
<br>
-define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) {<br>
-; CHECK-LABEL: test_rsqrt14_ss:<br>
-; CHECK: ## BB#0:<br>
-; CHECK-NEXT: vrsqrt14ss %xmm0, %xmm0, %xmm0<br>
-; CHECK-NEXT: retq<br>
- %res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ; <<4 x float>> [#uses=1]<br>
- ret <4 x float> %res<br>
-}<br>
-declare <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone<br>
-<br>
-define <4 x float> @test_rcp14_ss(<4 x float> %a0) {<br>
-; CHECK-LABEL: test_rcp14_ss:<br>
-; CHECK: ## BB#0:<br>
-; CHECK-NEXT: vrcp14ss %xmm0, %xmm0, %xmm0<br>
-; CHECK-NEXT: retq<br>
- %res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ; <<4 x float>> [#uses=1]<br>
- ret <4 x float> %res<br>
-}<br>
-declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone<br>
-<br>
define <8 x double> @test_sqrt_pd_512(<8 x double> %a0) {<br>
; CHECK-LABEL: test_sqrt_pd_512:<br>
; CHECK: ## BB#0:<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512-scalarIntrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-scalarIntrinsics.ll?rev=270322&r1=270321&r2=270322&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-scalarIntrinsics.ll?rev=270322&r1=270321&r2=270322&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512-scalarIntrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512-scalarIntrinsics.ll Sat May 21 09:44:18 2016<br>
@@ -1,6 +1,48 @@<br>
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s<br>
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s<br>
<br>
+<br>
+define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) {<br>
+ ; CHECK-LABEL: test_rsqrt14_ss:<br>
+ ; CHECK: ## BB#0:<br>
+ ; CHECK-NEXT: vrsqrt14ss %xmm0, %xmm0, %xmm0<br>
+ ; CHECK-NEXT: retq<br>
+ %res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ;<br>
+ ret <4 x float> %res<br>
+}<br>
+declare <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone<br>
+<br>
+define <4 x float> @test_rcp14_ss(<4 x float> %a0) {<br>
+ ; CHECK-LABEL: test_rcp14_ss:<br>
+ ; CHECK: ## BB#0:<br>
+ ; CHECK-NEXT: vrcp14ss %xmm0, %xmm0, %xmm0<br>
+ ; CHECK-NEXT: retq<br>
+ %res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ;<br>
+ ret <4 x float> %res<br>
+}<br>
+declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone<br>
+<br>
+define <2 x double> @test_rsqrt14_sd(<2 x double> %a0) {<br>
+ ; CHECK-LABEL: test_rsqrt14_sd:<br>
+ ; CHECK: ## BB#0:<br>
+ ; CHECK-NEXT: vrsqrt14sd %xmm0, %xmm0, %xmm0<br>
+ ; CHECK-NEXT: retq<br>
+ %res = call <2 x double> @<a href="http://llvm.x86.avx512.rsqrt14.sd" rel="noreferrer" target="_blank">llvm.x86.avx512.rsqrt14.sd</a>(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ;<br>
+ ret <2 x double> %res<br>
+}<br>
+declare <2 x double> @<a href="http://llvm.x86.avx512.rsqrt14.sd" rel="noreferrer" target="_blank">llvm.x86.avx512.rsqrt14.sd</a>(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone<br>
+<br>
+define <2 x double> @test_rcp14_sd(<2 x double> %a0) {<br>
+ ; CHECK-LABEL: test_rcp14_sd:<br>
+ ; CHECK: ## BB#0:<br>
+ ; CHECK-NEXT: vrcp14sd %xmm0, %xmm0, %xmm0<br>
+ ; CHECK-NEXT: retq<br>
+ %res = call <2 x double> @<a href="http://llvm.x86.avx512.rcp14.sd" rel="noreferrer" target="_blank">llvm.x86.avx512.rcp14.sd</a>(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ;<br>
+ ret <2 x double> %res<br>
+<br>
+}<br>
+declare <2 x double> @<a href="http://llvm.x86.avx512.rcp14.sd" rel="noreferrer" target="_blank">llvm.x86.avx512.rcp14.sd</a>(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone<br>
+<br>
declare <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float>, <4 x float>,<4 x float>, i8, i32)<br>
define <4 x float>@test_int_x86_avx512_mask_scalef_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4) {<br>
; CHECK-LABEL: test_int_x86_avx512_mask_scalef_ss:<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature">~Craig</div>
</div>