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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Yes, x86-64 calling convention requires saving xmm0-7, ymm0-7, zmm0-7, K0-7 for 32-bit.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Amjad<o:p></o:p></span></p>
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<p class="MsoNormal"><a name="_____replyseparator"></a><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> juergen@apple.com [mailto:juergen@apple.com]
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<b>Sent:</b> Tuesday, May 10, 2016 22:35<br>
<b>To:</b> Quentin Colombet <qcolombet@apple.com><br>
<b>Cc:</b> Craig Topper <craig.topper@gmail.com>; llvm-commits <llvm-commits@lists.llvm.org>; Aboud, Amjad <amjad.aboud@intel.com><br>
<b>Subject:</b> Re: [llvm] r268983 - [X86] Fix the AllRegs AVX calling convention.<o:p></o:p></span></p>
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<p class="MsoNormal">On May 10, 2016, at 12:13 PM, Quentin Colombet <<a href="mailto:qcolombet@apple.com">qcolombet@apple.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">On May 10, 2016, at 11:22 AM, Craig Topper <<a href="mailto:craig.topper@gmail.com">craig.topper@gmail.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">Should 32-bit X86_INTR also save the whole YMM and ZMM register when AVX or AVX512 is enabled? Currently it only saves the XMM portions.<o:p></o:p></p>
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<p class="MsoNormal">I looked through the original thread for this change, but I didn’t find anything tangible regarding this question.<o:p></o:p></p>
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<p class="MsoNormal">I would believe so.<o:p></o:p></p>
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<p class="MsoNormal">+ Amjad, who introduced the interrupt calling convention.<o:p></o:p></p>
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<p class="MsoNormal">On Tue, May 10, 2016 at 11:11 AM, Juergen Ributzka via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">Hi Quentin,<o:p></o:p></p>
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<p class="MsoNormal">I also had to do some git archeology first :)<o:p></o:p></p>
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<p class="MsoNormal">CSR_64_AllRegs/CSR_64_AllRegs_AVX were originally introduced for the AnyReg calling convention, which could only be used by the stackmap and patchpoint intrinsics. Functions cannot uses this calling convention and therefore there shouldn’t
be any spill code generated. Looks like CSR_64_AllRegs/CSR_64_AllRegs_AVX are now also used by the X86_INTR calling convention.<o:p></o:p></p>
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<p class="MsoNormal">Anyways, getCalleeSaved registers is already checking the current configuration and returns the appropriate callee save register list. The CSR_64_AllRegs_AVX was broken and we should return a separate one for AVX512. Craig already added
CSR_64_AllRegs_AVX512 for the X86_INTR calling convention in r269018. We can use the same CSR for the AnyReg calling convention.<o:p></o:p></p>
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<p class="MsoNormal">On May 9, 2016, at 4:36 PM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" target="_blank">qcolombet@apple.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">Hi Juergen (you were in the blame list for the calling convention stuff :)),<o:p></o:p></p>
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<p class="MsoNormal">I was doing a bit of archeology with the calling convention stuff on X86, because I found some bugs with the machine verifier and I wanted to double check the other calling convention to make sure they are correct and I need your help to
figure out what was the intent for each of those classes.<o:p></o:p></p>
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<p class="MsoNormal">Basically, the problem is that we have a bunch of callee saved registers that we saved that may not actually be supported by the current configuration.<o:p></o:p></p>
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<p class="MsoNormal">For instance, the bug that this specific commit was fixing was that we pushed AVX512 registers even when AVX512 was not used.<o:p></o:p></p>
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<p class="MsoNormal">First, regarding the design, were the returned CSRs supposed to be directly usable or do users of the getCalleeSaved need to intersect with what the current configuration has?<o:p></o:p></p>
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<p class="MsoNormal">I found the latter annoying to use, but I could see it is also annoying to write a different CSR list for each configuration.<o:p></o:p></p>
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<p class="MsoNormal">We usually create a separate CSR for each configuration.<o:p></o:p></p>
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<p class="MsoNormal">Second, what is the default for AllRegs/MostRegs supposed to be?<o:p></o:p></p>
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<p class="MsoNormal">Right now, it seems to assume we have AVX512 and such, thus it is pretty easy to end up with an assembly file having encoding problems like this:<o:p></o:p></p>
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<p class="MsoNormal"><b><span style="font-size:8.5pt;font-family:"Menlo",serif">old.s:38:2:
<span style="color:#C33720">error: </span>instruction requires: AVX-512 ISA AVX-512 VL ISA</span></b><span style="font-size:8.5pt;font-family:"Menlo",serif"><o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-size:8.5pt;font-family:"Menlo",serif"> vmovups %ymm31, 1008(%rsp) ## 32-byte Spill<o:p></o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:8.5pt;font-family:"Menlo",serif;color:#34BD26"> ^</span></b><span style="font-size:8.5pt;font-family:"Menlo",serif;color:#34BD26"><o:p></o:p></span></p>
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<p class="MsoNormal">MostRegs was defined for the cold calling convention. AllRegs is supposed to be all registers and was originally defined for the AnyReg calling convention.<o:p></o:p></p>
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<p class="MsoNormal">From what I saw, it seems to me that the sets of CSRs were supposed to be directly usable, but allregs, mostregs, and maybe others, do not follow that direction.<o:p></o:p></p>
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<p class="MsoNormal">What is wrong with the MostRegs list?<o:p></o:p></p>
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<p class="MsoNormal">How would you recommend we fix this?<o:p></o:p></p>
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<p class="MsoNormal">Use a separate CSR for AVX512 (as Craig did).<o:p></o:p></p>
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<p class="MsoNormal">Thanks,<o:p></o:p></p>
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<p class="MsoNormal">-Quentin<o:p></o:p></p>
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<p class="MsoNormal">Cheers,<o:p></o:p></p>
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<p class="MsoNormal">Juergen<o:p></o:p></p>
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<p class="MsoNormal">On May 9, 2016, at 3:37 PM, Quentin Colombet via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal">Author: qcolombet<br>
Date: Mon May 9 17:37:05 2016<br>
New Revision: 268983<br>
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URL: <a href="http://llvm.org/viewvc/llvm-project?rev=268983&view=rev" target="_blank">
http://llvm.org/viewvc/llvm-project?rev=268983&view=rev</a><br>
Log:<br>
[X86] Fix the AllRegs AVX calling convention.<br>
<br>
We used to list registers that were not in the AVX space. In other<br>
words, we were pushing registers that the ISA cannot encode<br>
(YMM16-YMM31).<br>
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This is part of <a href="http://llvm.org/PR27481" target="_blank">llvm.org/PR27481</a>.<br>
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Modified:<br>
llvm/trunk/lib/Target/X86/X86CallingConv.td<br>
llvm/trunk/test/CodeGen/X86/x86-interrupt_vzeroupper.ll<br>
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Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=268983&r1=268982&r2=268983&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=268983&r1=268982&r2=268983&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86CallingConv.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86CallingConv.td Mon May 9 17:37:05 2016<br>
@@ -897,7 +897,7 @@ def CSR_32_AllRegs_SSE : CalleeSavedRegs<br>
def CSR_64_AllRegs : CalleeSavedRegs<(add CSR_64_MostRegs, RAX, RSP,<br>
(sequence "XMM%u", 16, 31))>;<br>
def CSR_64_AllRegs_AVX : CalleeSavedRegs<(sub (add CSR_64_MostRegs, RAX, RSP,<br>
- (sequence "YMM%u", 0, 31)),<br>
+ (sequence "YMM%u", 0, 15)),<br>
(sequence "XMM%u", 0, 15))>;<br>
<br>
// Standard C + YMM6-15<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/x86-interrupt_vzeroupper.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-interrupt_vzeroupper.ll?rev=268983&r1=268982&r2=268983&view=diff" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-interrupt_vzeroupper.ll?rev=268983&r1=268982&r2=268983&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/x86-interrupt_vzeroupper.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/x86-interrupt_vzeroupper.ll Mon May 9 17:37:05 2016<br>
@@ -1,4 +1,4 @@<br>
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s<br>
+; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s<br>
<br>
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;<br>
;; Checks that interrupt handler code does not call "vzeroupper" instruction<br>
<br>
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_______________________________________________<br>
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<p class="MsoNormal">-- <o:p></o:p></p>
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<p class="MsoNormal">~Craig<o:p></o:p></p>
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