<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Hi Simon<div class=""><br class=""></div><div class="">I think this might have broken an arm64 test case. Mind taking a look?</div><div class=""><br class=""></div><div class="">The log is at <a href="http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_check/22635/consoleFull" class="">http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_check/22635/consoleFull</a></div><div class=""><br class=""></div><div class="">And the failure is:</div><div class=""><br class=""></div><blockquote style="margin: 0 0 0 40px; border: none; padding: 0px;" class=""><div class=""><div class="">******************** TEST 'LLVM :: CodeGen/AArch64/bitreverse.ll' FAILED ********************</div></div><div class=""><div class="">Script:</div></div><div class=""><div class="">--</div></div><div class=""><div class="">/Users/buildslave/jenkins/sharedspace/incremental@2/clang-build/./bin/llc -mtriple=aarch64-eabi /Users/buildslave/jenkins/sharedspace/incremental@2/llvm/test/CodeGen/AArch64/bitreverse.ll -o - | /Users/buildslave/jenkins/sharedspace/incremental@2/clang-build/./bin/FileCheck /Users/buildslave/jenkins/sharedspace/incremental@2/llvm/test/CodeGen/AArch64/bitreverse.ll</div></div><div class=""><div class="">--</div></div><div class=""><div class="">Exit Code: 1</div></div><div class=""><div class=""><br class=""></div></div><div class=""><div class="">Command Output (stderr):</div></div><div class=""><div class="">--</div></div><div class=""><div class="">/Users/buildslave/jenkins/sharedspace/incremental@2/llvm/test/CodeGen/AArch64/bitreverse.ll:50:14: error: expected string not found in input</div></div><div class=""><div class="">; CHECK-DAG: movi [[M1:v.*]], #0x80</div></div><div class=""><div class=""> ^</div></div><div class=""><div class=""><stdin>:221:8: note: scanning from here</div></div><div class=""><div class="">g_vec: // @g_vec</div></div><div class=""><div class=""> ^</div></div><div class=""><div class=""><stdin>:228:4: note: possible intended match here</div></div><div class=""><div class=""> and w18, w18, #0x40000000</div></div></blockquote><div class=""><br class=""></div><div class="">Cheers</div><div class="">Pete</div><div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On May 4, 2016, at 8:01 AM, Simon Pilgrim via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="">Author: rksimon<br class="">Date: Wed May 4 10:01:13 2016<br class="">New Revision: 268504<br class=""><br class="">URL: <a href="http://llvm.org/viewvc/llvm-project?rev=268504&view=rev" class="">http://llvm.org/viewvc/llvm-project?rev=268504&view=rev</a><br class="">Log:<br class="">[SelectionDAG] BITREVERSE vector legalization of bit operations<br class=""><br class="">Vector bit operations are typically promoted instead of having custom lowering. This patch changes the isOperationLegalOrCustom tests for vector AND/OR operations to use isOperationLegalOrPromote instead, allowing the SSE implementations to stay on the simd unit.<br class=""><br class="">Differential Revision: <a href="http://reviews.llvm.org/D19805" class="">http://reviews.llvm.org/D19805</a><br class=""><br class="">Modified:<br class=""> llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp<br class=""> llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll<br class=""><br class="">Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp?rev=268504&r1=268503&r2=268504&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp?rev=268504&r1=268503&r2=268504&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (original)<br class="">+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Wed May 4 10:01:13 2016<br class="">@@ -894,8 +894,8 @@ SDValue VectorLegalizer::ExpandBITREVERS<br class=""> // than unrolling and expanding each component.<br class=""> if (!TLI.isOperationLegalOrCustom(ISD::SHL, VT) ||<br class=""> !TLI.isOperationLegalOrCustom(ISD::SRL, VT) ||<br class="">- !TLI.isOperationLegalOrCustom(ISD::AND, VT) ||<br class="">- !TLI.isOperationLegalOrCustom(ISD::OR, VT))<br class="">+ !TLI.isOperationLegalOrPromote(ISD::AND, VT) ||<br class="">+ !TLI.isOperationLegalOrPromote(ISD::OR, VT))<br class=""> return DAG.UnrollVectorOp(Op.getNode());<br class=""><br class=""> // Let LegalizeDAG handle this later.<br class=""><br class="">Modified: llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll?rev=268504&r1=268503&r2=268504&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll?rev=268504&r1=268503&r2=268504&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll (original)<br class="">+++ llvm/trunk/test/CodeGen/X86/vector-bitreverse.ll Wed May 4 10:01:13 2016<br class="">@@ -1011,1026 +1011,81 @@ define i64 @test_bitreverse_i64(i64 %a)<br class=""> define <16 x i8> @test_bitreverse_v16i8(<16 x i8> %a) nounwind {<br class=""> ; SSE-LABEL: test_bitreverse_v16i8:<br class=""> ; SSE: # BB#0:<br class="">-; SSE-NEXT: pushq %rbp<br class="">-; SSE-NEXT: pushq %r15<br class="">-; SSE-NEXT: pushq %r14<br class="">-; SSE-NEXT: pushq %rbx<br class="">-; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %cl<br class="">-; SSE-NEXT: movb %cl, %bl<br class="">-; SSE-NEXT: shlb $7, %bl<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shlb $5, %dl<br class="">-; SSE-NEXT: andb $64, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: addb %dl, %dl<br class="">-; SSE-NEXT: andb $16, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shrb $3, %dl<br class="">-; SSE-NEXT: andb $4, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: shrb $7, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movzbl %cl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r10b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r14b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dil<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r11b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r9b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %bpl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %sil<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb %dl, %r8b<br class="">-; SSE-NEXT: shlb $7, %r8b<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $5, %bl<br class="">-; SSE-NEXT: andb $64, %bl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %bl, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: orb %r8b, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %r11b<br class="">-; SSE-NEXT: orb %dl, %r11b<br class="">-; SSE-NEXT: orb %al, %r11b<br class="">-; SSE-NEXT: movzbl %r11b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r11b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r8b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %bl<br class="">-; SSE-NEXT: movb %bl, %r15b<br class="">-; SSE-NEXT: shlb $7, %r15b<br class="">-; SSE-NEXT: movb %bl, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %bl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: movb %bl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %bl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: movb %bl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %bl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: shrb $7, %bl<br class="">-; SSE-NEXT: orb %al, %bl<br class="">-; SSE-NEXT: orb %r15b, %bl<br class="">-; SSE-NEXT: movzbl %bl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]<br class="">-; SSE-NEXT: movb %r14b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shlb $3, %bl<br class="">-; SSE-NEXT: andb $32, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shrb %bl<br class="">-; SSE-NEXT: andb $8, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shrb $5, %bl<br class="">-; SSE-NEXT: andb $2, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: shrb $7, %r14b<br class="">-; SSE-NEXT: orb %bl, %r14b<br class="">-; SSE-NEXT: orb %al, %r14b<br class="">-; SSE-NEXT: movzbl %r14b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $3, %bl<br class="">-; SSE-NEXT: andb $32, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb %bl<br class="">-; SSE-NEXT: andb $8, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb $5, %bl<br class="">-; SSE-NEXT: andb $2, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %bl, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %bpl<br class="">-; SSE-NEXT: orb %dl, %bpl<br class="">-; SSE-NEXT: orb %al, %bpl<br class="">-; SSE-NEXT: movzbl %bpl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %bpl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $5, %bl<br class="">-; SSE-NEXT: andb $64, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shlb $3, %cl<br class="">-; SSE-NEXT: andb $32, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: addb %bl, %bl<br class="">-; SSE-NEXT: andb $16, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb %cl<br class="">-; SSE-NEXT: andb $8, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb $3, %bl<br class="">-; SSE-NEXT: andb $4, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $5, %cl<br class="">-; SSE-NEXT: andb $2, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]<br class="">-; SSE-NEXT: movb %r10b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r10b<br class="">-; SSE-NEXT: orb %dl, %r10b<br class="">-; SSE-NEXT: orb %cl, %r10b<br class="">-; SSE-NEXT: movzbl %r10b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r11b<br class="">-; SSE-NEXT: orb %dl, %r11b<br class="">-; SSE-NEXT: orb %cl, %r11b<br class="">-; SSE-NEXT: movzbl %r11b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]<br class="">-; SSE-NEXT: movb %r9b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r9b<br class="">-; SSE-NEXT: orb %dl, %r9b<br class="">-; SSE-NEXT: orb %cl, %r9b<br class="">-; SSE-NEXT: movzbl %r9b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %bpl<br class="">-; SSE-NEXT: orb %dl, %bpl<br class="">-; SSE-NEXT: orb %cl, %bpl<br class="">-; SSE-NEXT: movzbl %bpl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]<br class="">-; SSE-NEXT: movb %dil, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %dil<br class="">-; SSE-NEXT: orb %dl, %dil<br class="">-; SSE-NEXT: orb %al, %dil<br class="">-; SSE-NEXT: movzbl %dil, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: movb %r8b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %r8b<br class="">-; SSE-NEXT: orb %dl, %r8b<br class="">-; SSE-NEXT: orb %al, %r8b<br class="">-; SSE-NEXT: movzbl %r8b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]<br class="">-; SSE-NEXT: movb %sil, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %sil<br class="">-; SSE-NEXT: orb %dl, %sil<br class="">-; SSE-NEXT: orb %al, %sil<br class="">-; SSE-NEXT: movzbl %sil, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %cl<br class="">-; SSE-NEXT: movb %cl, %bl<br class="">-; SSE-NEXT: shlb $7, %bl<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shlb $5, %dl<br class="">-; SSE-NEXT: andb $64, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: addb %dl, %dl<br class="">-; SSE-NEXT: andb $16, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shrb $3, %dl<br class="">-; SSE-NEXT: andb $4, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: shrb $7, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movzbl %cl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]<br class="">-; SSE-NEXT: popq %rbx<br class="">-; SSE-NEXT: popq %r14<br class="">-; SSE-NEXT: popq %r15<br class="">-; SSE-NEXT: popq %rbp<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrlw $7, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]<br class="">+; SSE-NEXT: pand %xmm1, %xmm1<br class="">+; SSE-NEXT: pand %xmm2, %xmm1<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psllw $7, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]<br class="">+; SSE-NEXT: pand %xmm3, %xmm3<br class="">+; SSE-NEXT: pand %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psllw $5, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm4<br class="">+; SSE-NEXT: psllw $3, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm3, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: paddb %xmm3, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm4, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm4<br class="">+; SSE-NEXT: psrlw $1, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm3, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrlw $3, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm4, %xmm3<br class="">+; SSE-NEXT: psrlw $5, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm3, %xmm0<br class="">+; SSE-NEXT: por %xmm1, %xmm0<br class="">+; SSE-NEXT: por %xmm2, %xmm0<br class=""> ; SSE-NEXT: retq<br class=""> ;<br class=""> ; AVX-LABEL: test_bitreverse_v16i8:<br class=""> ; AVX: # BB#0:<br class="">-; AVX-NEXT: vpextrb $1, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %esi<br class="">-; AVX-NEXT: vpextrb $0, %xmm0, %ecx<br class="">-; AVX-NEXT: movb %cl, %dil<br class="">-; AVX-NEXT: shlb $7, %dil<br class="">-; AVX-NEXT: movb %cl, %al<br class="">-; AVX-NEXT: shlb $5, %al<br class="">-; AVX-NEXT: andb $64, %al<br class="">-; AVX-NEXT: movb %cl, %dl<br class="">-; AVX-NEXT: shlb $3, %dl<br class="">-; AVX-NEXT: andb $32, %dl<br class="">-; AVX-NEXT: orb %al, %dl<br class="">-; AVX-NEXT: movb %cl, %al<br class="">-; AVX-NEXT: addb %al, %al<br class="">-; AVX-NEXT: andb $16, %al<br class="">-; AVX-NEXT: orb %dl, %al<br class="">-; AVX-NEXT: movb %cl, %dl<br class="">-; AVX-NEXT: shrb %dl<br class="">-; AVX-NEXT: andb $8, %dl<br class="">-; AVX-NEXT: orb %al, %dl<br class="">-; AVX-NEXT: movb %cl, %al<br class="">-; AVX-NEXT: shrb $3, %al<br class="">-; AVX-NEXT: andb $4, %al<br class="">-; AVX-NEXT: orb %dl, %al<br class="">-; AVX-NEXT: movb %cl, %dl<br class="">-; AVX-NEXT: shrb $5, %dl<br class="">-; AVX-NEXT: andb $2, %dl<br class="">-; AVX-NEXT: orb %al, %dl<br class="">-; AVX-NEXT: shrb $7, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: orb %dil, %cl<br class="">-; AVX-NEXT: movzbl %cl, %eax<br class="">-; AVX-NEXT: vmovd %eax, %xmm1<br class="">-; AVX-NEXT: vpinsrb $1, %esi, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $2, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $3, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $4, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $5, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $6, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $7, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $8, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $9, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $10, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $11, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $12, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $13, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $14, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrb $15, %xmm0, %eax<br class="">-; AVX-NEXT: movb %al, %sil<br class="">-; AVX-NEXT: shlb $7, %sil<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shlb $5, %dl<br class="">-; AVX-NEXT: andb $64, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shlb $3, %cl<br class="">-; AVX-NEXT: andb $32, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: addb %dl, %dl<br class="">-; AVX-NEXT: andb $16, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb %cl<br class="">-; AVX-NEXT: andb $8, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: movb %al, %dl<br class="">-; AVX-NEXT: shrb $3, %dl<br class="">-; AVX-NEXT: andb $4, %dl<br class="">-; AVX-NEXT: orb %cl, %dl<br class="">-; AVX-NEXT: movb %al, %cl<br class="">-; AVX-NEXT: shrb $5, %cl<br class="">-; AVX-NEXT: andb $2, %cl<br class="">-; AVX-NEXT: orb %dl, %cl<br class="">-; AVX-NEXT: shrb $7, %al<br class="">-; AVX-NEXT: orb %cl, %al<br class="">-; AVX-NEXT: orb %sil, %al<br class="">-; AVX-NEXT: movzbl %al, %eax<br class="">-; AVX-NEXT: vpinsrb $15, %eax, %xmm1, %xmm0<br class="">+; AVX-NEXT: vpsrlw $7, %xmm0, %xmm1<br class="">+; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]<br class="">+; AVX-NEXT: vpand %xmm2, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpand %xmm2, %xmm1, %xmm1<br class="">+; AVX-NEXT: vpsllw $7, %xmm0, %xmm2<br class="">+; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]<br class="">+; AVX-NEXT: vpand %xmm3, %xmm3, %xmm3<br class="">+; AVX-NEXT: vpand %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsllw $5, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpsllw $3, %xmm0, %xmm4<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4<br class="">+; AVX-NEXT: vpor %xmm4, %xmm3, %xmm3<br class="">+; AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm4<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4<br class="">+; AVX-NEXT: vpor %xmm4, %xmm3, %xmm3<br class="">+; AVX-NEXT: vpsrlw $1, %xmm0, %xmm4<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4<br class="">+; AVX-NEXT: vpor %xmm4, %xmm3, %xmm3<br class="">+; AVX-NEXT: vpsrlw $3, %xmm0, %xmm4<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4<br class="">+; AVX-NEXT: vpor %xmm4, %xmm3, %xmm3<br class="">+; AVX-NEXT: vpsrlw $5, %xmm0, %xmm0<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0<br class="">+; AVX-NEXT: vpor %xmm0, %xmm3, %xmm0<br class="">+; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0<br class="">+; AVX-NEXT: vpor %xmm0, %xmm2, %xmm0<br class=""> ; AVX-NEXT: retq<br class=""> ;<br class=""> ; XOP-LABEL: test_bitreverse_v16i8:<br class="">@@ -2044,995 +1099,119 @@ define <16 x i8> @test_bitreverse_v16i8(<br class=""> define <8 x i16> @test_bitreverse_v8i16(<8 x i16> %a) nounwind {<br class=""> ; SSE-LABEL: test_bitreverse_v8i16:<br class=""> ; SSE: # BB#0:<br class="">-; SSE-NEXT: pextrw $7, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: pextrw $3, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]<br class="">-; SSE-NEXT: pextrw $5, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: pextrw $1, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]<br class="">-; SSE-NEXT: pextrw $6, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: pextrw $2, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]<br class="">-; SSE-NEXT: pextrw $4, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: movd %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: andl $32768, %eax # imm = 0x8000<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psllw $13, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm1<br class="">+; SSE-NEXT: psllw $15, %xmm1<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm1<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psllw $11, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psllw $9, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psllw $7, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psllw $5, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psllw $3, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psllw $1, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrlw $1, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrlw $3, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrlw $5, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrlw $7, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrlw $9, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrlw $11, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrlw $13, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: psrlw $15, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm3, %xmm0<br class="">+; SSE-NEXT: por %xmm1, %xmm0<br class=""> ; SSE-NEXT: retq<br class=""> ;<br class=""> ; AVX-LABEL: test_bitreverse_v8i16:<br class=""> ; AVX: # BB#0:<br class="">-; AVX-NEXT: vpextrw $1, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $15, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $13, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $11, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $9, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $7, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $5, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $3, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $15, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vmovd %xmm0, %ecx<br class="">-; AVX-NEXT: movl %ecx, %edx<br class="">-; AVX-NEXT: shll $15, %edx<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: andl $2, %esi<br class="">-; AVX-NEXT: shll $13, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %ecx, %edx<br class="">-; AVX-NEXT: andl $4, %edx<br class="">-; AVX-NEXT: shll $11, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: andl $8, %esi<br class="">-; AVX-NEXT: shll $9, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: andl $16, %edi<br class="">-; AVX-NEXT: shll $7, %edi<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: shll $5, %edx<br class="">-; AVX-NEXT: orl %edi, %edx<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: shll $3, %esi<br class="">-; AVX-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl %esi<br class="">-; AVX-NEXT: andl $128, %esi<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $3, %edi<br class="">-; AVX-NEXT: andl $64, %edi<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $5, %esi<br class="">-; AVX-NEXT: andl $32, %esi<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $7, %edi<br class="">-; AVX-NEXT: andl $16, %edi<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $9, %esi<br class="">-; AVX-NEXT: andl $8, %esi<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $11, %edi<br class="">-; AVX-NEXT: andl $4, %edi<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $13, %esi<br class="">-; AVX-NEXT: andl $2, %esi<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: andl $32768, %ecx # imm = 0x8000<br class="">-; AVX-NEXT: shrl $15, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: vmovd %ecx, %xmm1<br class="">-; AVX-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrw $2, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $15, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $13, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $11, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $9, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $7, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $5, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $3, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $15, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vpinsrw $2, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrw $3, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $15, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $13, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $11, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $9, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $7, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $5, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $3, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $15, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vpinsrw $3, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrw $4, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $15, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $13, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $11, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $9, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $7, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $5, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $3, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $15, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vpinsrw $4, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrw $5, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $15, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $13, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $11, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $9, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $7, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $5, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $3, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $15, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vpinsrw $5, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrw $6, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $15, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $13, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $11, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $9, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $7, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $5, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $3, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $15, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrw $7, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $15, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $13, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $11, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $9, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $7, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $5, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $3, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $15, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vpinsrw $7, %eax, %xmm1, %xmm0<br class="">+; AVX-NEXT: vpsllw $13, %xmm0, %xmm1<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm2<br class="">+; AVX-NEXT: vpsllw $15, %xmm0, %xmm1<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1<br class="">+; AVX-NEXT: vpsllw $11, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsllw $9, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsllw $7, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsllw $5, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsllw $3, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsllw $1, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsrlw $1, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsrlw $3, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsrlw $5, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsrlw $7, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsrlw $9, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsrlw $11, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsrlw $13, %xmm0, %xmm3<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX-NEXT: vpsrlw $15, %xmm0, %xmm0<br class="">+; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0<br class="">+; AVX-NEXT: vpor %xmm0, %xmm2, %xmm0<br class="">+; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0<br class=""> ; AVX-NEXT: retq<br class=""> ;<br class=""> ; XOP-LABEL: test_bitreverse_v8i16:<br class="">@@ -3046,1010 +1225,363 @@ define <8 x i16> @test_bitreverse_v8i16(<br class=""> define <4 x i32> @test_bitreverse_v4i32(<4 x i32> %a) nounwind {<br class=""> ; SSE-LABEL: test_bitreverse_v4i32:<br class=""> ; SSE: # BB#0:<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3]<br class="">-; SSE-NEXT: movd %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3]<br class="">-; SSE-NEXT: movd %xmm2, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br class="">-; SSE-NEXT: movd %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]<br class="">-; SSE-NEXT: movd %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]<br class="">-; SSE-NEXT: movdqa %xmm1, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: pslld $29, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm1<br class="">+; SSE-NEXT: pslld $31, %xmm1<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm1<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: pslld $27, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: pslld $25, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: pslld $23, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: pslld $21, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: pslld $19, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: pslld $17, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: pslld $15, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: pslld $13, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: pslld $11, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: pslld $9, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: pslld $7, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: pslld $5, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: pslld $3, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: pslld $1, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrld $1, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrld $3, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrld $5, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrld $7, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrld $9, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrld $11, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrld $13, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrld $15, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrld $17, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrld $19, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrld $21, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrld $23, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrld $25, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psrld $27, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrld $29, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: psrld $31, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm3, %xmm0<br class="">+; SSE-NEXT: por %xmm1, %xmm0<br class=""> ; SSE-NEXT: retq<br class=""> ;<br class="">-; AVX-LABEL: test_bitreverse_v4i32:<br class="">-; AVX: # BB#0:<br class="">-; AVX-NEXT: vpextrd $1, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $31, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $29, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $27, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $25, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $23, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $21, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $19, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $17, %esi<br class="">-; AVX-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $15, %edx<br class="">-; AVX-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $13, %esi<br class="">-; AVX-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $11, %edx<br class="">-; AVX-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $9, %esi<br class="">-; AVX-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $7, %edx<br class="">-; AVX-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $5, %esi<br class="">-; AVX-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: leal (,%rax,8), %edx<br class="">-; AVX-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $15, %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $17, %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $19, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $21, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $23, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $25, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $27, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $29, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $31, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vmovd %xmm0, %ecx<br class="">-; AVX-NEXT: movl %ecx, %edx<br class="">-; AVX-NEXT: shll $31, %edx<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: andl $2, %esi<br class="">-; AVX-NEXT: shll $29, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %ecx, %edx<br class="">-; AVX-NEXT: andl $4, %edx<br class="">-; AVX-NEXT: shll $27, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: andl $8, %esi<br class="">-; AVX-NEXT: shll $25, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: andl $16, %edi<br class="">-; AVX-NEXT: shll $23, %edi<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: shll $21, %edx<br class="">-; AVX-NEXT: orl %edi, %edx<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: shll $19, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shll $17, %edi<br class="">-; AVX-NEXT: andl $16777216, %edi # imm = 0x1000000<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shll $15, %esi<br class="">-; AVX-NEXT: andl $8388608, %esi # imm = 0x800000<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shll $13, %edi<br class="">-; AVX-NEXT: andl $4194304, %edi # imm = 0x400000<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shll $11, %esi<br class="">-; AVX-NEXT: andl $2097152, %esi # imm = 0x200000<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shll $9, %edi<br class="">-; AVX-NEXT: andl $1048576, %edi # imm = 0x100000<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shll $7, %esi<br class="">-; AVX-NEXT: andl $524288, %esi # imm = 0x80000<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shll $5, %edi<br class="">-; AVX-NEXT: andl $262144, %edi # imm = 0x40000<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: leal (,%rcx,8), %esi<br class="">-; AVX-NEXT: andl $131072, %esi # imm = 0x20000<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX-NEXT: andl $65536, %edi # imm = 0x10000<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl %esi<br class="">-; AVX-NEXT: andl $32768, %esi # imm = 0x8000<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $3, %edi<br class="">-; AVX-NEXT: andl $16384, %edi # imm = 0x4000<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $5, %esi<br class="">-; AVX-NEXT: andl $8192, %esi # imm = 0x2000<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $7, %edi<br class="">-; AVX-NEXT: andl $4096, %edi # imm = 0x1000<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $9, %esi<br class="">-; AVX-NEXT: andl $2048, %esi # imm = 0x800<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $11, %edi<br class="">-; AVX-NEXT: andl $1024, %edi # imm = 0x400<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $13, %esi<br class="">-; AVX-NEXT: andl $512, %esi # imm = 0x200<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $15, %edi<br class="">-; AVX-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $17, %esi<br class="">-; AVX-NEXT: andl $128, %esi<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $19, %edi<br class="">-; AVX-NEXT: andl $64, %edi<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $21, %esi<br class="">-; AVX-NEXT: andl $32, %esi<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $23, %edi<br class="">-; AVX-NEXT: andl $16, %edi<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $25, %esi<br class="">-; AVX-NEXT: andl $8, %esi<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: movl %ecx, %edi<br class="">-; AVX-NEXT: shrl $27, %edi<br class="">-; AVX-NEXT: andl $4, %edi<br class="">-; AVX-NEXT: orl %esi, %edi<br class="">-; AVX-NEXT: movl %ecx, %esi<br class="">-; AVX-NEXT: shrl $29, %esi<br class="">-; AVX-NEXT: andl $2, %esi<br class="">-; AVX-NEXT: orl %edi, %esi<br class="">-; AVX-NEXT: shrl $31, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: vmovd %ecx, %xmm1<br class="">-; AVX-NEXT: vpinsrd $1, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrd $2, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $31, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $29, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $27, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $25, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $23, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $21, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $19, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $17, %esi<br class="">-; AVX-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $15, %edx<br class="">-; AVX-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $13, %esi<br class="">-; AVX-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $11, %edx<br class="">-; AVX-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $9, %esi<br class="">-; AVX-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $7, %edx<br class="">-; AVX-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $5, %esi<br class="">-; AVX-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: leal (,%rax,8), %edx<br class="">-; AVX-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $15, %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $17, %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $19, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $21, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $23, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $25, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $27, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $29, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $31, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vpinsrd $2, %eax, %xmm1, %xmm1<br class="">-; AVX-NEXT: vpextrd $3, %xmm0, %eax<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: shll $31, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: shll $29, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $4, %ecx<br class="">-; AVX-NEXT: shll $27, %ecx<br class="">-; AVX-NEXT: orl %edx, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: shll $25, %edx<br class="">-; AVX-NEXT: orl %ecx, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: shll $23, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %ecx<br class="">-; AVX-NEXT: andl $32, %ecx<br class="">-; AVX-NEXT: shll $21, %ecx<br class="">-; AVX-NEXT: orl %esi, %ecx<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: andl $64, %edx<br class="">-; AVX-NEXT: shll $19, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $17, %esi<br class="">-; AVX-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $15, %edx<br class="">-; AVX-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $13, %esi<br class="">-; AVX-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $11, %edx<br class="">-; AVX-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $9, %esi<br class="">-; AVX-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shll $7, %edx<br class="">-; AVX-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shll $5, %esi<br class="">-; AVX-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: leal (,%rax,8), %edx<br class="">-; AVX-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl %edx<br class="">-; AVX-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $3, %esi<br class="">-; AVX-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $5, %edx<br class="">-; AVX-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $7, %esi<br class="">-; AVX-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $9, %edx<br class="">-; AVX-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $11, %esi<br class="">-; AVX-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $13, %edx<br class="">-; AVX-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $15, %esi<br class="">-; AVX-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $17, %edx<br class="">-; AVX-NEXT: andl $128, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $19, %esi<br class="">-; AVX-NEXT: andl $64, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $21, %edx<br class="">-; AVX-NEXT: andl $32, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $23, %esi<br class="">-; AVX-NEXT: andl $16, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $25, %edx<br class="">-; AVX-NEXT: andl $8, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: movl %eax, %esi<br class="">-; AVX-NEXT: shrl $27, %esi<br class="">-; AVX-NEXT: andl $4, %esi<br class="">-; AVX-NEXT: orl %edx, %esi<br class="">-; AVX-NEXT: movl %eax, %edx<br class="">-; AVX-NEXT: shrl $29, %edx<br class="">-; AVX-NEXT: andl $2, %edx<br class="">-; AVX-NEXT: orl %esi, %edx<br class="">-; AVX-NEXT: shrl $31, %eax<br class="">-; AVX-NEXT: orl %edx, %eax<br class="">-; AVX-NEXT: orl %ecx, %eax<br class="">-; AVX-NEXT: vpinsrd $3, %eax, %xmm1, %xmm0<br class="">-; AVX-NEXT: retq<br class="">+; AVX1-LABEL: test_bitreverse_v4i32:<br class="">+; AVX1: # BB#0:<br class="">+; AVX1-NEXT: vpslld $29, %xmm0, %xmm1<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm2<br class="">+; AVX1-NEXT: vpslld $31, %xmm0, %xmm1<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1<br class="">+; AVX1-NEXT: vpslld $27, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $25, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $23, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $21, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $19, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $17, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $15, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $13, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $11, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $9, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $7, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $5, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $3, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpslld $1, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $1, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $3, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $5, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $7, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $9, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $11, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $13, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $15, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $17, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $19, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $21, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $23, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $25, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $27, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $29, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsrld $31, %xmm0, %xmm0<br class="">+; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0<br class="">+; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0<br class="">+; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0<br class="">+; AVX1-NEXT: retq<br class="">+;<br class="">+; AVX2-LABEL: test_bitreverse_v4i32:<br class="">+; AVX2: # BB#0:<br class="">+; AVX2-NEXT: vpslld $29, %xmm0, %xmm1<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2<br class="">+; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm2<br class="">+; AVX2-NEXT: vpslld $31, %xmm0, %xmm1<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm3<br class="">+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm1<br class="">+; AVX2-NEXT: vpslld $27, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $25, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $23, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $21, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $19, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $17, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $15, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $13, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $11, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $9, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $7, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $5, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $3, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpslld $1, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $1, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $3, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $5, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $7, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $9, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $11, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $13, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $15, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $17, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $19, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $21, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $23, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $25, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $27, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $29, %xmm0, %xmm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm4<br class="">+; AVX2-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2<br class="">+; AVX2-NEXT: vpsrld $31, %xmm0, %xmm0<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm3<br class="">+; AVX2-NEXT: vpand %xmm3, %xmm0, %xmm0<br class="">+; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0<br class="">+; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0<br class="">+; AVX2-NEXT: retq<br class=""> ;<br class=""> ; XOP-LABEL: test_bitreverse_v4i32:<br class=""> ; XOP: # BB#0:<br class="">@@ -4524,3034 +2056,182 @@ define <2 x i64> @test_bitreverse_v2i64(<br class=""> define <32 x i8> @test_bitreverse_v32i8(<32 x i8> %a) nounwind {<br class=""> ; SSE-LABEL: test_bitreverse_v32i8:<br class=""> ; SSE: # BB#0:<br class="">-; SSE-NEXT: pushq %rbp<br class="">-; SSE-NEXT: pushq %r15<br class="">-; SSE-NEXT: pushq %r14<br class="">-; SSE-NEXT: pushq %rbx<br class="">-; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)<br class="">-; SSE-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %cl<br class="">-; SSE-NEXT: movb %cl, %bl<br class="">-; SSE-NEXT: shlb $7, %bl<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shlb $5, %dl<br class="">-; SSE-NEXT: andb $64, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: addb %dl, %dl<br class="">-; SSE-NEXT: andb $16, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shrb $3, %dl<br class="">-; SSE-NEXT: andb $4, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: shrb $7, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movzbl %cl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r10b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r14b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dil<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r11b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r9b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %bpl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %sil<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb %dl, %r8b<br class="">-; SSE-NEXT: shlb $7, %r8b<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $5, %bl<br class="">-; SSE-NEXT: andb $64, %bl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %bl, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: orb %r8b, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %r11b<br class="">-; SSE-NEXT: orb %dl, %r11b<br class="">-; SSE-NEXT: orb %al, %r11b<br class="">-; SSE-NEXT: movzbl %r11b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r11b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r8b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %bl<br class="">-; SSE-NEXT: movb %bl, %r15b<br class="">-; SSE-NEXT: shlb $7, %r15b<br class="">-; SSE-NEXT: movb %bl, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %bl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: movb %bl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %bl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: movb %bl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %bl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: shrb $7, %bl<br class="">-; SSE-NEXT: orb %al, %bl<br class="">-; SSE-NEXT: orb %r15b, %bl<br class="">-; SSE-NEXT: movzbl %bl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]<br class="">-; SSE-NEXT: movb %r14b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shlb $3, %bl<br class="">-; SSE-NEXT: andb $32, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shrb %bl<br class="">-; SSE-NEXT: andb $8, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shrb $5, %bl<br class="">-; SSE-NEXT: andb $2, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: shrb $7, %r14b<br class="">-; SSE-NEXT: orb %bl, %r14b<br class="">-; SSE-NEXT: orb %al, %r14b<br class="">-; SSE-NEXT: movzbl %r14b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $3, %bl<br class="">-; SSE-NEXT: andb $32, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb %bl<br class="">-; SSE-NEXT: andb $8, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb $5, %bl<br class="">-; SSE-NEXT: andb $2, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %bl, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %bpl<br class="">-; SSE-NEXT: orb %dl, %bpl<br class="">-; SSE-NEXT: orb %al, %bpl<br class="">-; SSE-NEXT: movzbl %bpl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %bpl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $5, %bl<br class="">-; SSE-NEXT: andb $64, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shlb $3, %cl<br class="">-; SSE-NEXT: andb $32, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: addb %bl, %bl<br class="">-; SSE-NEXT: andb $16, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb %cl<br class="">-; SSE-NEXT: andb $8, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb $3, %bl<br class="">-; SSE-NEXT: andb $4, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $5, %cl<br class="">-; SSE-NEXT: andb $2, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]<br class="">-; SSE-NEXT: movb %r10b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r10b<br class="">-; SSE-NEXT: orb %dl, %r10b<br class="">-; SSE-NEXT: orb %cl, %r10b<br class="">-; SSE-NEXT: movzbl %r10b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r11b<br class="">-; SSE-NEXT: orb %dl, %r11b<br class="">-; SSE-NEXT: orb %cl, %r11b<br class="">-; SSE-NEXT: movzbl %r11b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]<br class="">-; SSE-NEXT: movb %r9b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r9b<br class="">-; SSE-NEXT: orb %dl, %r9b<br class="">-; SSE-NEXT: orb %cl, %r9b<br class="">-; SSE-NEXT: movzbl %r9b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %bpl<br class="">-; SSE-NEXT: orb %dl, %bpl<br class="">-; SSE-NEXT: orb %cl, %bpl<br class="">-; SSE-NEXT: movzbl %bpl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]<br class="">-; SSE-NEXT: movb %dil, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %dil<br class="">-; SSE-NEXT: orb %dl, %dil<br class="">-; SSE-NEXT: orb %al, %dil<br class="">-; SSE-NEXT: movzbl %dil, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: movb %r8b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %r8b<br class="">-; SSE-NEXT: orb %dl, %r8b<br class="">-; SSE-NEXT: orb %al, %r8b<br class="">-; SSE-NEXT: movzbl %r8b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]<br class="">-; SSE-NEXT: movb %sil, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %sil<br class="">-; SSE-NEXT: orb %dl, %sil<br class="">-; SSE-NEXT: orb %al, %sil<br class="">-; SSE-NEXT: movzbl %sil, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %cl<br class="">-; SSE-NEXT: movb %cl, %bl<br class="">-; SSE-NEXT: shlb $7, %bl<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shlb $5, %dl<br class="">-; SSE-NEXT: andb $64, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: addb %dl, %dl<br class="">-; SSE-NEXT: andb $16, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shrb $3, %dl<br class="">-; SSE-NEXT: andb $4, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: shrb $7, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movzbl %cl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %cl<br class="">-; SSE-NEXT: movb %cl, %bl<br class="">-; SSE-NEXT: shlb $7, %bl<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shlb $5, %dl<br class="">-; SSE-NEXT: andb $64, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: addb %dl, %dl<br class="">-; SSE-NEXT: andb $16, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shrb $3, %dl<br class="">-; SSE-NEXT: andb $4, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: shrb $7, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movzbl %cl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r10b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r14b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dil<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r11b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r9b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %bpl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %sil<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb %dl, %r8b<br class="">-; SSE-NEXT: shlb $7, %r8b<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $3, %bl<br class="">-; SSE-NEXT: andb $32, %bl<br class="">-; SSE-NEXT: orb %al, %bl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %bl, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb %cl<br class="">-; SSE-NEXT: andb $8, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %cl, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $5, %cl<br class="">-; SSE-NEXT: andb $2, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: orb %r8b, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %r11b<br class="">-; SSE-NEXT: orb %dl, %r11b<br class="">-; SSE-NEXT: orb %al, %r11b<br class="">-; SSE-NEXT: movzbl %r11b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r11b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %r8b<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %al<br class="">-; SSE-NEXT: movb %al, %r15b<br class="">-; SSE-NEXT: shlb $7, %r15b<br class="">-; SSE-NEXT: movb %al, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %al, %bl<br class="">-; SSE-NEXT: shlb $3, %bl<br class="">-; SSE-NEXT: andb $32, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %al, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %al, %bl<br class="">-; SSE-NEXT: shrb %bl<br class="">-; SSE-NEXT: andb $8, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %al, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %al, %bl<br class="">-; SSE-NEXT: shrb $5, %bl<br class="">-; SSE-NEXT: andb $2, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: shrb $7, %al<br class="">-; SSE-NEXT: orb %bl, %al<br class="">-; SSE-NEXT: orb %r15b, %al<br class="">-; SSE-NEXT: movzbl %al, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]<br class="">-; SSE-NEXT: movb %r14b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shlb $3, %bl<br class="">-; SSE-NEXT: andb $32, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shrb %bl<br class="">-; SSE-NEXT: andb $8, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %r14b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %r14b, %bl<br class="">-; SSE-NEXT: shrb $5, %bl<br class="">-; SSE-NEXT: andb $2, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: shrb $7, %r14b<br class="">-; SSE-NEXT: orb %bl, %r14b<br class="">-; SSE-NEXT: orb %al, %r14b<br class="">-; SSE-NEXT: movzbl %r14b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $3, %bl<br class="">-; SSE-NEXT: andb $32, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb %bl<br class="">-; SSE-NEXT: andb $8, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb $5, %bl<br class="">-; SSE-NEXT: andb $2, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %bl, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %bpl<br class="">-; SSE-NEXT: orb %dl, %bpl<br class="">-; SSE-NEXT: orb %al, %bpl<br class="">-; SSE-NEXT: movzbl %bpl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %bpl<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %dl<br class="">-; SSE-NEXT: movb %dl, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shlb $5, %bl<br class="">-; SSE-NEXT: andb $64, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shlb $3, %cl<br class="">-; SSE-NEXT: andb $32, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: addb %bl, %bl<br class="">-; SSE-NEXT: andb $16, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb %cl<br class="">-; SSE-NEXT: andb $8, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movb %dl, %bl<br class="">-; SSE-NEXT: shrb $3, %bl<br class="">-; SSE-NEXT: andb $4, %bl<br class="">-; SSE-NEXT: orb %cl, %bl<br class="">-; SSE-NEXT: movb %dl, %cl<br class="">-; SSE-NEXT: shrb $5, %cl<br class="">-; SSE-NEXT: andb $2, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: shrb $7, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movzbl %dl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]<br class="">-; SSE-NEXT: movb %r10b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r10b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r10b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r10b<br class="">-; SSE-NEXT: orb %dl, %r10b<br class="">-; SSE-NEXT: orb %cl, %r10b<br class="">-; SSE-NEXT: movzbl %r10b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: movb %r11b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r11b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r11b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r11b<br class="">-; SSE-NEXT: orb %dl, %r11b<br class="">-; SSE-NEXT: orb %cl, %r11b<br class="">-; SSE-NEXT: movzbl %r11b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]<br class="">-; SSE-NEXT: movb %r9b, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %r9b, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %r9b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %r9b<br class="">-; SSE-NEXT: orb %dl, %r9b<br class="">-; SSE-NEXT: orb %cl, %r9b<br class="">-; SSE-NEXT: movzbl %r9b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: movb %bpl, %cl<br class="">-; SSE-NEXT: shlb $7, %cl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shlb $5, %al<br class="">-; SSE-NEXT: andb $64, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: addb %al, %al<br class="">-; SSE-NEXT: andb $16, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %bpl, %al<br class="">-; SSE-NEXT: shrb $3, %al<br class="">-; SSE-NEXT: andb $4, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %bpl, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: shrb $7, %bpl<br class="">-; SSE-NEXT: orb %dl, %bpl<br class="">-; SSE-NEXT: orb %cl, %bpl<br class="">-; SSE-NEXT: movzbl %bpl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]<br class="">-; SSE-NEXT: movb %dil, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %dil, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %dil, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %dil<br class="">-; SSE-NEXT: orb %dl, %dil<br class="">-; SSE-NEXT: orb %al, %dil<br class="">-; SSE-NEXT: movzbl %dil, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: movb %r8b, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %r8b, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %r8b, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %r8b<br class="">-; SSE-NEXT: orb %dl, %r8b<br class="">-; SSE-NEXT: orb %al, %r8b<br class="">-; SSE-NEXT: movzbl %r8b, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7]<br class="">-; SSE-NEXT: movb %sil, %al<br class="">-; SSE-NEXT: shlb $7, %al<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: shlb $5, %cl<br class="">-; SSE-NEXT: andb $64, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shlb $3, %dl<br class="">-; SSE-NEXT: andb $32, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: addb %cl, %cl<br class="">-; SSE-NEXT: andb $16, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shrb %dl<br class="">-; SSE-NEXT: andb $8, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: movb %sil, %cl<br class="">-; SSE-NEXT: shrb $3, %cl<br class="">-; SSE-NEXT: andb $4, %cl<br class="">-; SSE-NEXT: orb %dl, %cl<br class="">-; SSE-NEXT: movb %sil, %dl<br class="">-; SSE-NEXT: shrb $5, %dl<br class="">-; SSE-NEXT: andb $2, %dl<br class="">-; SSE-NEXT: orb %cl, %dl<br class="">-; SSE-NEXT: shrb $7, %sil<br class="">-; SSE-NEXT: orb %dl, %sil<br class="">-; SSE-NEXT: orb %al, %sil<br class="">-; SSE-NEXT: movzbl %sil, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm5<br class="">-; SSE-NEXT: movb -{{[0-9]+}}(%rsp), %cl<br class="">-; SSE-NEXT: movb %cl, %bl<br class="">-; SSE-NEXT: shlb $7, %bl<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shlb $5, %dl<br class="">-; SSE-NEXT: andb $64, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shlb $3, %al<br class="">-; SSE-NEXT: andb $32, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: addb %dl, %dl<br class="">-; SSE-NEXT: andb $16, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb %al<br class="">-; SSE-NEXT: andb $8, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: movb %cl, %dl<br class="">-; SSE-NEXT: shrb $3, %dl<br class="">-; SSE-NEXT: andb $4, %dl<br class="">-; SSE-NEXT: orb %al, %dl<br class="">-; SSE-NEXT: movb %cl, %al<br class="">-; SSE-NEXT: shrb $5, %al<br class="">-; SSE-NEXT: andb $2, %al<br class="">-; SSE-NEXT: orb %dl, %al<br class="">-; SSE-NEXT: shrb $7, %cl<br class="">-; SSE-NEXT: orb %al, %cl<br class="">-; SSE-NEXT: orb %bl, %cl<br class="">-; SSE-NEXT: movzbl %cl, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm5[0],xmm1[1],xmm5[1],xmm1[2],xmm5[2],xmm1[3],xmm5[3],xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]<br class="">-; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]<br class="">-; SSE-NEXT: popq %rbx<br class="">-; SSE-NEXT: popq %r14<br class="">-; SSE-NEXT: popq %r15<br class="">-; SSE-NEXT: popq %rbp<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: psllw $5, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm9 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm9<br class="">+; SSE-NEXT: pand %xmm9, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm5<br class="">+; SSE-NEXT: psllw $7, %xmm5<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm10 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]<br class="">+; SSE-NEXT: pand %xmm10, %xmm10<br class="">+; SSE-NEXT: pand %xmm10, %xmm5<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psllw $3, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm11 = [32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm11<br class="">+; SSE-NEXT: pand %xmm11, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">+; SSE-NEXT: paddb %xmm2, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm8 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]<br class="">+; SSE-NEXT: pand %xmm8, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm3<br class="">+; SSE-NEXT: psrlw $1, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm12 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm12<br class="">+; SSE-NEXT: pand %xmm12, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm4<br class="">+; SSE-NEXT: psrlw $3, %xmm4<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm6 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm6<br class="">+; SSE-NEXT: pand %xmm6, %xmm4<br class="">+; SSE-NEXT: por %xmm3, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm7<br class="">+; SSE-NEXT: psrlw $5, %xmm7<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: pand %xmm2, %xmm7<br class="">+; SSE-NEXT: por %xmm4, %xmm7<br class="">+; SSE-NEXT: psrlw $7, %xmm0<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]<br class="">+; SSE-NEXT: pand %xmm3, %xmm3<br class="">+; SSE-NEXT: pand %xmm3, %xmm0<br class="">+; SSE-NEXT: por %xmm7, %xmm0<br class="">+; SSE-NEXT: por %xmm5, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm4<br class="">+; SSE-NEXT: psllw $5, %xmm4<br class="">+; SSE-NEXT: pand %xmm9, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm5<br class="">+; SSE-NEXT: psllw $7, %xmm5<br class="">+; SSE-NEXT: pand %xmm10, %xmm5<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm7<br class="">+; SSE-NEXT: psllw $3, %xmm7<br class="">+; SSE-NEXT: pand %xmm11, %xmm7<br class="">+; SSE-NEXT: por %xmm4, %xmm7<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm4<br class="">+; SSE-NEXT: paddb %xmm4, %xmm4<br class="">+; SSE-NEXT: pand %xmm8, %xmm4<br class="">+; SSE-NEXT: por %xmm7, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm7<br class="">+; SSE-NEXT: psrlw $1, %xmm7<br class="">+; SSE-NEXT: pand %xmm12, %xmm7<br class="">+; SSE-NEXT: por %xmm4, %xmm7<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm4<br class="">+; SSE-NEXT: psrlw $3, %xmm4<br class="">+; SSE-NEXT: pand %xmm6, %xmm4<br class="">+; SSE-NEXT: por %xmm7, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm6<br class="">+; SSE-NEXT: psrlw $5, %xmm6<br class="">+; SSE-NEXT: pand %xmm2, %xmm6<br class="">+; SSE-NEXT: por %xmm4, %xmm6<br class="">+; SSE-NEXT: psrlw $7, %xmm1<br class="">+; SSE-NEXT: pand %xmm3, %xmm1<br class="">+; SSE-NEXT: por %xmm6, %xmm1<br class="">+; SSE-NEXT: por %xmm5, %xmm1<br class=""> ; SSE-NEXT: retq<br class=""> ;<br class=""> ; AVX1-LABEL: test_bitreverse_v32i8:<br class=""> ; AVX1: # BB#0:<br class=""> ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1<br class="">-; AVX1-NEXT: vpextrb $1, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %esi<br class="">-; AVX1-NEXT: vpextrb $0, %xmm1, %ecx<br class="">-; AVX1-NEXT: movb %cl, %dil<br class="">-; AVX1-NEXT: shlb $7, %dil<br class="">-; AVX1-NEXT: movb %cl, %al<br class="">-; AVX1-NEXT: shlb $5, %al<br class="">-; AVX1-NEXT: andb $64, %al<br class="">-; AVX1-NEXT: movb %cl, %dl<br class="">-; AVX1-NEXT: shlb $3, %dl<br class="">-; AVX1-NEXT: andb $32, %dl<br class="">-; AVX1-NEXT: orb %al, %dl<br class="">-; AVX1-NEXT: movb %cl, %al<br class="">-; AVX1-NEXT: addb %al, %al<br class="">-; AVX1-NEXT: andb $16, %al<br class="">-; AVX1-NEXT: orb %dl, %al<br class="">-; AVX1-NEXT: movb %cl, %dl<br class="">-; AVX1-NEXT: shrb %dl<br class="">-; AVX1-NEXT: andb $8, %dl<br class="">-; AVX1-NEXT: orb %al, %dl<br class="">-; AVX1-NEXT: movb %cl, %al<br class="">-; AVX1-NEXT: shrb $3, %al<br class="">-; AVX1-NEXT: andb $4, %al<br class="">-; AVX1-NEXT: orb %dl, %al<br class="">-; AVX1-NEXT: movb %cl, %dl<br class="">-; AVX1-NEXT: shrb $5, %dl<br class="">-; AVX1-NEXT: andb $2, %dl<br class="">-; AVX1-NEXT: orb %al, %dl<br class="">-; AVX1-NEXT: shrb $7, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: orb %dil, %cl<br class="">-; AVX1-NEXT: movzbl %cl, %eax<br class="">-; AVX1-NEXT: vmovd %eax, %xmm2<br class="">-; AVX1-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $2, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $3, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $4, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $5, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $6, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $7, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $8, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $9, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $10, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $11, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $12, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $13, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $14, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $15, %xmm1, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1<br class="">-; AVX1-NEXT: vpextrb $1, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %esi<br class="">-; AVX1-NEXT: vpextrb $0, %xmm0, %ecx<br class="">-; AVX1-NEXT: movb %cl, %dil<br class="">-; AVX1-NEXT: shlb $7, %dil<br class="">-; AVX1-NEXT: movb %cl, %al<br class="">-; AVX1-NEXT: shlb $5, %al<br class="">-; AVX1-NEXT: andb $64, %al<br class="">-; AVX1-NEXT: movb %cl, %dl<br class="">-; AVX1-NEXT: shlb $3, %dl<br class="">-; AVX1-NEXT: andb $32, %dl<br class="">-; AVX1-NEXT: orb %al, %dl<br class="">-; AVX1-NEXT: movb %cl, %al<br class="">-; AVX1-NEXT: addb %al, %al<br class="">-; AVX1-NEXT: andb $16, %al<br class="">-; AVX1-NEXT: orb %dl, %al<br class="">-; AVX1-NEXT: movb %cl, %dl<br class="">-; AVX1-NEXT: shrb %dl<br class="">-; AVX1-NEXT: andb $8, %dl<br class="">-; AVX1-NEXT: orb %al, %dl<br class="">-; AVX1-NEXT: movb %cl, %al<br class="">-; AVX1-NEXT: shrb $3, %al<br class="">-; AVX1-NEXT: andb $4, %al<br class="">-; AVX1-NEXT: orb %dl, %al<br class="">-; AVX1-NEXT: movb %cl, %dl<br class="">-; AVX1-NEXT: shrb $5, %dl<br class="">-; AVX1-NEXT: andb $2, %dl<br class="">-; AVX1-NEXT: orb %al, %dl<br class="">-; AVX1-NEXT: shrb $7, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: orb %dil, %cl<br class="">-; AVX1-NEXT: movzbl %cl, %eax<br class="">-; AVX1-NEXT: vmovd %eax, %xmm2<br class="">-; AVX1-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $2, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $3, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $4, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $5, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $6, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $7, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $8, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $9, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $10, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $11, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $12, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $13, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $14, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrb $15, %xmm0, %eax<br class="">-; AVX1-NEXT: movb %al, %sil<br class="">-; AVX1-NEXT: shlb $7, %sil<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shlb $5, %dl<br class="">-; AVX1-NEXT: andb $64, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shlb $3, %cl<br class="">-; AVX1-NEXT: andb $32, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: addb %dl, %dl<br class="">-; AVX1-NEXT: andb $16, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb %cl<br class="">-; AVX1-NEXT: andb $8, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: movb %al, %dl<br class="">-; AVX1-NEXT: shrb $3, %dl<br class="">-; AVX1-NEXT: andb $4, %dl<br class="">-; AVX1-NEXT: orb %cl, %dl<br class="">-; AVX1-NEXT: movb %al, %cl<br class="">-; AVX1-NEXT: shrb $5, %cl<br class="">-; AVX1-NEXT: andb $2, %cl<br class="">-; AVX1-NEXT: orb %dl, %cl<br class="">-; AVX1-NEXT: shrb $7, %al<br class="">-; AVX1-NEXT: orb %cl, %al<br class="">-; AVX1-NEXT: orb %sil, %al<br class="">-; AVX1-NEXT: movzbl %al, %eax<br class="">-; AVX1-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0<br class="">+; AVX1-NEXT: vpsllw $5, %xmm1, %xmm2<br class="">+; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [224,224,224,224,224,224,224,224,224,224,224,224,224,224,224,224]<br class="">+; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2<br class="">+; AVX1-NEXT: vpsllw $5, %xmm0, %xmm4<br class="">+; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm3<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsllw $7, %xmm1, %xmm3<br class="">+; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpsllw $7, %xmm0, %xmm5<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm2, %ymm3, %ymm2<br class="">+; AVX1-NEXT: vpsllw $3, %xmm1, %xmm3<br class="">+; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [248,248,248,248,248,248,248,248,248,248,248,248,248,248,248,248]<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpsllw $3, %xmm0, %xmm5<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpaddb %xmm0, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpaddb %xmm1, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $1, %xmm1, %xmm3<br class="">+; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm5<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $3, %xmm1, %xmm3<br class="">+; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31]<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $3, %xmm0, %xmm5<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $5, %xmm1, %xmm3<br class="">+; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $5, %xmm0, %xmm5<br class="">+; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $7, %xmm1, %xmm1<br class="">+; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]<br class="">+; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1<br class="">+; AVX1-NEXT: vpsrlw $7, %xmm0, %xmm0<br class="">+; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0<br class=""> ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0<br class="">+; AVX1-NEXT: vorps %ymm0, %ymm2, %ymm0<br class=""> ; AVX1-NEXT: retq<br class=""> ;<br class=""> ; AVX2-LABEL: test_bitreverse_v32i8:<br class=""> ; AVX2: # BB#0:<br class="">-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1<br class="">-; AVX2-NEXT: vpextrb $1, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %esi<br class="">-; AVX2-NEXT: vpextrb $0, %xmm1, %ecx<br class="">-; AVX2-NEXT: movb %cl, %dil<br class="">-; AVX2-NEXT: shlb $7, %dil<br class="">-; AVX2-NEXT: movb %cl, %al<br class="">-; AVX2-NEXT: shlb $5, %al<br class="">-; AVX2-NEXT: andb $64, %al<br class="">-; AVX2-NEXT: movb %cl, %dl<br class="">-; AVX2-NEXT: shlb $3, %dl<br class="">-; AVX2-NEXT: andb $32, %dl<br class="">-; AVX2-NEXT: orb %al, %dl<br class="">-; AVX2-NEXT: movb %cl, %al<br class="">-; AVX2-NEXT: addb %al, %al<br class="">-; AVX2-NEXT: andb $16, %al<br class="">-; AVX2-NEXT: orb %dl, %al<br class="">-; AVX2-NEXT: movb %cl, %dl<br class="">-; AVX2-NEXT: shrb %dl<br class="">-; AVX2-NEXT: andb $8, %dl<br class="">-; AVX2-NEXT: orb %al, %dl<br class="">-; AVX2-NEXT: movb %cl, %al<br class="">-; AVX2-NEXT: shrb $3, %al<br class="">-; AVX2-NEXT: andb $4, %al<br class="">-; AVX2-NEXT: orb %dl, %al<br class="">-; AVX2-NEXT: movb %cl, %dl<br class="">-; AVX2-NEXT: shrb $5, %dl<br class="">-; AVX2-NEXT: andb $2, %dl<br class="">-; AVX2-NEXT: orb %al, %dl<br class="">-; AVX2-NEXT: shrb $7, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: orb %dil, %cl<br class="">-; AVX2-NEXT: movzbl %cl, %eax<br class="">-; AVX2-NEXT: vmovd %eax, %xmm2<br class="">-; AVX2-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $2, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $3, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $4, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $5, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $6, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $7, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $8, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $9, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $10, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $11, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $12, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $13, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $14, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $15, %xmm1, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1<br class="">-; AVX2-NEXT: vpextrb $1, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %esi<br class="">-; AVX2-NEXT: vpextrb $0, %xmm0, %ecx<br class="">-; AVX2-NEXT: movb %cl, %dil<br class="">-; AVX2-NEXT: shlb $7, %dil<br class="">-; AVX2-NEXT: movb %cl, %al<br class="">-; AVX2-NEXT: shlb $5, %al<br class="">-; AVX2-NEXT: andb $64, %al<br class="">-; AVX2-NEXT: movb %cl, %dl<br class="">-; AVX2-NEXT: shlb $3, %dl<br class="">-; AVX2-NEXT: andb $32, %dl<br class="">-; AVX2-NEXT: orb %al, %dl<br class="">-; AVX2-NEXT: movb %cl, %al<br class="">-; AVX2-NEXT: addb %al, %al<br class="">-; AVX2-NEXT: andb $16, %al<br class="">-; AVX2-NEXT: orb %dl, %al<br class="">-; AVX2-NEXT: movb %cl, %dl<br class="">-; AVX2-NEXT: shrb %dl<br class="">-; AVX2-NEXT: andb $8, %dl<br class="">-; AVX2-NEXT: orb %al, %dl<br class="">-; AVX2-NEXT: movb %cl, %al<br class="">-; AVX2-NEXT: shrb $3, %al<br class="">-; AVX2-NEXT: andb $4, %al<br class="">-; AVX2-NEXT: orb %dl, %al<br class="">-; AVX2-NEXT: movb %cl, %dl<br class="">-; AVX2-NEXT: shrb $5, %dl<br class="">-; AVX2-NEXT: andb $2, %dl<br class="">-; AVX2-NEXT: orb %al, %dl<br class="">-; AVX2-NEXT: shrb $7, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: orb %dil, %cl<br class="">-; AVX2-NEXT: movzbl %cl, %eax<br class="">-; AVX2-NEXT: vmovd %eax, %xmm2<br class="">-; AVX2-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $2, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $2, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $3, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $3, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $4, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $4, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $5, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $5, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $6, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $6, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $7, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $7, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $8, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $8, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $9, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $9, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $10, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $10, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $11, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $11, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $12, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $12, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $13, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $13, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $14, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $14, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrb $15, %xmm0, %eax<br class="">-; AVX2-NEXT: movb %al, %sil<br class="">-; AVX2-NEXT: shlb $7, %sil<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shlb $5, %dl<br class="">-; AVX2-NEXT: andb $64, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shlb $3, %cl<br class="">-; AVX2-NEXT: andb $32, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: addb %dl, %dl<br class="">-; AVX2-NEXT: andb $16, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb %cl<br class="">-; AVX2-NEXT: andb $8, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: movb %al, %dl<br class="">-; AVX2-NEXT: shrb $3, %dl<br class="">-; AVX2-NEXT: andb $4, %dl<br class="">-; AVX2-NEXT: orb %cl, %dl<br class="">-; AVX2-NEXT: movb %al, %cl<br class="">-; AVX2-NEXT: shrb $5, %cl<br class="">-; AVX2-NEXT: andb $2, %cl<br class="">-; AVX2-NEXT: orb %dl, %cl<br class="">-; AVX2-NEXT: shrb $7, %al<br class="">-; AVX2-NEXT: orb %cl, %al<br class="">-; AVX2-NEXT: orb %sil, %al<br class="">-; AVX2-NEXT: movzbl %al, %eax<br class="">-; AVX2-NEXT: vpinsrb $15, %eax, %xmm2, %xmm0<br class="">-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpsrlw $7, %ymm0, %ymm1<br class="">+; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]<br class="">+; AVX2-NEXT: vpand %ymm2, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1<br class="">+; AVX2-NEXT: vpsllw $7, %ymm0, %ymm2<br class="">+; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]<br class="">+; AVX2-NEXT: vpand %ymm3, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpand %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsllw $5, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpsllw $3, %ymm0, %ymm4<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4<br class="">+; AVX2-NEXT: vpor %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpaddb %ymm0, %ymm0, %ymm4<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4<br class="">+; AVX2-NEXT: vpor %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm4<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4<br class="">+; AVX2-NEXT: vpor %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpsrlw $3, %ymm0, %ymm4<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4<br class="">+; AVX2-NEXT: vpor %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpsrlw $5, %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpor %ymm0, %ymm3, %ymm0<br class="">+; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpor %ymm0, %ymm2, %ymm0<br class=""> ; AVX2-NEXT: retq<br class=""> ;<br class=""> ; XOPAVX1-LABEL: test_bitreverse_v32i8:<br class="">@@ -7578,2966 +2258,280 @@ define <32 x i8> @test_bitreverse_v32i8(<br class=""> define <16 x i16> @test_bitreverse_v16i16(<16 x i16> %a) nounwind {<br class=""> ; SSE-LABEL: test_bitreverse_v16i16:<br class=""> ; SSE: # BB#0:<br class="">-; SSE-NEXT: pextrw $7, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: pextrw $3, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]<br class="">-; SSE-NEXT: pextrw $5, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: pextrw $1, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]<br class="">-; SSE-NEXT: pextrw $6, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: pextrw $2, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]<br class="">-; SSE-NEXT: pextrw $4, %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: movd %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: andl $32768, %eax # imm = 0x8000<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]<br class="">-; SSE-NEXT: pextrw $7, %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: pextrw $3, %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]<br class="">-; SSE-NEXT: pextrw $5, %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: pextrw $1, %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]<br class="">-; SSE-NEXT: pextrw $6, %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: pextrw $2, %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]<br class="">-; SSE-NEXT: pextrw $4, %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm4<br class="">-; SSE-NEXT: movd %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $15, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $13, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $11, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $9, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $7, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $5, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $3, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: andl $32768, %eax # imm = 0x8000<br class="">-; SSE-NEXT: shrl $15, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]<br class="">-; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm5<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm1<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psllw $13, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psllw $11, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psllw $9, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psllw $7, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psllw $5, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm12 = [1024,1024,1024,1024,1024,1024,1024,1024]<br class="">+; SSE-NEXT: pand %xmm12, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psllw $3, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm13 = [512,512,512,512,512,512,512,512]<br class="">+; SSE-NEXT: pand %xmm13, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psllw $1, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm14 = [256,256,256,256,256,256,256,256]<br class="">+; SSE-NEXT: pand %xmm14, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrlw $1, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm15 = [128,128,128,128,128,128,128,128]<br class="">+; SSE-NEXT: pand %xmm15, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrlw $3, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm11 = [64,64,64,64,64,64,64,64]<br class="">+; SSE-NEXT: pand %xmm11, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrlw $5, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm10 = [32,32,32,32,32,32,32,32]<br class="">+; SSE-NEXT: pand %xmm10, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrlw $7, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm9 = [16,16,16,16,16,16,16,16]<br class="">+; SSE-NEXT: pand %xmm9, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrlw $9, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm8 = [8,8,8,8,8,8,8,8]<br class="">+; SSE-NEXT: pand %xmm8, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrlw $11, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm7 = [4,4,4,4,4,4,4,4]<br class="">+; SSE-NEXT: pand %xmm7, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: psrlw $13, %xmm0<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm6 = [2,2,2,2,2,2,2,2]<br class="">+; SSE-NEXT: pand %xmm6, %xmm0<br class="">+; SSE-NEXT: por %xmm2, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrlw $15, %xmm1<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [1,1,1,1,1,1,1,1]<br class="">+; SSE-NEXT: pand %xmm3, %xmm1<br class="">+; SSE-NEXT: por %xmm0, %xmm1<br class="">+; SSE-NEXT: psllw $15, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm0 = [32768,32768,32768,32768,32768,32768,32768,32768]<br class="">+; SSE-NEXT: pand %xmm0, %xmm2<br class="">+; SSE-NEXT: por %xmm2, %xmm1<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psllw $13, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm2<br class="">+; SSE-NEXT: psllw $15, %xmm2<br class="">+; SSE-NEXT: pand %xmm0, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psllw $11, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psllw $9, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psllw $7, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psllw $5, %xmm4<br class="">+; SSE-NEXT: pand %xmm12, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psllw $3, %xmm0<br class="">+; SSE-NEXT: pand %xmm13, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psllw $1, %xmm4<br class="">+; SSE-NEXT: pand %xmm14, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrlw $1, %xmm0<br class="">+; SSE-NEXT: pand %xmm15, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrlw $3, %xmm4<br class="">+; SSE-NEXT: pand %xmm11, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrlw $5, %xmm0<br class="">+; SSE-NEXT: pand %xmm10, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrlw $7, %xmm4<br class="">+; SSE-NEXT: pand %xmm9, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrlw $9, %xmm0<br class="">+; SSE-NEXT: pand %xmm8, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrlw $11, %xmm4<br class="">+; SSE-NEXT: pand %xmm7, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrlw $13, %xmm0<br class="">+; SSE-NEXT: pand %xmm6, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: psrlw $15, %xmm5<br class="">+; SSE-NEXT: pand %xmm3, %xmm5<br class="">+; SSE-NEXT: por %xmm0, %xmm5<br class="">+; SSE-NEXT: por %xmm2, %xmm5<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm1<br class=""> ; SSE-NEXT: retq<br class=""> ;<br class=""> ; AVX1-LABEL: test_bitreverse_v16i16:<br class=""> ; AVX1: # BB#0:<br class="">+; AVX1-NEXT: vpsllw $13, %xmm0, %xmm2<br class=""> ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1<br class="">-; AVX1-NEXT: vpextrw $1, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vmovd %xmm1, %ecx<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: shll $15, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $2, %esi<br class="">-; AVX1-NEXT: shll $13, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: andl $4, %edx<br class="">-; AVX1-NEXT: shll $11, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $8, %esi<br class="">-; AVX1-NEXT: shll $9, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: andl $16, %edi<br class="">-; AVX1-NEXT: shll $7, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: shll $5, %edx<br class="">-; AVX1-NEXT: orl %edi, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: shll $3, %esi<br class="">-; AVX1-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX1-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl %esi<br class="">-; AVX1-NEXT: andl $128, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $3, %edi<br class="">-; AVX1-NEXT: andl $64, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $5, %esi<br class="">-; AVX1-NEXT: andl $32, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $7, %edi<br class="">-; AVX1-NEXT: andl $16, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $9, %esi<br class="">-; AVX1-NEXT: andl $8, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $11, %edi<br class="">-; AVX1-NEXT: andl $4, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $13, %esi<br class="">-; AVX1-NEXT: andl $2, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: andl $32768, %ecx # imm = 0x8000<br class="">-; AVX1-NEXT: shrl $15, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: vmovd %ecx, %xmm2<br class="">-; AVX1-NEXT: vpinsrw $1, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $2, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $3, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $4, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $5, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $6, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $7, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $7, %eax, %xmm2, %xmm1<br class="">-; AVX1-NEXT: vpextrw $1, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vmovd %xmm0, %ecx<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: shll $15, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $2, %esi<br class="">-; AVX1-NEXT: shll $13, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: andl $4, %edx<br class="">-; AVX1-NEXT: shll $11, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $8, %esi<br class="">-; AVX1-NEXT: shll $9, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: andl $16, %edi<br class="">-; AVX1-NEXT: shll $7, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: shll $5, %edx<br class="">-; AVX1-NEXT: orl %edi, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: shll $3, %esi<br class="">-; AVX1-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX1-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl %esi<br class="">-; AVX1-NEXT: andl $128, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $3, %edi<br class="">-; AVX1-NEXT: andl $64, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $5, %esi<br class="">-; AVX1-NEXT: andl $32, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $7, %edi<br class="">-; AVX1-NEXT: andl $16, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $9, %esi<br class="">-; AVX1-NEXT: andl $8, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $11, %edi<br class="">-; AVX1-NEXT: andl $4, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $13, %esi<br class="">-; AVX1-NEXT: andl $2, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: andl $32768, %ecx # imm = 0x8000<br class="">-; AVX1-NEXT: shrl $15, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: vmovd %ecx, %xmm2<br class="">-; AVX1-NEXT: vpinsrw $1, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $2, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $3, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $4, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $5, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $6, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrw $7, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $15, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $13, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $11, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $9, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $5, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $3, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $15, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrw $7, %eax, %xmm2, %xmm0<br class="">+; AVX1-NEXT: vpsllw $13, %xmm1, %xmm3<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsllw $15, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsllw $15, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm2, %ymm3, %ymm2<br class="">+; AVX1-NEXT: vpsllw $11, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsllw $11, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsllw $9, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsllw $9, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsllw $7, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsllw $7, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsllw $5, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsllw $5, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsllw $3, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsllw $3, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsllw $1, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsllw $1, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $1, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $3, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $3, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $5, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $5, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $7, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $7, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $9, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $9, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $11, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $11, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $13, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrlw $13, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrlw $15, %xmm0, %xmm0<br class="">+; AVX1-NEXT: vpsrlw $15, %xmm1, %xmm1<br class=""> ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0<br class="">+; AVX1-NEXT: vorps %ymm0, %ymm2, %ymm0<br class=""> ; AVX1-NEXT: retq<br class=""> ;<br class=""> ; AVX2-LABEL: test_bitreverse_v16i16:<br class=""> ; AVX2: # BB#0:<br class="">-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1<br class="">-; AVX2-NEXT: vpextrw $1, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vmovd %xmm1, %ecx<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: shll $15, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $2, %esi<br class="">-; AVX2-NEXT: shll $13, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: andl $4, %edx<br class="">-; AVX2-NEXT: shll $11, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $8, %esi<br class="">-; AVX2-NEXT: shll $9, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: andl $16, %edi<br class="">-; AVX2-NEXT: shll $7, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: shll $5, %edx<br class="">-; AVX2-NEXT: orl %edi, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: shll $3, %esi<br class="">-; AVX2-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX2-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl %esi<br class="">-; AVX2-NEXT: andl $128, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $3, %edi<br class="">-; AVX2-NEXT: andl $64, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $5, %esi<br class="">-; AVX2-NEXT: andl $32, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $7, %edi<br class="">-; AVX2-NEXT: andl $16, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $9, %esi<br class="">-; AVX2-NEXT: andl $8, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $11, %edi<br class="">-; AVX2-NEXT: andl $4, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $13, %esi<br class="">-; AVX2-NEXT: andl $2, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: andl $32768, %ecx # imm = 0x8000<br class="">-; AVX2-NEXT: shrl $15, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: vmovd %ecx, %xmm2<br class="">-; AVX2-NEXT: vpinsrw $1, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $2, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $3, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $4, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $5, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $6, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $7, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $7, %eax, %xmm2, %xmm1<br class="">-; AVX2-NEXT: vpextrw $1, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vmovd %xmm0, %ecx<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: shll $15, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $2, %esi<br class="">-; AVX2-NEXT: shll $13, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: andl $4, %edx<br class="">-; AVX2-NEXT: shll $11, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $8, %esi<br class="">-; AVX2-NEXT: shll $9, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: andl $16, %edi<br class="">-; AVX2-NEXT: shll $7, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: shll $5, %edx<br class="">-; AVX2-NEXT: orl %edi, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: shll $3, %esi<br class="">-; AVX2-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX2-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl %esi<br class="">-; AVX2-NEXT: andl $128, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $3, %edi<br class="">-; AVX2-NEXT: andl $64, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $5, %esi<br class="">-; AVX2-NEXT: andl $32, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $7, %edi<br class="">-; AVX2-NEXT: andl $16, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $9, %esi<br class="">-; AVX2-NEXT: andl $8, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $11, %edi<br class="">-; AVX2-NEXT: andl $4, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $13, %esi<br class="">-; AVX2-NEXT: andl $2, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: andl $32768, %ecx # imm = 0x8000<br class="">-; AVX2-NEXT: shrl $15, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: vmovd %ecx, %xmm2<br class="">-; AVX2-NEXT: vpinsrw $1, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $2, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $2, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $3, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $3, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $4, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $4, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $5, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $5, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $6, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $6, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrw $7, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $15, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $13, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $11, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $9, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $5, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $3, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $15, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrw $7, %eax, %xmm2, %xmm0<br class="">-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpsllw $13, %ymm0, %ymm1<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm2<br class="">+; AVX2-NEXT: vpsllw $15, %ymm0, %ymm1<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1<br class="">+; AVX2-NEXT: vpsllw $11, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsllw $9, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsllw $7, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsllw $5, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsllw $3, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsllw $1, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrlw $3, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrlw $5, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrlw $7, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrlw $9, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrlw $11, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrlw $13, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrlw $15, %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpor %ymm0, %ymm2, %ymm0<br class="">+; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0<br class=""> ; AVX2-NEXT: retq<br class=""> ;<br class=""> ; XOPAVX1-LABEL: test_bitreverse_v16i16:<br class="">@@ -10564,3008 +2558,568 @@ define <16 x i16> @test_bitreverse_v16i1<br class=""> define <8 x i32> @test_bitreverse_v8i32(<8 x i32> %a) nounwind {<br class=""> ; SSE-LABEL: test_bitreverse_v8i32:<br class=""> ; SSE: # BB#0:<br class="">-; SSE-NEXT: movdqa %xmm0, %xmm2<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,1,2,3]<br class="">-; SSE-NEXT: movd %xmm0, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,2,3]<br class="">-; SSE-NEXT: movd %xmm3, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]<br class="">-; SSE-NEXT: movd %xmm2, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm0<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]<br class="">-; SSE-NEXT: movd %xmm2, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,1,2,3]<br class="">-; SSE-NEXT: movd %xmm2, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,2,3]<br class="">-; SSE-NEXT: movd %xmm3, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm3<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]<br class="">-; SSE-NEXT: movd %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm2<br class="">-; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]<br class="">-; SSE-NEXT: movd %xmm1, %eax<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: shll $31, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: shll $29, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $4, %ecx<br class="">-; SSE-NEXT: shll $27, %ecx<br class="">-; SSE-NEXT: orl %edx, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: shll $25, %edx<br class="">-; SSE-NEXT: orl %ecx, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: shll $23, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %ecx<br class="">-; SSE-NEXT: andl $32, %ecx<br class="">-; SSE-NEXT: shll $21, %ecx<br class="">-; SSE-NEXT: orl %esi, %ecx<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: andl $64, %edx<br class="">-; SSE-NEXT: shll $19, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $17, %esi<br class="">-; SSE-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $15, %edx<br class="">-; SSE-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $13, %esi<br class="">-; SSE-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $11, %edx<br class="">-; SSE-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $9, %esi<br class="">-; SSE-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shll $7, %edx<br class="">-; SSE-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shll $5, %esi<br class="">-; SSE-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: leal (,%rax,8), %edx<br class="">-; SSE-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: leal (%rax,%rax), %esi<br class="">-; SSE-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl %edx<br class="">-; SSE-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $3, %esi<br class="">-; SSE-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $5, %edx<br class="">-; SSE-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $7, %esi<br class="">-; SSE-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $9, %edx<br class="">-; SSE-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $11, %esi<br class="">-; SSE-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $13, %edx<br class="">-; SSE-NEXT: andl $512, %edx # imm = 0x200<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $15, %esi<br class="">-; SSE-NEXT: andl $256, %esi # imm = 0x100<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $17, %edx<br class="">-; SSE-NEXT: andl $128, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $19, %esi<br class="">-; SSE-NEXT: andl $64, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $21, %edx<br class="">-; SSE-NEXT: andl $32, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $23, %esi<br class="">-; SSE-NEXT: andl $16, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $25, %edx<br class="">-; SSE-NEXT: andl $8, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: movl %eax, %esi<br class="">-; SSE-NEXT: shrl $27, %esi<br class="">-; SSE-NEXT: andl $4, %esi<br class="">-; SSE-NEXT: orl %edx, %esi<br class="">-; SSE-NEXT: movl %eax, %edx<br class="">-; SSE-NEXT: shrl $29, %edx<br class="">-; SSE-NEXT: andl $2, %edx<br class="">-; SSE-NEXT: orl %esi, %edx<br class="">-; SSE-NEXT: shrl $31, %eax<br class="">-; SSE-NEXT: orl %edx, %eax<br class="">-; SSE-NEXT: orl %ecx, %eax<br class="">-; SSE-NEXT: movd %eax, %xmm1<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]<br class="">-; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]<br class="">-; SSE-NEXT: movdqa %xmm2, %xmm1<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm5<br class="">+; SSE-NEXT: movdqa %xmm0, %xmm1<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: pslld $29, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: pslld $27, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: pslld $25, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: pslld $23, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: pslld $21, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: pslld $19, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: pslld $17, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: pslld $15, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: pslld $13, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: pslld $11, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: pslld $9, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: pslld $7, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: pslld $5, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: pslld $3, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: pslld $1, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrld $1, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrld $3, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrld $5, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrld $7, %xmm2<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrld $9, %xmm3<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrld $11, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm15 = [1024,1024,1024,1024]<br class="">+; SSE-NEXT: pand %xmm15, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrld $13, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm14 = [512,512,512,512]<br class="">+; SSE-NEXT: pand %xmm14, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrld $15, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm13 = [256,256,256,256]<br class="">+; SSE-NEXT: pand %xmm13, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrld $17, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm12 = [128,128,128,128]<br class="">+; SSE-NEXT: pand %xmm12, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrld $19, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm11 = [64,64,64,64]<br class="">+; SSE-NEXT: pand %xmm11, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrld $21, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm10 = [32,32,32,32]<br class="">+; SSE-NEXT: pand %xmm10, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrld $23, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm9 = [16,16,16,16]<br class="">+; SSE-NEXT: pand %xmm9, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm3<br class="">+; SSE-NEXT: psrld $25, %xmm3<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm8 = [8,8,8,8]<br class="">+; SSE-NEXT: pand %xmm8, %xmm3<br class="">+; SSE-NEXT: por %xmm2, %xmm3<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrld $27, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm7 = [4,4,4,4]<br class="">+; SSE-NEXT: pand %xmm7, %xmm2<br class="">+; SSE-NEXT: por %xmm3, %xmm2<br class="">+; SSE-NEXT: psrld $29, %xmm0<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm6 = [2,2,2,2]<br class="">+; SSE-NEXT: pand %xmm6, %xmm0<br class="">+; SSE-NEXT: por %xmm2, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm2<br class="">+; SSE-NEXT: psrld $31, %xmm1<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [1,1,1,1]<br class="">+; SSE-NEXT: pand %xmm3, %xmm1<br class="">+; SSE-NEXT: por %xmm0, %xmm1<br class="">+; SSE-NEXT: pslld $31, %xmm2<br class="">+; SSE-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648,2147483648,2147483648]<br class="">+; SSE-NEXT: pand %xmm0, %xmm2<br class="">+; SSE-NEXT: por %xmm2, %xmm1<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: pslld $29, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm2<br class="">+; SSE-NEXT: pslld $31, %xmm2<br class="">+; SSE-NEXT: pand %xmm0, %xmm2<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: pslld $27, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: pslld $25, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: pslld $23, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: pslld $21, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: pslld $19, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: pslld $17, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: pslld $15, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: pslld $13, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: pslld $11, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: pslld $9, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: pslld $7, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: pslld $5, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: pslld $3, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: pslld $1, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrld $1, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrld $3, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrld $5, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrld $7, %xmm4<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrld $9, %xmm0<br class="">+; SSE-NEXT: pand {{.*}}(%rip), %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrld $11, %xmm4<br class="">+; SSE-NEXT: pand %xmm15, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrld $13, %xmm0<br class="">+; SSE-NEXT: pand %xmm14, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrld $15, %xmm4<br class="">+; SSE-NEXT: pand %xmm13, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrld $17, %xmm0<br class="">+; SSE-NEXT: pand %xmm12, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrld $19, %xmm4<br class="">+; SSE-NEXT: pand %xmm11, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrld $21, %xmm0<br class="">+; SSE-NEXT: pand %xmm10, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrld $23, %xmm4<br class="">+; SSE-NEXT: pand %xmm9, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrld $25, %xmm0<br class="">+; SSE-NEXT: pand %xmm8, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm4<br class="">+; SSE-NEXT: psrld $27, %xmm4<br class="">+; SSE-NEXT: pand %xmm7, %xmm4<br class="">+; SSE-NEXT: por %xmm0, %xmm4<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm0<br class="">+; SSE-NEXT: psrld $29, %xmm0<br class="">+; SSE-NEXT: pand %xmm6, %xmm0<br class="">+; SSE-NEXT: por %xmm4, %xmm0<br class="">+; SSE-NEXT: psrld $31, %xmm5<br class="">+; SSE-NEXT: pand %xmm3, %xmm5<br class="">+; SSE-NEXT: por %xmm0, %xmm5<br class="">+; SSE-NEXT: por %xmm2, %xmm5<br class="">+; SSE-NEXT: movdqa %xmm1, %xmm0<br class="">+; SSE-NEXT: movdqa %xmm5, %xmm1<br class=""> ; SSE-NEXT: retq<br class=""> ;<br class=""> ; AVX1-LABEL: test_bitreverse_v8i32:<br class=""> ; AVX1: # BB#0:<br class="">+; AVX1-NEXT: vpslld $29, %xmm0, %xmm2<br class=""> ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1<br class="">-; AVX1-NEXT: vpextrd $1, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $31, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $29, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $27, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $25, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $23, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $21, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $19, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $17, %esi<br class="">-; AVX1-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $15, %edx<br class="">-; AVX1-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $13, %esi<br class="">-; AVX1-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $11, %edx<br class="">-; AVX1-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $9, %esi<br class="">-; AVX1-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $7, %edx<br class="">-; AVX1-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $5, %esi<br class="">-; AVX1-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: leal (,%rax,8), %edx<br class="">-; AVX1-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $15, %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $17, %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $19, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $21, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $23, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $25, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $27, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $29, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $31, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vmovd %xmm1, %ecx<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: shll $31, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $2, %esi<br class="">-; AVX1-NEXT: shll $29, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: andl $4, %edx<br class="">-; AVX1-NEXT: shll $27, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $8, %esi<br class="">-; AVX1-NEXT: shll $25, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: andl $16, %edi<br class="">-; AVX1-NEXT: shll $23, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: shll $21, %edx<br class="">-; AVX1-NEXT: orl %edi, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: shll $19, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shll $17, %edi<br class="">-; AVX1-NEXT: andl $16777216, %edi # imm = 0x1000000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shll $15, %esi<br class="">-; AVX1-NEXT: andl $8388608, %esi # imm = 0x800000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shll $13, %edi<br class="">-; AVX1-NEXT: andl $4194304, %edi # imm = 0x400000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shll $11, %esi<br class="">-; AVX1-NEXT: andl $2097152, %esi # imm = 0x200000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shll $9, %edi<br class="">-; AVX1-NEXT: andl $1048576, %edi # imm = 0x100000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: andl $524288, %esi # imm = 0x80000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shll $5, %edi<br class="">-; AVX1-NEXT: andl $262144, %edi # imm = 0x40000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: leal (,%rcx,8), %esi<br class="">-; AVX1-NEXT: andl $131072, %esi # imm = 0x20000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX1-NEXT: andl $65536, %edi # imm = 0x10000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl %esi<br class="">-; AVX1-NEXT: andl $32768, %esi # imm = 0x8000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $3, %edi<br class="">-; AVX1-NEXT: andl $16384, %edi # imm = 0x4000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $5, %esi<br class="">-; AVX1-NEXT: andl $8192, %esi # imm = 0x2000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $7, %edi<br class="">-; AVX1-NEXT: andl $4096, %edi # imm = 0x1000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $9, %esi<br class="">-; AVX1-NEXT: andl $2048, %esi # imm = 0x800<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $11, %edi<br class="">-; AVX1-NEXT: andl $1024, %edi # imm = 0x400<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $13, %esi<br class="">-; AVX1-NEXT: andl $512, %esi # imm = 0x200<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $15, %edi<br class="">-; AVX1-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $17, %esi<br class="">-; AVX1-NEXT: andl $128, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $19, %edi<br class="">-; AVX1-NEXT: andl $64, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $21, %esi<br class="">-; AVX1-NEXT: andl $32, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $23, %edi<br class="">-; AVX1-NEXT: andl $16, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $25, %esi<br class="">-; AVX1-NEXT: andl $8, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $27, %edi<br class="">-; AVX1-NEXT: andl $4, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $29, %esi<br class="">-; AVX1-NEXT: andl $2, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: shrl $31, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: vmovd %ecx, %xmm2<br class="">-; AVX1-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrd $2, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $31, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $29, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $27, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $25, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $23, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $21, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $19, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $17, %esi<br class="">-; AVX1-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $15, %edx<br class="">-; AVX1-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $13, %esi<br class="">-; AVX1-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $11, %edx<br class="">-; AVX1-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $9, %esi<br class="">-; AVX1-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $7, %edx<br class="">-; AVX1-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $5, %esi<br class="">-; AVX1-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: leal (,%rax,8), %edx<br class="">-; AVX1-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $15, %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $17, %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $19, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $21, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $23, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $25, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $27, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $29, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $31, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrd $3, %xmm1, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $31, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $29, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $27, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $25, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $23, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $21, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $19, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $17, %esi<br class="">-; AVX1-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $15, %edx<br class="">-; AVX1-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $13, %esi<br class="">-; AVX1-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $11, %edx<br class="">-; AVX1-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $9, %esi<br class="">-; AVX1-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $7, %edx<br class="">-; AVX1-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $5, %esi<br class="">-; AVX1-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: leal (,%rax,8), %edx<br class="">-; AVX1-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $15, %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $17, %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $19, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $21, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $23, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $25, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $27, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $29, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $31, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrd $3, %eax, %xmm2, %xmm1<br class="">-; AVX1-NEXT: vpextrd $1, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $31, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $29, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $27, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $25, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $23, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $21, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $19, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $17, %esi<br class="">-; AVX1-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $15, %edx<br class="">-; AVX1-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $13, %esi<br class="">-; AVX1-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $11, %edx<br class="">-; AVX1-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $9, %esi<br class="">-; AVX1-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $7, %edx<br class="">-; AVX1-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $5, %esi<br class="">-; AVX1-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: leal (,%rax,8), %edx<br class="">-; AVX1-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $15, %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $17, %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $19, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $21, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $23, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $25, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $27, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $29, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $31, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vmovd %xmm0, %ecx<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: shll $31, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $2, %esi<br class="">-; AVX1-NEXT: shll $29, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: andl $4, %edx<br class="">-; AVX1-NEXT: shll $27, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $8, %esi<br class="">-; AVX1-NEXT: shll $25, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: andl $16, %edi<br class="">-; AVX1-NEXT: shll $23, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: shll $21, %edx<br class="">-; AVX1-NEXT: orl %edi, %edx<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: shll $19, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shll $17, %edi<br class="">-; AVX1-NEXT: andl $16777216, %edi # imm = 0x1000000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shll $15, %esi<br class="">-; AVX1-NEXT: andl $8388608, %esi # imm = 0x800000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shll $13, %edi<br class="">-; AVX1-NEXT: andl $4194304, %edi # imm = 0x400000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shll $11, %esi<br class="">-; AVX1-NEXT: andl $2097152, %esi # imm = 0x200000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shll $9, %edi<br class="">-; AVX1-NEXT: andl $1048576, %edi # imm = 0x100000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shll $7, %esi<br class="">-; AVX1-NEXT: andl $524288, %esi # imm = 0x80000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shll $5, %edi<br class="">-; AVX1-NEXT: andl $262144, %edi # imm = 0x40000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: leal (,%rcx,8), %esi<br class="">-; AVX1-NEXT: andl $131072, %esi # imm = 0x20000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX1-NEXT: andl $65536, %edi # imm = 0x10000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl %esi<br class="">-; AVX1-NEXT: andl $32768, %esi # imm = 0x8000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $3, %edi<br class="">-; AVX1-NEXT: andl $16384, %edi # imm = 0x4000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $5, %esi<br class="">-; AVX1-NEXT: andl $8192, %esi # imm = 0x2000<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $7, %edi<br class="">-; AVX1-NEXT: andl $4096, %edi # imm = 0x1000<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $9, %esi<br class="">-; AVX1-NEXT: andl $2048, %esi # imm = 0x800<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $11, %edi<br class="">-; AVX1-NEXT: andl $1024, %edi # imm = 0x400<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $13, %esi<br class="">-; AVX1-NEXT: andl $512, %esi # imm = 0x200<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $15, %edi<br class="">-; AVX1-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $17, %esi<br class="">-; AVX1-NEXT: andl $128, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $19, %edi<br class="">-; AVX1-NEXT: andl $64, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $21, %esi<br class="">-; AVX1-NEXT: andl $32, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $23, %edi<br class="">-; AVX1-NEXT: andl $16, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $25, %esi<br class="">-; AVX1-NEXT: andl $8, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: movl %ecx, %edi<br class="">-; AVX1-NEXT: shrl $27, %edi<br class="">-; AVX1-NEXT: andl $4, %edi<br class="">-; AVX1-NEXT: orl %esi, %edi<br class="">-; AVX1-NEXT: movl %ecx, %esi<br class="">-; AVX1-NEXT: shrl $29, %esi<br class="">-; AVX1-NEXT: andl $2, %esi<br class="">-; AVX1-NEXT: orl %edi, %esi<br class="">-; AVX1-NEXT: shrl $31, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: vmovd %ecx, %xmm2<br class="">-; AVX1-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrd $2, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $31, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $29, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $27, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $25, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $23, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $21, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $19, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $17, %esi<br class="">-; AVX1-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $15, %edx<br class="">-; AVX1-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $13, %esi<br class="">-; AVX1-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $11, %edx<br class="">-; AVX1-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $9, %esi<br class="">-; AVX1-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $7, %edx<br class="">-; AVX1-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $5, %esi<br class="">-; AVX1-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: leal (,%rax,8), %edx<br class="">-; AVX1-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $15, %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $17, %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $19, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $21, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $23, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $25, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $27, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $29, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $31, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2<br class="">-; AVX1-NEXT: vpextrd $3, %xmm0, %eax<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: shll $31, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: shll $29, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $4, %ecx<br class="">-; AVX1-NEXT: shll $27, %ecx<br class="">-; AVX1-NEXT: orl %edx, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: shll $25, %edx<br class="">-; AVX1-NEXT: orl %ecx, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: shll $23, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %ecx<br class="">-; AVX1-NEXT: andl $32, %ecx<br class="">-; AVX1-NEXT: shll $21, %ecx<br class="">-; AVX1-NEXT: orl %esi, %ecx<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: andl $64, %edx<br class="">-; AVX1-NEXT: shll $19, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $17, %esi<br class="">-; AVX1-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $15, %edx<br class="">-; AVX1-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $13, %esi<br class="">-; AVX1-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $11, %edx<br class="">-; AVX1-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $9, %esi<br class="">-; AVX1-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shll $7, %edx<br class="">-; AVX1-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shll $5, %esi<br class="">-; AVX1-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: leal (,%rax,8), %edx<br class="">-; AVX1-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX1-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl %edx<br class="">-; AVX1-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $3, %esi<br class="">-; AVX1-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $5, %edx<br class="">-; AVX1-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $7, %esi<br class="">-; AVX1-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $9, %edx<br class="">-; AVX1-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $11, %esi<br class="">-; AVX1-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $13, %edx<br class="">-; AVX1-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $15, %esi<br class="">-; AVX1-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $17, %edx<br class="">-; AVX1-NEXT: andl $128, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $19, %esi<br class="">-; AVX1-NEXT: andl $64, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $21, %edx<br class="">-; AVX1-NEXT: andl $32, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $23, %esi<br class="">-; AVX1-NEXT: andl $16, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $25, %edx<br class="">-; AVX1-NEXT: andl $8, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: movl %eax, %esi<br class="">-; AVX1-NEXT: shrl $27, %esi<br class="">-; AVX1-NEXT: andl $4, %esi<br class="">-; AVX1-NEXT: orl %edx, %esi<br class="">-; AVX1-NEXT: movl %eax, %edx<br class="">-; AVX1-NEXT: shrl $29, %edx<br class="">-; AVX1-NEXT: andl $2, %edx<br class="">-; AVX1-NEXT: orl %esi, %edx<br class="">-; AVX1-NEXT: shrl $31, %eax<br class="">-; AVX1-NEXT: orl %edx, %eax<br class="">-; AVX1-NEXT: orl %ecx, %eax<br class="">-; AVX1-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0<br class="">+; AVX1-NEXT: vpslld $29, %xmm1, %xmm3<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $31, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $31, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm2, %ymm3, %ymm2<br class="">+; AVX1-NEXT: vpslld $27, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $27, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $25, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $25, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $23, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $23, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $21, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $21, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $19, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $19, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $17, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $17, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $15, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $15, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $13, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $13, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $11, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $11, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $9, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $9, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $7, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $7, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $5, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $5, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $3, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $3, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpslld $1, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpslld $1, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $1, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $1, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $3, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $3, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $5, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $5, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $7, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $7, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $9, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $9, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $11, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $11, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $13, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $13, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $15, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $15, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $17, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $17, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $19, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $19, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $21, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $21, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $23, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $23, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $25, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $25, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $27, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $27, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $29, %xmm0, %xmm3<br class="">+; AVX1-NEXT: vpsrld $29, %xmm1, %xmm4<br class="">+; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3<br class="">+; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2<br class="">+; AVX1-NEXT: vpsrld $31, %xmm0, %xmm0<br class="">+; AVX1-NEXT: vpsrld $31, %xmm1, %xmm1<br class=""> ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0<br class="">+; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0<br class="">+; AVX1-NEXT: vorps %ymm0, %ymm2, %ymm0<br class=""> ; AVX1-NEXT: retq<br class=""> ;<br class=""> ; AVX2-LABEL: test_bitreverse_v8i32:<br class=""> ; AVX2: # BB#0:<br class="">-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1<br class="">-; AVX2-NEXT: vpextrd $1, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $31, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $29, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $27, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $25, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $23, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $21, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $19, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $17, %esi<br class="">-; AVX2-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $15, %edx<br class="">-; AVX2-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $13, %esi<br class="">-; AVX2-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $11, %edx<br class="">-; AVX2-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $9, %esi<br class="">-; AVX2-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $7, %edx<br class="">-; AVX2-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $5, %esi<br class="">-; AVX2-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: leal (,%rax,8), %edx<br class="">-; AVX2-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $15, %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $17, %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $19, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $21, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $23, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $25, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $27, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $29, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $31, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vmovd %xmm1, %ecx<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: shll $31, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $2, %esi<br class="">-; AVX2-NEXT: shll $29, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: andl $4, %edx<br class="">-; AVX2-NEXT: shll $27, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $8, %esi<br class="">-; AVX2-NEXT: shll $25, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: andl $16, %edi<br class="">-; AVX2-NEXT: shll $23, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: shll $21, %edx<br class="">-; AVX2-NEXT: orl %edi, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: shll $19, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shll $17, %edi<br class="">-; AVX2-NEXT: andl $16777216, %edi # imm = 0x1000000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shll $15, %esi<br class="">-; AVX2-NEXT: andl $8388608, %esi # imm = 0x800000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shll $13, %edi<br class="">-; AVX2-NEXT: andl $4194304, %edi # imm = 0x400000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shll $11, %esi<br class="">-; AVX2-NEXT: andl $2097152, %esi # imm = 0x200000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shll $9, %edi<br class="">-; AVX2-NEXT: andl $1048576, %edi # imm = 0x100000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: andl $524288, %esi # imm = 0x80000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shll $5, %edi<br class="">-; AVX2-NEXT: andl $262144, %edi # imm = 0x40000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: leal (,%rcx,8), %esi<br class="">-; AVX2-NEXT: andl $131072, %esi # imm = 0x20000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX2-NEXT: andl $65536, %edi # imm = 0x10000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl %esi<br class="">-; AVX2-NEXT: andl $32768, %esi # imm = 0x8000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $3, %edi<br class="">-; AVX2-NEXT: andl $16384, %edi # imm = 0x4000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $5, %esi<br class="">-; AVX2-NEXT: andl $8192, %esi # imm = 0x2000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $7, %edi<br class="">-; AVX2-NEXT: andl $4096, %edi # imm = 0x1000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $9, %esi<br class="">-; AVX2-NEXT: andl $2048, %esi # imm = 0x800<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $11, %edi<br class="">-; AVX2-NEXT: andl $1024, %edi # imm = 0x400<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $13, %esi<br class="">-; AVX2-NEXT: andl $512, %esi # imm = 0x200<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $15, %edi<br class="">-; AVX2-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $17, %esi<br class="">-; AVX2-NEXT: andl $128, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $19, %edi<br class="">-; AVX2-NEXT: andl $64, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $21, %esi<br class="">-; AVX2-NEXT: andl $32, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $23, %edi<br class="">-; AVX2-NEXT: andl $16, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $25, %esi<br class="">-; AVX2-NEXT: andl $8, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $27, %edi<br class="">-; AVX2-NEXT: andl $4, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $29, %esi<br class="">-; AVX2-NEXT: andl $2, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: shrl $31, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: vmovd %ecx, %xmm2<br class="">-; AVX2-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrd $2, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $31, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $29, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $27, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $25, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $23, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $21, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $19, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $17, %esi<br class="">-; AVX2-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $15, %edx<br class="">-; AVX2-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $13, %esi<br class="">-; AVX2-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $11, %edx<br class="">-; AVX2-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $9, %esi<br class="">-; AVX2-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $7, %edx<br class="">-; AVX2-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $5, %esi<br class="">-; AVX2-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: leal (,%rax,8), %edx<br class="">-; AVX2-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $15, %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $17, %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $19, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $21, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $23, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $25, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $27, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $29, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $31, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrd $3, %xmm1, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $31, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $29, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $27, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $25, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $23, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $21, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $19, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $17, %esi<br class="">-; AVX2-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $15, %edx<br class="">-; AVX2-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $13, %esi<br class="">-; AVX2-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $11, %edx<br class="">-; AVX2-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $9, %esi<br class="">-; AVX2-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $7, %edx<br class="">-; AVX2-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $5, %esi<br class="">-; AVX2-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: leal (,%rax,8), %edx<br class="">-; AVX2-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $15, %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $17, %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $19, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $21, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $23, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $25, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $27, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $29, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $31, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrd $3, %eax, %xmm2, %xmm1<br class="">-; AVX2-NEXT: vpextrd $1, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $31, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $29, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $27, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $25, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $23, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $21, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $19, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $17, %esi<br class="">-; AVX2-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $15, %edx<br class="">-; AVX2-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $13, %esi<br class="">-; AVX2-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $11, %edx<br class="">-; AVX2-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $9, %esi<br class="">-; AVX2-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $7, %edx<br class="">-; AVX2-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $5, %esi<br class="">-; AVX2-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: leal (,%rax,8), %edx<br class="">-; AVX2-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $15, %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $17, %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $19, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $21, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $23, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $25, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $27, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $29, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $31, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vmovd %xmm0, %ecx<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: shll $31, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $2, %esi<br class="">-; AVX2-NEXT: shll $29, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: andl $4, %edx<br class="">-; AVX2-NEXT: shll $27, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $8, %esi<br class="">-; AVX2-NEXT: shll $25, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: andl $16, %edi<br class="">-; AVX2-NEXT: shll $23, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: shll $21, %edx<br class="">-; AVX2-NEXT: orl %edi, %edx<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: shll $19, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shll $17, %edi<br class="">-; AVX2-NEXT: andl $16777216, %edi # imm = 0x1000000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shll $15, %esi<br class="">-; AVX2-NEXT: andl $8388608, %esi # imm = 0x800000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shll $13, %edi<br class="">-; AVX2-NEXT: andl $4194304, %edi # imm = 0x400000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shll $11, %esi<br class="">-; AVX2-NEXT: andl $2097152, %esi # imm = 0x200000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shll $9, %edi<br class="">-; AVX2-NEXT: andl $1048576, %edi # imm = 0x100000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shll $7, %esi<br class="">-; AVX2-NEXT: andl $524288, %esi # imm = 0x80000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shll $5, %edi<br class="">-; AVX2-NEXT: andl $262144, %edi # imm = 0x40000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: leal (,%rcx,8), %esi<br class="">-; AVX2-NEXT: andl $131072, %esi # imm = 0x20000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: leal (%rcx,%rcx), %edi<br class="">-; AVX2-NEXT: andl $65536, %edi # imm = 0x10000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl %esi<br class="">-; AVX2-NEXT: andl $32768, %esi # imm = 0x8000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $3, %edi<br class="">-; AVX2-NEXT: andl $16384, %edi # imm = 0x4000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $5, %esi<br class="">-; AVX2-NEXT: andl $8192, %esi # imm = 0x2000<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $7, %edi<br class="">-; AVX2-NEXT: andl $4096, %edi # imm = 0x1000<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $9, %esi<br class="">-; AVX2-NEXT: andl $2048, %esi # imm = 0x800<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $11, %edi<br class="">-; AVX2-NEXT: andl $1024, %edi # imm = 0x400<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $13, %esi<br class="">-; AVX2-NEXT: andl $512, %esi # imm = 0x200<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $15, %edi<br class="">-; AVX2-NEXT: andl $256, %edi # imm = 0x100<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $17, %esi<br class="">-; AVX2-NEXT: andl $128, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $19, %edi<br class="">-; AVX2-NEXT: andl $64, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $21, %esi<br class="">-; AVX2-NEXT: andl $32, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $23, %edi<br class="">-; AVX2-NEXT: andl $16, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $25, %esi<br class="">-; AVX2-NEXT: andl $8, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: movl %ecx, %edi<br class="">-; AVX2-NEXT: shrl $27, %edi<br class="">-; AVX2-NEXT: andl $4, %edi<br class="">-; AVX2-NEXT: orl %esi, %edi<br class="">-; AVX2-NEXT: movl %ecx, %esi<br class="">-; AVX2-NEXT: shrl $29, %esi<br class="">-; AVX2-NEXT: andl $2, %esi<br class="">-; AVX2-NEXT: orl %edi, %esi<br class="">-; AVX2-NEXT: shrl $31, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: vmovd %ecx, %xmm2<br class="">-; AVX2-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrd $2, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $31, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $29, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $27, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $25, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $23, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $21, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $19, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $17, %esi<br class="">-; AVX2-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $15, %edx<br class="">-; AVX2-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $13, %esi<br class="">-; AVX2-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $11, %edx<br class="">-; AVX2-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $9, %esi<br class="">-; AVX2-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $7, %edx<br class="">-; AVX2-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $5, %esi<br class="">-; AVX2-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: leal (,%rax,8), %edx<br class="">-; AVX2-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $15, %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $17, %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $19, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $21, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $23, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $25, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $27, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $29, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $31, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2<br class="">-; AVX2-NEXT: vpextrd $3, %xmm0, %eax<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: shll $31, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: shll $29, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $4, %ecx<br class="">-; AVX2-NEXT: shll $27, %ecx<br class="">-; AVX2-NEXT: orl %edx, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: shll $25, %edx<br class="">-; AVX2-NEXT: orl %ecx, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: shll $23, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %ecx<br class="">-; AVX2-NEXT: andl $32, %ecx<br class="">-; AVX2-NEXT: shll $21, %ecx<br class="">-; AVX2-NEXT: orl %esi, %ecx<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: andl $64, %edx<br class="">-; AVX2-NEXT: shll $19, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $17, %esi<br class="">-; AVX2-NEXT: andl $16777216, %esi # imm = 0x1000000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $15, %edx<br class="">-; AVX2-NEXT: andl $8388608, %edx # imm = 0x800000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $13, %esi<br class="">-; AVX2-NEXT: andl $4194304, %esi # imm = 0x400000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $11, %edx<br class="">-; AVX2-NEXT: andl $2097152, %edx # imm = 0x200000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $9, %esi<br class="">-; AVX2-NEXT: andl $1048576, %esi # imm = 0x100000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shll $7, %edx<br class="">-; AVX2-NEXT: andl $524288, %edx # imm = 0x80000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shll $5, %esi<br class="">-; AVX2-NEXT: andl $262144, %esi # imm = 0x40000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: leal (,%rax,8), %edx<br class="">-; AVX2-NEXT: andl $131072, %edx # imm = 0x20000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: leal (%rax,%rax), %esi<br class="">-; AVX2-NEXT: andl $65536, %esi # imm = 0x10000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl %edx<br class="">-; AVX2-NEXT: andl $32768, %edx # imm = 0x8000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $3, %esi<br class="">-; AVX2-NEXT: andl $16384, %esi # imm = 0x4000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $5, %edx<br class="">-; AVX2-NEXT: andl $8192, %edx # imm = 0x2000<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $7, %esi<br class="">-; AVX2-NEXT: andl $4096, %esi # imm = 0x1000<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $9, %edx<br class="">-; AVX2-NEXT: andl $2048, %edx # imm = 0x800<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $11, %esi<br class="">-; AVX2-NEXT: andl $1024, %esi # imm = 0x400<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $13, %edx<br class="">-; AVX2-NEXT: andl $512, %edx # imm = 0x200<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $15, %esi<br class="">-; AVX2-NEXT: andl $256, %esi # imm = 0x100<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $17, %edx<br class="">-; AVX2-NEXT: andl $128, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $19, %esi<br class="">-; AVX2-NEXT: andl $64, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $21, %edx<br class="">-; AVX2-NEXT: andl $32, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $23, %esi<br class="">-; AVX2-NEXT: andl $16, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $25, %edx<br class="">-; AVX2-NEXT: andl $8, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: movl %eax, %esi<br class="">-; AVX2-NEXT: shrl $27, %esi<br class="">-; AVX2-NEXT: andl $4, %esi<br class="">-; AVX2-NEXT: orl %edx, %esi<br class="">-; AVX2-NEXT: movl %eax, %edx<br class="">-; AVX2-NEXT: shrl $29, %edx<br class="">-; AVX2-NEXT: andl $2, %edx<br class="">-; AVX2-NEXT: orl %esi, %edx<br class="">-; AVX2-NEXT: shrl $31, %eax<br class="">-; AVX2-NEXT: orl %edx, %eax<br class="">-; AVX2-NEXT: orl %ecx, %eax<br class="">-; AVX2-NEXT: vpinsrd $3, %eax, %xmm2, %xmm0<br class="">-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpslld $29, %ymm0, %ymm1<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2<br class="">+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm2<br class="">+; AVX2-NEXT: vpslld $31, %ymm0, %ymm1<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm3<br class="">+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1<br class="">+; AVX2-NEXT: vpslld $27, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $25, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $23, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $21, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $19, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $17, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $15, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $13, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $11, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $9, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $7, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $5, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $3, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpslld $1, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $1, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $3, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $5, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $7, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $9, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $11, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $13, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $15, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $17, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $19, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $21, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $23, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $25, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $27, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $29, %ymm0, %ymm3<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm4<br class="">+; AVX2-NEXT: vpand %ymm4, %ymm3, %ymm3<br class="">+; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2<br class="">+; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm3<br class="">+; AVX2-NEXT: vpand %ymm3, %ymm0, %ymm0<br class="">+; AVX2-NEXT: vpor %ymm0, %ymm2, %ymm0<br class="">+; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0<br class=""> ; AVX2-NEXT: retq<br class=""> ;<br class=""> ; XOPAVX1-LABEL: test_bitreverse_v8i32:<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits<br class=""></div></div></blockquote></div><br class=""></div></body></html>