<div dir="ltr">Oops. This and r<span style="font-size:12.8px">266966 where supposed to be 1 commit.</span></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Apr 21, 2016 at 12:30 AM, Craig Topper via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: ctopper<br>
Date: Thu Apr 21 02:30:03 2016<br>
New Revision: 266967<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=266967&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=266967&view=rev</a><br>
Log:<br>
[X86] Fix vector-tzcnt-512 test to disable CDI while enabling BWI for one of the runs. Update check patterns accordingly.<br>
<br>
Modified:<br>
llvm/trunk/test/CodeGen/X86/vector-tzcnt-512.ll<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/vector-tzcnt-512.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-tzcnt-512.ll?rev=266967&r1=266966&r2=266967&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-tzcnt-512.ll?rev=266967&r1=266966&r2=266967&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/vector-tzcnt-512.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/vector-tzcnt-512.ll Thu Apr 21 02:30:03 2016<br>
@@ -46,15 +46,63 @@ define <8 x i64> @testv8i64(<8 x i64> %i<br>
}<br>
<br>
define <8 x i64> @testv8i64u(<8 x i64> %in) nounwind {<br>
-; ALL-LABEL: testv8i64u:<br>
-; ALL: ## BB#0:<br>
-; ALL-NEXT: vpxord %zmm1, %zmm1, %zmm1<br>
-; ALL-NEXT: vpsubq %zmm0, %zmm1, %zmm1<br>
-; ALL-NEXT: vpandq %zmm1, %zmm0, %zmm0<br>
-; ALL-NEXT: vplzcntq %zmm0, %zmm0<br>
-; ALL-NEXT: vpbroadcastq {{.*}}(%rip), %zmm1<br>
-; ALL-NEXT: vpsubq %zmm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
+; AVX512CD-LABEL: testv8i64u:<br>
+; AVX512CD: ## BB#0:<br>
+; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1<br>
+; AVX512CD-NEXT: vpsubq %zmm0, %zmm1, %zmm1<br>
+; AVX512CD-NEXT: vpandq %zmm1, %zmm0, %zmm0<br>
+; AVX512CD-NEXT: vplzcntq %zmm0, %zmm0<br>
+; AVX512CD-NEXT: vpbroadcastq {{.*}}(%rip), %zmm1<br>
+; AVX512CD-NEXT: vpsubq %zmm0, %zmm1, %zmm0<br>
+; AVX512CD-NEXT: retq<br>
+;<br>
+; AVX512CDBW-LABEL: testv8i64u:<br>
+; AVX512CDBW: ## BB#0:<br>
+; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1<br>
+; AVX512CDBW-NEXT: vpsubq %zmm0, %zmm1, %zmm1<br>
+; AVX512CDBW-NEXT: vpandq %zmm1, %zmm0, %zmm0<br>
+; AVX512CDBW-NEXT: vplzcntq %zmm0, %zmm0<br>
+; AVX512CDBW-NEXT: vpbroadcastq {{.*}}(%rip), %zmm1<br>
+; AVX512CDBW-NEXT: vpsubq %zmm0, %zmm1, %zmm0<br>
+; AVX512CDBW-NEXT: retq<br>
+;<br>
+; AVX512BW-LABEL: testv8i64u:<br>
+; AVX512BW: ## BB#0:<br>
+; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm1<br>
+; AVX512BW-NEXT: vpextrq $1, %xmm1, %rax<br>
+; AVX512BW-NEXT: tzcntq %rax, %rax<br>
+; AVX512BW-NEXT: vmovq %rax, %xmm2<br>
+; AVX512BW-NEXT: vmovq %xmm1, %rax<br>
+; AVX512BW-NEXT: tzcntq %rax, %rax<br>
+; AVX512BW-NEXT: vmovq %rax, %xmm1<br>
+; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]<br>
+; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm2<br>
+; AVX512BW-NEXT: vpextrq $1, %xmm2, %rax<br>
+; AVX512BW-NEXT: tzcntq %rax, %rax<br>
+; AVX512BW-NEXT: vmovq %rax, %xmm3<br>
+; AVX512BW-NEXT: vmovq %xmm2, %rax<br>
+; AVX512BW-NEXT: tzcntq %rax, %rax<br>
+; AVX512BW-NEXT: vmovq %rax, %xmm2<br>
+; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]<br>
+; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1<br>
+; AVX512BW-NEXT: vextracti32x4 $1, %zmm0, %xmm2<br>
+; AVX512BW-NEXT: vpextrq $1, %xmm2, %rax<br>
+; AVX512BW-NEXT: tzcntq %rax, %rax<br>
+; AVX512BW-NEXT: vmovq %rax, %xmm3<br>
+; AVX512BW-NEXT: vmovq %xmm2, %rax<br>
+; AVX512BW-NEXT: tzcntq %rax, %rax<br>
+; AVX512BW-NEXT: vmovq %rax, %xmm2<br>
+; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]<br>
+; AVX512BW-NEXT: vpextrq $1, %xmm0, %rax<br>
+; AVX512BW-NEXT: tzcntq %rax, %rax<br>
+; AVX512BW-NEXT: vmovq %rax, %xmm3<br>
+; AVX512BW-NEXT: vmovq %xmm0, %rax<br>
+; AVX512BW-NEXT: tzcntq %rax, %rax<br>
+; AVX512BW-NEXT: vmovq %rax, %xmm0<br>
+; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]<br>
+; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0<br>
+; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
+; AVX512BW-NEXT: retq<br>
%out = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> %in, i1 -1)<br>
ret <8 x i64> %out<br>
}<br>
@@ -122,15 +170,83 @@ define <16 x i32> @testv16i32(<16 x i32><br>
}<br>
<br>
define <16 x i32> @testv16i32u(<16 x i32> %in) nounwind {<br>
-; ALL-LABEL: testv16i32u:<br>
-; ALL: ## BB#0:<br>
-; ALL-NEXT: vpxord %zmm1, %zmm1, %zmm1<br>
-; ALL-NEXT: vpsubd %zmm0, %zmm1, %zmm1<br>
-; ALL-NEXT: vpandd %zmm1, %zmm0, %zmm0<br>
-; ALL-NEXT: vplzcntd %zmm0, %zmm0<br>
-; ALL-NEXT: vpbroadcastd {{.*}}(%rip), %zmm1<br>
-; ALL-NEXT: vpsubd %zmm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
+; AVX512CD-LABEL: testv16i32u:<br>
+; AVX512CD: ## BB#0:<br>
+; AVX512CD-NEXT: vpxord %zmm1, %zmm1, %zmm1<br>
+; AVX512CD-NEXT: vpsubd %zmm0, %zmm1, %zmm1<br>
+; AVX512CD-NEXT: vpandd %zmm1, %zmm0, %zmm0<br>
+; AVX512CD-NEXT: vplzcntd %zmm0, %zmm0<br>
+; AVX512CD-NEXT: vpbroadcastd {{.*}}(%rip), %zmm1<br>
+; AVX512CD-NEXT: vpsubd %zmm0, %zmm1, %zmm0<br>
+; AVX512CD-NEXT: retq<br>
+;<br>
+; AVX512CDBW-LABEL: testv16i32u:<br>
+; AVX512CDBW: ## BB#0:<br>
+; AVX512CDBW-NEXT: vpxord %zmm1, %zmm1, %zmm1<br>
+; AVX512CDBW-NEXT: vpsubd %zmm0, %zmm1, %zmm1<br>
+; AVX512CDBW-NEXT: vpandd %zmm1, %zmm0, %zmm0<br>
+; AVX512CDBW-NEXT: vplzcntd %zmm0, %zmm0<br>
+; AVX512CDBW-NEXT: vpbroadcastd {{.*}}(%rip), %zmm1<br>
+; AVX512CDBW-NEXT: vpsubd %zmm0, %zmm1, %zmm0<br>
+; AVX512CDBW-NEXT: retq<br>
+;<br>
+; AVX512BW-LABEL: testv16i32u:<br>
+; AVX512BW: ## BB#0:<br>
+; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm1<br>
+; AVX512BW-NEXT: vpextrd $1, %xmm1, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vmovd %xmm1, %ecx<br>
+; AVX512BW-NEXT: tzcntl %ecx, %ecx<br>
+; AVX512BW-NEXT: vmovd %ecx, %xmm2<br>
+; AVX512BW-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2<br>
+; AVX512BW-NEXT: vpextrd $2, %xmm1, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2<br>
+; AVX512BW-NEXT: vpextrd $3, %xmm1, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vpinsrd $3, %eax, %xmm2, %xmm1<br>
+; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm2<br>
+; AVX512BW-NEXT: vpextrd $1, %xmm2, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vmovd %xmm2, %ecx<br>
+; AVX512BW-NEXT: tzcntl %ecx, %ecx<br>
+; AVX512BW-NEXT: vmovd %ecx, %xmm3<br>
+; AVX512BW-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3<br>
+; AVX512BW-NEXT: vpextrd $2, %xmm2, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3<br>
+; AVX512BW-NEXT: vpextrd $3, %xmm2, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vpinsrd $3, %eax, %xmm3, %xmm2<br>
+; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1<br>
+; AVX512BW-NEXT: vextracti32x4 $1, %zmm0, %xmm2<br>
+; AVX512BW-NEXT: vpextrd $1, %xmm2, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vmovd %xmm2, %ecx<br>
+; AVX512BW-NEXT: tzcntl %ecx, %ecx<br>
+; AVX512BW-NEXT: vmovd %ecx, %xmm3<br>
+; AVX512BW-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3<br>
+; AVX512BW-NEXT: vpextrd $2, %xmm2, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3<br>
+; AVX512BW-NEXT: vpextrd $3, %xmm2, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vpinsrd $3, %eax, %xmm3, %xmm2<br>
+; AVX512BW-NEXT: vpextrd $1, %xmm0, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vmovd %xmm0, %ecx<br>
+; AVX512BW-NEXT: tzcntl %ecx, %ecx<br>
+; AVX512BW-NEXT: vmovd %ecx, %xmm3<br>
+; AVX512BW-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3<br>
+; AVX512BW-NEXT: vpextrd $2, %xmm0, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3<br>
+; AVX512BW-NEXT: vpextrd $3, %xmm0, %eax<br>
+; AVX512BW-NEXT: tzcntl %eax, %eax<br>
+; AVX512BW-NEXT: vpinsrd $3, %eax, %xmm3, %xmm0<br>
+; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0<br>
+; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
+; AVX512BW-NEXT: retq<br>
%out = call <16 x i32> @llvm.cttz.v16i32(<16 x i32> %in, i1 -1)<br>
ret <16 x i32> %out<br>
}<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature">~Craig</div>
</div>