<div dir="ltr">This commit breaks the sanitizer-windows bot:<div><br></div><div><a href="http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882">http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882</a><br></div><div><br></div><div><div>FAILED: C:\PROGRA~2\MICROS~1.0\VC\bin\cl.exe /nologo /TP /DWIN32 /D_WINDOWS /W3 -wd4141 -wd4146 -wd4180 -wd4244 -wd4258 -wd4267 -wd4291 -wd4345 -wd4351 -wd4355 -wd4456 -wd4457 -wd4458 -wd4459 -wd4503 -wd4624 -wd4722 -wd4800 -wd4100 -wd4127 -wd4512 -wd4505 -wd4610 -wd4510 -wd4702 -wd4245 -wd4706 -wd4310 -wd4701 -wd4703 -wd4389 -wd4611 -wd4805 -wd4204 -wd4577 -wd4091 -wd4592 -wd4319 -wd4324 -w14062 -we4238 /Zc:inline /Oi /Zc:rvalueCast /MD /O2 /Ob2 -Ilib\Target\AArch64 -IC:\b\slave\sanitizer-windows\llvm\lib\Target\AArch64 -Iinclude -IC:\b\slave\sanitizer-windows\llvm\include -UNDEBUG /EHs-c- /GR- /showIncludes -DGTEST_HAS_RTTI=0 -D_CRT_NONSTDC_NO_DEPRECATE -D_CRT_NONSTDC_NO_WARNINGS -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS -D_DEBUG_POINTER_IMPL="" -D_HAS_EXCEPTIONS=0 -D_SCL_SECURE_NO_DEPRECATE -D_SCL_SECURE_NO_WARNINGS -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS /Folib\Target\AArch64\CMakeFiles\LLVMAArch64CodeGen.dir\AArch64TargetMachine.cpp.obj /Fdlib\Target\AArch64\CMakeFiles\LLVMAArch64CodeGen.dir\ /FS -c C:\b\slave\sanitizer-windows\llvm\lib\Target\AArch64\AArch64TargetMachine.cpp</div><div>C:\Program Files (x86)\Microsoft Visual Studio 12.0\VC\INCLUDE\xstddef(316) : error C2280: 'std::unique_ptr<llvm::RegisterBankInfo::ValueMapping [],std::default_delete<_Ty>>::unique_ptr(const std::unique_ptr<_Ty,std::default_delete<_Ty>> &)' : attempting to reference a deleted function</div><div> with</div><div> [</div><div> _Ty=llvm::RegisterBankInfo::ValueMapping []</div><div> ]</div><div> C:\Program Files (x86)\Microsoft Visual Studio 12.0\VC\INCLUDE\memory(1618) : see declaration of 'std::unique_ptr<llvm::RegisterBankInfo::ValueMapping [],std::default_delete<_Ty>>::unique_ptr'</div><div> with</div><div> [</div><div> _Ty=llvm::RegisterBankInfo::ValueMapping []</div><div> ]</div><div> This diagnostic occurred in the compiler generated function 'llvm::RegisterBankInfo::InstructionMapping::InstructionMapping(const llvm::RegisterBankInfo::InstructionMapping &)'</div></div><div><br></div></div><br><div class="gmail_quote"><div dir="ltr">On Wed, Apr 6, 2016 at 10:51 AM Quentin Colombet via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: qcolombet<br>
Date: Wed Apr 6 12:45:40 2016<br>
New Revision: 265573<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=265573&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=265573&view=rev</a><br>
Log:<br>
[RegisterBankInfo] Add methods to get the possible mapping of an instruction on a register bank.<br>
This will be used by the register bank select pass to assign register banks<br>
for generic virtual registers.<br>
<br>
Modified:<br>
llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h<br>
llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h?rev=265573&r1=265572&r2=265573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h?rev=265573&r1=265572&r2=265573&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h Wed Apr 6 12:45:40 2016<br>
@@ -16,6 +16,7 @@<br>
#define LLVM_CODEGEN_GLOBALISEL_REGBANKINFO_H<br>
<br>
#include "llvm/ADT/APInt.h"<br>
+#include "llvm/ADT/SmallVector.h"<br>
#include "llvm/CodeGen/GlobalISel/RegisterBank.h"<br>
#include "llvm/CodeGen/GlobalISel/Types.h"<br>
#include "llvm/Support/ErrorHandling.h"<br>
@@ -123,6 +124,11 @@ public:<br>
void verify(const MachineInstr &MI) const;<br>
};<br>
<br>
+ /// Convenient type to represent the alternatives for mapping an<br>
+ /// instruction.<br>
+ /// \todo When we move to TableGen this should be an array ref.<br>
+ typedef SmallVector<InstructionMapping, 4> InstructionMappings;<br>
+<br>
protected:<br>
/// Hold the set of supported register banks.<br>
std::unique_ptr<RegisterBank[]> RegBanks;<br>
@@ -196,6 +202,69 @@ public:<br>
return 0;<br>
}<br>
<br>
+ /// Identifier used when the related instruction mapping instance<br>
+ /// is generated by target independent code.<br>
+ /// Make sure not to use that identifier to avoid possible collision.<br>
+ static const unsigned DefaultMappingID;<br>
+<br>
+ /// Get the mapping of the different operands of \p MI<br>
+ /// on the register bank.<br>
+ /// This mapping should be the direct translation of \p MI.<br>
+ /// The target independent implementation gives a mapping based on<br>
+ /// the register classes for the target specific opcode.<br>
+ /// It uses the ID RegisterBankInfo::DefaultMappingID for that mapping.<br>
+ /// Make sure you do not use that ID for the alternative mapping<br>
+ /// for MI. See getInstrAlternativeMappings for the alternative<br>
+ /// mappings.<br>
+ ///<br>
+ /// For instance, if \p MI is a vector add, the mapping should<br>
+ /// not be a scalarization of the add.<br>
+ ///<br>
+ /// \post returnedVal.verify(MI).<br>
+ ///<br>
+ /// \note If returnedVal does not verify MI, this would probably mean<br>
+ /// that the target does not support that instruction.<br>
+ virtual InstructionMapping getInstrMapping(const MachineInstr &MI) const;<br>
+<br>
+ /// Get the alternative mappings for \p MI.<br>
+ /// Alternative in the sense different from getInstrMapping.<br>
+ virtual InstructionMappings<br>
+ getInstrAlternativeMappings(const MachineInstr &MI) const {<br>
+ // No alternative for MI.<br>
+ return InstructionMappings();<br>
+ }<br>
+<br>
+ /// Get the possible mapping for \p MI.<br>
+ /// A mapping defines where the different operands may live and at what cost.<br>
+ /// For instance, let us consider:<br>
+ /// v0(16) = G_ADD <2 x i8> v1, v2<br>
+ /// The possible mapping could be:<br>
+ ///<br>
+ /// {/*ID*/VectorAdd, /*Cost*/1, /*v0*/{(0xFFFF, VPR)}, /*v1*/{(0xFFFF, VPR)},<br>
+ /// /*v2*/{(0xFFFF, VPR)}}<br>
+ /// {/*ID*/ScalarAddx2, /*Cost*/2, /*v0*/{(0x00FF, GPR),(0xFF00, GPR)},<br>
+ /// /*v1*/{(0x00FF, GPR),(0xFF00, GPR)},<br>
+ /// /*v2*/{(0x00FF, GPR),(0xFF00, GPR)}}<br>
+ ///<br>
+ /// \note The first alternative of the returned mapping should be the<br>
+ /// direct translation of \p MI current form.<br>
+ ///<br>
+ /// \post !returnedVal.empty().<br>
+ InstructionMappings getInstrPossibleMappings(const MachineInstr &MI) const {<br>
+ InstructionMappings PossibleMappings;<br>
+ // Put the default mapping first.<br>
+ PossibleMappings.push_back(getInstrMapping(MI));<br>
+ // Then the alternative mapping, if any.<br>
+ InstructionMappings AltMappings = getInstrAlternativeMappings(MI);<br>
+ for (InstructionMapping &AltMapping : AltMappings)<br>
+ PossibleMappings.emplace_back(std::move(AltMapping));<br>
+#ifndef NDEBUG<br>
+ for (const InstructionMapping &Mapping : PossibleMappings)<br>
+ Mapping.verify(MI);<br>
+#endif<br>
+ return PossibleMappings;<br>
+ }<br>
+<br>
void verify(const TargetRegisterInfo &TRI) const;<br>
};<br>
<br>
<br>
Modified: llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp?rev=265573&r1=265572&r2=265573&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp?rev=265573&r1=265572&r2=265573&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp Wed Apr 6 12:45:40 2016<br>
@@ -19,6 +19,7 @@<br>
#include "llvm/CodeGen/MachineRegisterInfo.h"<br>
#include "llvm/Support/Debug.h"<br>
#include "llvm/Support/raw_ostream.h"<br>
+#include "llvm/Target/TargetOpcodes.h"<br>
#include "llvm/Target/TargetRegisterInfo.h"<br>
<br>
#include <algorithm> // For std::max.<br>
@@ -27,6 +28,8 @@<br>
<br>
using namespace llvm;<br>
<br>
+const unsigned RegisterBankInfo::DefaultMappingID = UINT_MAX;<br>
+<br>
RegisterBankInfo::RegisterBankInfo(unsigned NumRegBanks)<br>
: NumRegBanks(NumRegBanks) {<br>
RegBanks.reset(new RegisterBank[NumRegBanks]);<br>
@@ -176,6 +179,14 @@ void RegisterBankInfo::addRegBankCoverag<br>
} while (!WorkList.empty());<br>
}<br>
<br>
+RegisterBankInfo::InstructionMapping<br>
+RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {<br>
+ if (MI.getOpcode() > TargetOpcode::GENERIC_OP_END) {<br>
+ // TODO.<br>
+ }<br>
+ llvm_unreachable("The target must implement this");<br>
+}<br>
+<br>
//------------------------------------------------------------------------------<br>
// Helper classes implementation.<br>
//------------------------------------------------------------------------------<br>
<br>
<br>
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</blockquote></div><div dir="ltr">-- <br></div>Mike<br>Sent from phone