<div dir="ltr">Test cases?</div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Mar 1, 2016 at 7:33 PM, Matt Arsenault via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: arsenm<br>
Date: Tue Mar  1 21:33:55 2016<br>
New Revision: 262455<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=262455&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=262455&view=rev</a><br>
Log:<br>
Bug 20810: Use report_fatal_error instead of unreachable<br>
<br>
Modified:<br>
    llvm/trunk/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp?rev=262455&r1=262454&r2=262455&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp?rev=262455&r1=262454&r2=262455&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp (original)<br>
+++ llvm/trunk/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp Tue Mar  1 21:33:55 2016<br>
@@ -923,7 +923,7 @@ bool AMDGPUCFGStructurizer::run() {<br>
<br>
   if (!Finish) {<br>
     DEBUG(FuncRep->viewCFG());<br>
-    llvm_unreachable("IRREDUCIBLE_CFG");<br>
+    report_fatal_error("IRREDUCIBLE_CFG");<br>
   }<br>
<br>
   return true;<br>
@@ -1413,10 +1413,10 @@ int AMDGPUCFGStructurizer::improveSimple<br>
   MachineBasicBlock::iterator I = insertInstrBefore(LandBlk, AMDGPU::ENDIF);<br>
<br>
   if (LandBlkHasOtherPred) {<br>
-    llvm_unreachable("Extra register needed to handle CFG");<br>
+    report_fatal_error("Extra register needed to handle CFG");<br>
     unsigned CmpResReg =<br>
       HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC);<br>
-    llvm_unreachable("Extra compare instruction needed to handle CFG");<br>
+    report_fatal_error("Extra compare instruction needed to handle CFG");<br>
     insertCondBranchBefore(LandBlk, I, AMDGPU::IF_PREDICATE_SET,<br>
         CmpResReg, DebugLoc());<br>
   }<br>
@@ -1433,7 +1433,7 @@ int AMDGPUCFGStructurizer::improveSimple<br>
     // need to uncondionally insert the assignment to ensure a path from its<br>
     // predecessor rather than headBlk has valid value in initReg if<br>
     // (initVal != 1).<br>
-    llvm_unreachable("Extra register needed to handle CFG");<br>
+    report_fatal_error("Extra register needed to handle CFG");<br>
   }<br>
   insertInstrBefore(I, AMDGPU::ELSE);<br>
<br>
@@ -1442,7 +1442,7 @@ int AMDGPUCFGStructurizer::improveSimple<br>
     // need to uncondionally insert the assignment to ensure a path from its<br>
     // predecessor rather than headBlk has valid value in initReg if<br>
     // (initVal != 0)<br>
-    llvm_unreachable("Extra register needed to handle CFG");<br>
+    report_fatal_error("Extra register needed to handle CFG");<br>
   }<br>
<br>
   if (LandBlkHasOtherPred) {<br>
@@ -1454,7 +1454,7 @@ int AMDGPUCFGStructurizer::improveSimple<br>
          PE = LandBlk->pred_end(); PI != PE; ++PI) {<br>
       MachineBasicBlock *MBB = *PI;<br>
       if (MBB != TrueMBB && MBB != FalseMBB)<br>
-        llvm_unreachable("Extra register needed to handle CFG");<br>
+        report_fatal_error("Extra register needed to handle CFG");<br>
     }<br>
   }<br>
   DEBUG(<br>
<br>
<br>
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</blockquote></div><br></div>