<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">If they’re overwriting the Predicates like this one was, they could have the same problem.<div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Feb 19, 2016, at 9:09 AM, Roman Divacky <<a href="mailto:rdivacky@vlakno.cz" class="">rdivacky@vlakno.cz</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">What about the other cases of Requires[OptForSize] in the same file?</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">On Thu, Feb 18, 2016 at 10:11:59PM +0000, Dimitry Andric via llvm-commits wrote:</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">dim created this revision.<br class="">dim added reviewers: joker.eph, grosbach, resistor.<br class="">dim added a subscriber: llvm-commits.<br class=""><br class="">When optimizing for size, sqrt calls can be incorrectly selected as<br class="">AVX512 VSQRT instructions. This is because X86InstrAVX512.td has a<br class="">`Requires<[OptForSize]>` in its `avx512_sqrt_scalar` multiclass<br class="">definition. Even if the target does not support AVX512, the class can<br class="">apparently still be chosen, leading to an incorrect selection of<br class="">`vsqrtss`.<br class=""><br class="">In PR26625, this lead to an assertion: Reg >= X86::FP0 && Reg <=<br class="">X86::FP6 && "Expected FP register!", because the `vsqrtss` instruction<br class="">requires an XMM register, which is not available on i686 CPUs.<br class=""><br class=""><a href="http://reviews.llvm.org/D17414" class="">http://reviews.llvm.org/D17414</a><br class=""><br class="">Files:<br class=""> lib/Target/X86/X86InstrAVX512.td<br class=""> test/CodeGen/X86/pr26625.ll<br class=""><br class="">Index: test/CodeGen/X86/pr26625.ll<br class="">===================================================================<br class="">--- /dev/null<br class="">+++ test/CodeGen/X86/pr26625.ll<br class="">@@ -0,0 +1,20 @@<br class="">+; RUN: llc < %s -mcpu=i686 2>&1 | FileCheck %s<br class="">+; PR26625<br class="">+<br class="">+target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"<br class="">+target triple = "i386"<br class="">+<br class="">+define float @x0(float %f) #0 {<br class="">+entry:<br class="">+ %call = tail call float @sqrtf(float %f) #1<br class="">+ ret float %call<br class="">+; CHECK-LABEL: x0:<br class="">+; CHECK: flds<br class="">+; CHECK-NEXT: fsqrt<br class="">+; CHECK-NOT: vsqrtss<br class="">+}<br class="">+<br class="">+declare float @sqrtf(float) #0<br class="">+<br class="">+attributes #0 = { nounwind optsize readnone }<br class="">+attributes #1 = { nounwind optsize readnone }<br class="">Index: lib/Target/X86/X86InstrAVX512.td<br class="">===================================================================<br class="">--- lib/Target/X86/X86InstrAVX512.td<br class="">+++ lib/Target/X86/X86InstrAVX512.td<br class="">@@ -6005,7 +6005,7 @@<br class=""><br class=""> def : Pat<(_.EltVT (OpNode (load addr:$src))),<br class=""> (!cast<Instruction>(NAME#SUFF#Zm)<br class="">- (_.EltVT (IMPLICIT_DEF)), addr:$src)>, Requires<[OptForSize]>;<br class="">+ (_.EltVT (IMPLICIT_DEF)), addr:$src)>, Requires<[HasAVX512, OptForSize]>;<br class="">}<br class=""><br class="">multiclass avx512_sqrt_scalar_all<bits<8> opc, string OpcodeStr> {<br class=""><br class=""><br class=""></blockquote><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">Index: test/CodeGen/X86/pr26625.ll<br class="">===================================================================<br class="">--- /dev/null<br class="">+++ test/CodeGen/X86/pr26625.ll<br class="">@@ -0,0 +1,20 @@<br class="">+; RUN: llc < %s -mcpu=i686 2>&1 | FileCheck %s<br class="">+; PR26625<br class="">+<br class="">+target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"<br class="">+target triple = "i386"<br class="">+<br class="">+define float @x0(float %f) #0 {<br class="">+entry:<br class="">+ %call = tail call float @sqrtf(float %f) #1<br class="">+ ret float %call<br class="">+; CHECK-LABEL: x0:<br class="">+; CHECK: flds<br class="">+; CHECK-NEXT: fsqrt<br class="">+; CHECK-NOT: vsqrtss<br class="">+}<br class="">+<br class="">+declare float @sqrtf(float) #0<br class="">+<br class="">+attributes #0 = { nounwind optsize readnone }<br class="">+attributes #1 = { nounwind optsize readnone }<br class="">Index: lib/Target/X86/X86InstrAVX512.td<br class="">===================================================================<br class="">--- lib/Target/X86/X86InstrAVX512.td<br class="">+++ lib/Target/X86/X86InstrAVX512.td<br class="">@@ -6005,7 +6005,7 @@<br class=""><br class=""> def : Pat<(_.EltVT (OpNode (load addr:$src))),<br class=""> (!cast<Instruction>(NAME#SUFF#Zm)<br class="">- (_.EltVT (IMPLICIT_DEF)), addr:$src)>, Requires<[OptForSize]>;<br class="">+ (_.EltVT (IMPLICIT_DEF)), addr:$src)>, Requires<[HasAVX512, OptForSize]>;<br class="">}<br class=""><br class="">multiclass avx512_sqrt_scalar_all<bits<8> opc, string OpcodeStr> {<br class=""></blockquote><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant-caps: normal; font-weight: normal; letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a><br class=""><a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" class="">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a></blockquote></div></blockquote></div><br class=""></div></body></html>