<div dir="ltr">Hi Petar,<div><br></div><div>This patch causes `make check` to fail when the ppc backend isn't built:</div><blockquote style="margin:0 0 0 40px;border:none;padding:0px"><div><div><font face="monospace, monospace">--</font></div></div><div><div><font face="monospace, monospace">/b/build/slave/linux/build/src/src/work/llvm-out/./bin/llc -mtriple=powerpc-unknown-linux-gnu -O0 < /b/build/slave/linux/build/src/src/work/llvm/test/CodeGen/ppcf128sf.ll | /b/build/slave/linux/build/src/src/work/llvm-out/./bin/FileCheck /b/build/slave/linux/build/src/src/work/llvm/test/CodeGen/ppcf128sf.ll</font></div></div><div><div><font face="monospace, monospace">--</font></div></div><div><div><font face="monospace, monospace">Exit Code: 2</font></div></div><div><div><font face="monospace, monospace"><br></font></div></div><div><div><font face="monospace, monospace">Command Output (stderr):</font></div></div><div><div><font face="monospace, monospace">--</font></div></div><div><div><font face="monospace, monospace">/b/build/slave/linux/build/src/src/work/llvm-out/./bin/llc: : error: unable to get target for 'powerpc-unknown-linux-gnu', see --version and --triple.</font></div></div><div><div><font face="monospace, monospace">FileCheck error: '-' is empty.</font></div></div></blockquote><div><br></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Feb 4, 2016 at 6:43 AM, Petar Jovanovic via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: petarj<br>
Date: Thu Feb 4 08:43:50 2016<br>
New Revision: 259791<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=259791&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=259791&view=rev</a><br>
Log:<br>
[Power PC] softening long double type<br>
<br>
This patch implements softening of long double type (ppcf128) on ppc32<br>
architecture and enables operations for this type for soft float.<br>
<br>
Patch by Strahinja Petrovic.<br>
<br>
Differential Revision: <a href="http://reviews.llvm.org/D15811" rel="noreferrer" target="_blank">http://reviews.llvm.org/D15811</a><br>
<br>
Added:<br>
llvm/trunk/test/CodeGen/ppcf128sf.ll<br>
Modified:<br>
llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h<br>
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp<br>
llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h?rev=259791&r1=259790&r2=259791&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h?rev=259791&r1=259790&r2=259791&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/RuntimeLibcalls.h Thu Feb 4 08:43:50 2016<br>
@@ -215,6 +215,8 @@ namespace RTLIB {<br>
FMAX_PPCF128,<br>
<br>
// CONVERSION<br>
+ FPEXT_F32_PPCF128,<br>
+ FPEXT_F64_PPCF128,<br>
FPEXT_F64_F128,<br>
FPEXT_F32_F128,<br>
FPEXT_F32_F64,<br>
@@ -296,27 +298,35 @@ namespace RTLIB {<br>
OEQ_F32,<br>
OEQ_F64,<br>
OEQ_F128,<br>
+ OEQ_PPCF128,<br>
UNE_F32,<br>
UNE_F64,<br>
UNE_F128,<br>
+ UNE_PPCF128,<br>
OGE_F32,<br>
OGE_F64,<br>
OGE_F128,<br>
+ OGE_PPCF128,<br>
OLT_F32,<br>
OLT_F64,<br>
OLT_F128,<br>
+ OLT_PPCF128,<br>
OLE_F32,<br>
OLE_F64,<br>
OLE_F128,<br>
+ OLE_PPCF128,<br>
OGT_F32,<br>
OGT_F64,<br>
OGT_F128,<br>
+ OGT_PPCF128,<br>
UO_F32,<br>
UO_F64,<br>
UO_F128,<br>
+ UO_PPCF128,<br>
O_F32,<br>
O_F64,<br>
O_F128,<br>
+ O_PPCF128,<br>
<br>
// MEMORY<br>
MEMCPY,<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=259791&r1=259790&r2=259791&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=259791&r1=259790&r2=259791&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Thu Feb 4 08:43:50 2016<br>
@@ -122,7 +122,7 @@ void TargetLowering::softenSetCCOperands<br>
SDValue &NewLHS, SDValue &NewRHS,<br>
ISD::CondCode &CCCode,<br>
SDLoc dl) const {<br>
- assert((VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)<br>
+ assert((VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128 || VT == MVT::ppcf128)<br>
&& "Unsupported setcc type!");<br>
<br>
// Expand into one or more soft-fp libcall(s).<br>
@@ -132,53 +132,65 @@ void TargetLowering::softenSetCCOperands<br>
case ISD::SETEQ:<br>
case ISD::SETOEQ:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OEQ_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OEQ_F128 : RTLIB::OEQ_PPCF128;<br>
break;<br>
case ISD::SETNE:<br>
case ISD::SETUNE:<br>
LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 :<br>
- (VT == MVT::f64) ? RTLIB::UNE_F64 : RTLIB::UNE_F128;<br>
+ (VT == MVT::f64) ? RTLIB::UNE_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::UNE_F128 : RTLIB::UNE_PPCF128;<br>
break;<br>
case ISD::SETGE:<br>
case ISD::SETOGE:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OGE_F64 : RTLIB::OGE_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OGE_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OGE_F128 : RTLIB::OGE_PPCF128;<br>
break;<br>
case ISD::SETLT:<br>
case ISD::SETOLT:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OLT_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OLT_F128 : RTLIB::OLT_PPCF128;<br>
break;<br>
case ISD::SETLE:<br>
case ISD::SETOLE:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OLE_F64 : RTLIB::OLE_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OLE_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OLE_F128 : RTLIB::OLE_PPCF128;<br>
break;<br>
case ISD::SETGT:<br>
case ISD::SETOGT:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OGT_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OGT_F128 : RTLIB::OGT_PPCF128;<br>
break;<br>
case ISD::SETUO:<br>
LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 :<br>
- (VT == MVT::f64) ? RTLIB::UO_F64 : RTLIB::UO_F128;<br>
+ (VT == MVT::f64) ? RTLIB::UO_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::UO_F128 : RTLIB::UO_PPCF128;<br>
break;<br>
case ISD::SETO:<br>
LC1 = (VT == MVT::f32) ? RTLIB::O_F32 :<br>
- (VT == MVT::f64) ? RTLIB::O_F64 : RTLIB::O_F128;<br>
+ (VT == MVT::f64) ? RTLIB::O_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::O_F128 : RTLIB::O_PPCF128;<br>
break;<br>
case ISD::SETONE:<br>
// SETONE = SETOLT | SETOGT<br>
LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OLT_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OLT_F128 : RTLIB::OLT_PPCF128;<br>
LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OGT_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OGT_F128 : RTLIB::OGT_PPCF128;<br>
break;<br>
case ISD::SETUEQ:<br>
LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 :<br>
- (VT == MVT::f64) ? RTLIB::UO_F64 : RTLIB::UO_F128;<br>
+ (VT == MVT::f64) ? RTLIB::UO_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::UO_F64 : RTLIB::UO_PPCF128;<br>
LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OEQ_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OEQ_F128 : RTLIB::OEQ_PPCF128;<br>
break;<br>
default:<br>
// Invert CC for unordered comparisons<br>
@@ -186,19 +198,23 @@ void TargetLowering::softenSetCCOperands<br>
switch (CCCode) {<br>
case ISD::SETULT:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OGE_F64 : RTLIB::OGE_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OGE_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OGE_F128 : RTLIB::OGE_PPCF128;<br>
break;<br>
case ISD::SETULE:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OGT_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OGT_F128 : RTLIB::OGT_PPCF128;<br>
break;<br>
case ISD::SETUGT:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OLE_F64 : RTLIB::OLE_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OLE_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OLE_F128 : RTLIB::OLE_PPCF128;<br>
break;<br>
case ISD::SETUGE:<br>
LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :<br>
- (VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;<br>
+ (VT == MVT::f64) ? RTLIB::OLT_F64 :<br>
+ (VT == MVT::f128) ? RTLIB::OLT_F128 : RTLIB::OLT_PPCF128;<br>
break;<br>
default: llvm_unreachable("Do not know how to soften this setcc!");<br>
}<br>
<br>
Modified: llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp?rev=259791&r1=259790&r2=259791&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp?rev=259791&r1=259790&r2=259791&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp Thu Feb 4 08:43:50 2016<br>
@@ -231,6 +231,8 @@ static void InitLibcallNames(const char<br>
Names[RTLIB::COPYSIGN_F80] = "copysignl";<br>
Names[RTLIB::COPYSIGN_F128] = "copysignl";<br>
Names[RTLIB::COPYSIGN_PPCF128] = "copysignl";<br>
+ Names[RTLIB::FPEXT_F32_PPCF128] = "__gcc_stoq";<br>
+ Names[RTLIB::FPEXT_F64_PPCF128] = "__gcc_dtoq";<br>
Names[RTLIB::FPEXT_F64_F128] = "__extenddftf2";<br>
Names[RTLIB::FPEXT_F32_F128] = "__extendsftf2";<br>
Names[RTLIB::FPEXT_F32_F64] = "__extendsfdf2";<br>
@@ -243,10 +245,10 @@ static void InitLibcallNames(const char<br>
Names[RTLIB::FPROUND_F64_F32] = "__truncdfsf2";<br>
Names[RTLIB::FPROUND_F80_F32] = "__truncxfsf2";<br>
Names[RTLIB::FPROUND_F128_F32] = "__trunctfsf2";<br>
- Names[RTLIB::FPROUND_PPCF128_F32] = "__trunctfsf2";<br>
+ Names[RTLIB::FPROUND_PPCF128_F32] = "__gcc_qtos";<br>
Names[RTLIB::FPROUND_F80_F64] = "__truncxfdf2";<br>
Names[RTLIB::FPROUND_F128_F64] = "__trunctfdf2";<br>
- Names[RTLIB::FPROUND_PPCF128_F64] = "__trunctfdf2";<br>
+ Names[RTLIB::FPROUND_PPCF128_F64] = "__gcc_qtod";<br>
Names[RTLIB::FPTOSINT_F32_I32] = "__fixsfsi";<br>
Names[RTLIB::FPTOSINT_F32_I64] = "__fixsfdi";<br>
Names[RTLIB::FPTOSINT_F32_I128] = "__fixsfti";<br>
@@ -259,7 +261,7 @@ static void InitLibcallNames(const char<br>
Names[RTLIB::FPTOSINT_F128_I32] = "__fixtfsi";<br>
Names[RTLIB::FPTOSINT_F128_I64] = "__fixtfdi";<br>
Names[RTLIB::FPTOSINT_F128_I128] = "__fixtfti";<br>
- Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";<br>
+ Names[RTLIB::FPTOSINT_PPCF128_I32] = "__gcc_qtou";<br>
Names[RTLIB::FPTOSINT_PPCF128_I64] = "__fixtfdi";<br>
Names[RTLIB::FPTOSINT_PPCF128_I128] = "__fixtfti";<br>
Names[RTLIB::FPTOUINT_F32_I32] = "__fixunssfsi";<br>
@@ -281,7 +283,7 @@ static void InitLibcallNames(const char<br>
Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";<br>
Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";<br>
Names[RTLIB::SINTTOFP_I32_F128] = "__floatsitf";<br>
- Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";<br>
+ Names[RTLIB::SINTTOFP_I32_PPCF128] = "__gcc_itoq";<br>
Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";<br>
Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";<br>
Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";<br>
@@ -296,7 +298,7 @@ static void InitLibcallNames(const char<br>
Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";<br>
Names[RTLIB::UINTTOFP_I32_F80] = "__floatunsixf";<br>
Names[RTLIB::UINTTOFP_I32_F128] = "__floatunsitf";<br>
- Names[RTLIB::UINTTOFP_I32_PPCF128] = "__floatunsitf";<br>
+ Names[RTLIB::UINTTOFP_I32_PPCF128] = "__gcc_utoq";<br>
Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";<br>
Names[RTLIB::UINTTOFP_I64_F64] = "__floatundidf";<br>
Names[RTLIB::UINTTOFP_I64_F80] = "__floatundixf";<br>
@@ -310,27 +312,35 @@ static void InitLibcallNames(const char<br>
Names[RTLIB::OEQ_F32] = "__eqsf2";<br>
Names[RTLIB::OEQ_F64] = "__eqdf2";<br>
Names[RTLIB::OEQ_F128] = "__eqtf2";<br>
+ Names[RTLIB::OEQ_PPCF128] = "__gcc_qeq";<br>
Names[RTLIB::UNE_F32] = "__nesf2";<br>
Names[RTLIB::UNE_F64] = "__nedf2";<br>
Names[RTLIB::UNE_F128] = "__netf2";<br>
+ Names[RTLIB::UNE_PPCF128] = "__gcc_qne";<br>
Names[RTLIB::OGE_F32] = "__gesf2";<br>
Names[RTLIB::OGE_F64] = "__gedf2";<br>
Names[RTLIB::OGE_F128] = "__getf2";<br>
+ Names[RTLIB::OGE_PPCF128] = "__gcc_qge";<br>
Names[RTLIB::OLT_F32] = "__ltsf2";<br>
Names[RTLIB::OLT_F64] = "__ltdf2";<br>
Names[RTLIB::OLT_F128] = "__lttf2";<br>
+ Names[RTLIB::OLT_PPCF128] = "__gcc_qlt";<br>
Names[RTLIB::OLE_F32] = "__lesf2";<br>
Names[RTLIB::OLE_F64] = "__ledf2";<br>
Names[RTLIB::OLE_F128] = "__letf2";<br>
+ Names[RTLIB::OLE_PPCF128] = "__gcc_qle";<br>
Names[RTLIB::OGT_F32] = "__gtsf2";<br>
Names[RTLIB::OGT_F64] = "__gtdf2";<br>
Names[RTLIB::OGT_F128] = "__gttf2";<br>
+ Names[RTLIB::OGT_PPCF128] = "__gcc_qgt";<br>
Names[RTLIB::UO_F32] = "__unordsf2";<br>
Names[RTLIB::UO_F64] = "__unorddf2";<br>
Names[RTLIB::UO_F128] = "__unordtf2";<br>
+ Names[RTLIB::UO_PPCF128] = "__gcc_qunord";<br>
Names[RTLIB::O_F32] = "__unordsf2";<br>
Names[RTLIB::O_F64] = "__unorddf2";<br>
Names[RTLIB::O_F128] = "__unordtf2";<br>
+ Names[RTLIB::O_PPCF128] = "__gcc_qunord";<br>
Names[RTLIB::MEMCPY] = "memcpy";<br>
Names[RTLIB::MEMMOVE] = "memmove";<br>
Names[RTLIB::MEMSET] = "memset";<br>
@@ -446,9 +456,13 @@ RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT,<br>
return FPEXT_F32_F64;<br>
if (RetVT == MVT::f128)<br>
return FPEXT_F32_F128;<br>
+ if (RetVT == MVT::ppcf128)<br>
+ return FPEXT_F32_PPCF128;<br>
} else if (OpVT == MVT::f64) {<br>
if (RetVT == MVT::f128)<br>
return FPEXT_F64_F128;<br>
+ else if (RetVT == MVT::ppcf128)<br>
+ return FPEXT_F64_PPCF128;<br>
}<br>
<br>
return UNKNOWN_LIBCALL;<br>
@@ -698,27 +712,35 @@ static void InitCmpLibcallCCs(ISD::CondC<br>
CCs[RTLIB::OEQ_F32] = ISD::SETEQ;<br>
CCs[RTLIB::OEQ_F64] = ISD::SETEQ;<br>
CCs[RTLIB::OEQ_F128] = ISD::SETEQ;<br>
+ CCs[RTLIB::OEQ_PPCF128] = ISD::SETEQ;<br>
CCs[RTLIB::UNE_F32] = ISD::SETNE;<br>
CCs[RTLIB::UNE_F64] = ISD::SETNE;<br>
CCs[RTLIB::UNE_F128] = ISD::SETNE;<br>
+ CCs[RTLIB::UNE_PPCF128] = ISD::SETNE;<br>
CCs[RTLIB::OGE_F32] = ISD::SETGE;<br>
CCs[RTLIB::OGE_F64] = ISD::SETGE;<br>
CCs[RTLIB::OGE_F128] = ISD::SETGE;<br>
+ CCs[RTLIB::OGE_PPCF128] = ISD::SETGE;<br>
CCs[RTLIB::OLT_F32] = ISD::SETLT;<br>
CCs[RTLIB::OLT_F64] = ISD::SETLT;<br>
CCs[RTLIB::OLT_F128] = ISD::SETLT;<br>
+ CCs[RTLIB::OLT_PPCF128] = ISD::SETLT;<br>
CCs[RTLIB::OLE_F32] = ISD::SETLE;<br>
CCs[RTLIB::OLE_F64] = ISD::SETLE;<br>
CCs[RTLIB::OLE_F128] = ISD::SETLE;<br>
+ CCs[RTLIB::OLE_PPCF128] = ISD::SETLE;<br>
CCs[RTLIB::OGT_F32] = ISD::SETGT;<br>
CCs[RTLIB::OGT_F64] = ISD::SETGT;<br>
CCs[RTLIB::OGT_F128] = ISD::SETGT;<br>
+ CCs[RTLIB::OGT_PPCF128] = ISD::SETGT;<br>
CCs[RTLIB::UO_F32] = ISD::SETNE;<br>
CCs[RTLIB::UO_F64] = ISD::SETNE;<br>
CCs[RTLIB::UO_F128] = ISD::SETNE;<br>
+ CCs[RTLIB::UO_PPCF128] = ISD::SETNE;<br>
CCs[RTLIB::O_F32] = ISD::SETEQ;<br>
CCs[RTLIB::O_F64] = ISD::SETEQ;<br>
CCs[RTLIB::O_F128] = ISD::SETEQ;<br>
+ CCs[RTLIB::O_PPCF128] = ISD::SETEQ;<br>
}<br>
<br>
/// NOTE: The TargetMachine owns TLOF.<br>
@@ -1250,10 +1272,17 @@ void TargetLoweringBase::computeRegister<br>
<br>
// ppcf128 type is really two f64's.<br>
if (!isTypeLegal(MVT::ppcf128)) {<br>
- NumRegistersForVT[MVT::ppcf128] = 2*NumRegistersForVT[MVT::f64];<br>
- RegisterTypeForVT[MVT::ppcf128] = MVT::f64;<br>
- TransformToType[MVT::ppcf128] = MVT::f64;<br>
- ValueTypeActions.setTypeAction(MVT::ppcf128, TypeExpandFloat);<br>
+ if (isTypeLegal(MVT::f64)) {<br>
+ NumRegistersForVT[MVT::ppcf128] = 2*NumRegistersForVT[MVT::f64];<br>
+ RegisterTypeForVT[MVT::ppcf128] = MVT::f64;<br>
+ TransformToType[MVT::ppcf128] = MVT::f64;<br>
+ ValueTypeActions.setTypeAction(MVT::ppcf128, TypeExpandFloat);<br>
+ } else {<br>
+ NumRegistersForVT[MVT::ppcf128] = NumRegistersForVT[MVT::i128];<br>
+ RegisterTypeForVT[MVT::ppcf128] = RegisterTypeForVT[MVT::i128];<br>
+ TransformToType[MVT::ppcf128] = MVT::i128;<br>
+ ValueTypeActions.setTypeAction(MVT::ppcf128, TypeSoftenFloat);<br>
+ }<br>
}<br>
<br>
// Decide how to handle f128. If the target does not have native f128 support,<br>
<br>
Added: llvm/trunk/test/CodeGen/ppcf128sf.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ppcf128sf.ll?rev=259791&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ppcf128sf.ll?rev=259791&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/ppcf128sf.ll (added)<br>
+++ llvm/trunk/test/CodeGen/ppcf128sf.ll Thu Feb 4 08:43:50 2016<br>
@@ -0,0 +1,179 @@<br>
+; RUN: llc -mtriple=powerpc-unknown-linux-gnu -O0 < %s | FileCheck %s<br>
+<br>
+@ld = common global ppc_fp128 0xM00000000000000000000000000000000, align 16<br>
+@ld2 = common global ppc_fp128 0xM00000000000000000000000000000000, align 16<br>
+@d = common global double 0.000000e+00, align 8<br>
+@f = common global float 0.000000e+00, align 4<br>
+@i = common global i32 0, align 4<br>
+@ui = common global i32 0, align 4<br>
+@var = common global i8 0, align 1<br>
+<br>
+define void @foo() #0 {<br>
+entry:<br>
+ %c = alloca ppc_fp128, align 16<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %1 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %add = fadd ppc_fp128 %0, %1<br>
+ store ppc_fp128 %add, ppc_fp128* %c, align 16<br>
+ %2 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %3 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %sub = fsub ppc_fp128 %2, %3<br>
+ store ppc_fp128 %sub, ppc_fp128* %c, align 16<br>
+ %4 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %5 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %mul = fmul ppc_fp128 %4, %5<br>
+ store ppc_fp128 %mul, ppc_fp128* %c, align 16<br>
+ %6 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %7 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %div = fdiv ppc_fp128 %6, %7<br>
+ store ppc_fp128 %div, ppc_fp128* %c, align 16<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qadd<br>
+ ; CHECK-LABEL: __gcc_qsub<br>
+ ; CHECK-LABEL: __gcc_qmul<br>
+ ; CHECK-LABEL: __gcc_qdiv<br>
+}<br>
+<br>
+define void @foo1() #0 {<br>
+entry:<br>
+ %0 = load double, double* @d, align 8<br>
+ %conv = fpext double %0 to ppc_fp128<br>
+ store ppc_fp128 %conv, ppc_fp128* @ld, align 16<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_dtoq<br>
+}<br>
+<br>
+define void @foo2() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %conv = fptrunc ppc_fp128 %0 to double<br>
+ store double %conv, double* @d, align 8<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qtod<br>
+}<br>
+<br>
+define void @foo3() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %conv = fptrunc ppc_fp128 %0 to float<br>
+ store float %conv, float* @f, align 4<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qtos<br>
+}<br>
+<br>
+define void @foo4() #0 {<br>
+entry:<br>
+ %0 = load i32, i32* @i, align 4<br>
+ %conv = sitofp i32 %0 to ppc_fp128<br>
+ store ppc_fp128 %conv, ppc_fp128* @ld, align 16<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_itoq<br>
+}<br>
+<br>
+define void @foo5() #0 {<br>
+entry:<br>
+ %0 = load i32, i32* @ui, align 4<br>
+ %conv = uitofp i32 %0 to ppc_fp128<br>
+ store ppc_fp128 %conv, ppc_fp128* @ld, align 16<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_utoq<br>
+}<br>
+<br>
+define void @foo6() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %1 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %cmp = fcmp oeq ppc_fp128 %0, %1<br>
+ %conv = zext i1 %cmp to i32<br>
+ %conv1 = trunc i32 %conv to i8<br>
+ store i8 %conv1, i8* @var, align 1<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qeq<br>
+}<br>
+<br>
+define void @foo7() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %1 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %cmp = fcmp une ppc_fp128 %0, %1<br>
+ %conv = zext i1 %cmp to i32<br>
+ %conv1 = trunc i32 %conv to i8<br>
+ store i8 %conv1, i8* @var, align 1<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qne<br>
+}<br>
+<br>
+define void @foo8() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %1 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %cmp = fcmp ogt ppc_fp128 %0, %1<br>
+ %conv = zext i1 %cmp to i32<br>
+ %conv1 = trunc i32 %conv to i8<br>
+ store i8 %conv1, i8* @var, align 1<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qgt<br>
+}<br>
+<br>
+define void @foo9() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %1 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %cmp = fcmp olt ppc_fp128 %0, %1<br>
+ %conv = zext i1 %cmp to i32<br>
+ %conv1 = trunc i32 %conv to i8<br>
+ store i8 %conv1, i8* @var, align 1<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qlt<br>
+}<br>
+<br>
+define void @foo10() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %1 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %cmp = fcmp ole ppc_fp128 %0, %1<br>
+ %conv = zext i1 %cmp to i32<br>
+ %conv1 = trunc i32 %conv to i8<br>
+ store i8 %conv1, i8* @var, align 1<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qle<br>
+}<br>
+<br>
+define void @foo11() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %1 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %cmp = fcmp une ppc_fp128 %0, %1<br>
+ %conv = zext i1 %cmp to i32<br>
+ %conv1 = trunc i32 %conv to i8<br>
+ store i8 %conv1, i8* @var, align 1<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qunord<br>
+}<br>
+<br>
+define void @foo12() #0 {<br>
+entry:<br>
+ %0 = load ppc_fp128, ppc_fp128* @ld, align 16<br>
+ %1 = load ppc_fp128, ppc_fp128* @ld2, align 16<br>
+ %cmp = fcmp oge ppc_fp128 %0, %1<br>
+ %conv = zext i1 %cmp to i32<br>
+ %conv1 = trunc i32 %conv to i8<br>
+ store i8 %conv1, i8* @var, align 1<br>
+ ret void<br>
+<br>
+ ; CHECK-LABEL: __gcc_qge<br>
+}<br>
+<br>
+attributes #0 = { "use-soft-float"="true" }<br>
<br>
<br>
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</blockquote></div><br></div>