<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Hi Eric,<div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Jan 20, 2016, at 3:13 PM, Eric Christopher <<a href="mailto:echristo@gmail.com" class="">echristo@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">Hi Quentin,<div class=""><br class=""></div><div class="">Just one other thing I noticed on my way through this - would it be possible to separate the new opcodes you're adding for global isel to another .td file that's then included? Keep the separation of concerns/code out?</div></div></div></blockquote><div><br class=""></div><div>SGTM.</div><div><br class=""></div><div>Cheers,</div><div>-Quentin</div><br class=""><blockquote type="cite" class=""><div class=""><div dir="ltr" class=""><div class=""><br class=""></div><div class="">Thoughts?</div><div class=""><br class=""></div><div class="">-eric</div></div><br class=""><div class="gmail_quote"><div dir="ltr" class="">On Wed, Jan 20, 2016 at 11:18 AM Quentin Colombet via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" class="">llvm-commits@lists.llvm.org</a>> wrote:<br class=""></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: qcolombet<br class="">
Date: Wed Jan 20 13:14:55 2016<br class="">
New Revision: 258333<br class="">
<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=258333&view=rev" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project?rev=258333&view=rev</a><br class="">
Log:<br class="">
[GlobalISel] Add a generic machine opcode for ADD.<br class="">
The selection process being split into separate passes, we need generic opcodes<br class="">
to translate the LLVM IR to target independent code.<br class="">
<br class="">
This patch adds an opcode for addition: G_ADD.<br class="">
<br class="">
Differential Revision: <a href="http://reviews.llvm.org/D15472" rel="noreferrer" target="_blank" class="">http://reviews.llvm.org/D15472</a><br class="">
<br class="">
Modified:<br class="">
llvm/trunk/include/llvm/Target/Target.td<br class="">
llvm/trunk/include/llvm/Target/TargetOpcodes.h<br class="">
llvm/trunk/test/TableGen/<a href="http://trydecode-emission.td/" rel="noreferrer" target="_blank" class="">trydecode-emission.td</a><br class="">
llvm/trunk/test/TableGen/<a href="http://trydecode-emission2.td/" rel="noreferrer" target="_blank" class="">trydecode-emission2.td</a><br class="">
llvm/trunk/test/TableGen/<a href="http://trydecode-emission3.td/" rel="noreferrer" target="_blank" class="">trydecode-emission3.td</a><br class="">
llvm/trunk/utils/TableGen/CodeGenTarget.cpp<br class="">
<br class="">
Modified: llvm/trunk/include/llvm/Target/Target.td<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=258333&r1=258332&r2=258333&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=258333&r1=258332&r2=258333&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/include/llvm/Target/Target.td (original)<br class="">
+++ llvm/trunk/include/llvm/Target/Target.td Wed Jan 20 13:14:55 2016<br class="">
@@ -913,6 +913,17 @@ def FAULTING_LOAD_OP : Instruction {<br class="">
let usesCustomInserter = 1;<br class="">
let mayLoad = 1;<br class="">
}<br class="">
+<br class="">
+// Generic opcode used by the IRTranslator.<br class="">
+// After ISel, this opcode should not appear.<br class="">
+def G_ADD : Instruction {<br class="">
+ let OutOperandList = (outs unknown:$dst);<br class="">
+ let InOperandList = (ins unknown:$src1, unknown:$src2);<br class="">
+ let AsmString = "";<br class="">
+ let hasSideEffects = 0;<br class="">
+ let isCommutable = 1;<br class="">
+}<br class="">
+// TODO: Add the other generic opcodes.<br class="">
}<br class="">
<br class="">
//===----------------------------------------------------------------------===//<br class="">
<br class="">
Modified: llvm/trunk/include/llvm/Target/TargetOpcodes.h<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOpcodes.h?rev=258333&r1=258332&r2=258333&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOpcodes.h?rev=258333&r1=258332&r2=258333&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/include/llvm/Target/TargetOpcodes.h (original)<br class="">
+++ llvm/trunk/include/llvm/Target/TargetOpcodes.h Wed Jan 20 13:14:55 2016<br class="">
@@ -129,9 +129,27 @@ enum {<br class="">
/// comparisons into existing memory operations.<br class="">
FAULTING_LOAD_OP = 22,<br class="">
<br class="">
+ /// The following generic opcodes are not supposed to appear after ISel.<br class="">
+ /// This is something we might want to relax, but for now, this is convenient<br class="">
+ /// to produce diagnostic.<br class="">
+ PRE_ISEL_GENERIC_OPCODE_START,<br class="">
+ // Generic opcodes used before ISel are here.<br class="">
+<br class="">
+ /// Generic ADD instruction. This is an integer add.<br class="">
+ G_ADD = PRE_ISEL_GENERIC_OPCODE_START,<br class="">
+ // TODO: Add more generic opcodes as we move along.<br class="">
+ // FIXME: Right now, we have to manually add any new opcode in<br class="">
+ // CodeGenTarget.cpp for TableGen to pick them up.<br class="">
+ // Moreover the order must match.<br class="">
+<br class="">
+ /// Marker for the end of the generic opcode.<br class="">
+ /// This is used to check if an opcode is in the range of the<br class="">
+ /// generic opcodes.<br class="">
+ PRE_ISEL_GENERIC_OPCODE_END,<br class="">
+<br class="">
/// BUILTIN_OP_END - This must be the last enum value in this list.<br class="">
/// The target-specific post-isel opcode values start here.<br class="">
- GENERIC_OP_END = FAULTING_LOAD_OP,<br class="">
+ GENERIC_OP_END = PRE_ISEL_GENERIC_OPCODE_END,<br class="">
};<br class="">
} // end namespace TargetOpcode<br class="">
} // end namespace llvm<br class="">
<br class="">
Modified: llvm/trunk/test/TableGen/<a href="http://trydecode-emission.td/" rel="noreferrer" target="_blank" class="">trydecode-emission.td</a><br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission.td?rev=258333&r1=258332&r2=258333&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission.td?rev=258333&r1=258332&r2=258333&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/TableGen/<a href="http://trydecode-emission.td/" rel="noreferrer" target="_blank" class="">trydecode-emission.td</a> (original)<br class="">
+++ llvm/trunk/test/TableGen/<a href="http://trydecode-emission.td/" rel="noreferrer" target="_blank" class="">trydecode-emission.td</a> Wed Jan 20 13:14:55 2016<br class="">
@@ -36,8 +36,8 @@ def InstB : TestInstruction {<br class="">
// CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ...<br class="">
// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 14, 0, // Skip to: 21<br class="">
// CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 5, 0, // Skip to: 18<br class="">
-// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 24, 0, 0, 0, // Opcode: InstB, skip to: 18<br class="">
-// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 23, 1, // Opcode: InstA<br class="">
+// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode: InstB, skip to: 18<br class="">
+// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 24, 1, // Opcode: InstA<br class="">
// CHECK-NEXT: /* 21 */ MCD::OPC_Fail,<br class="">
<br class="">
// CHECK: if (DecodeInstB(MI, insn, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; }<br class="">
<br class="">
Modified: llvm/trunk/test/TableGen/<a href="http://trydecode-emission2.td/" rel="noreferrer" target="_blank" class="">trydecode-emission2.td</a><br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission2.td?rev=258333&r1=258332&r2=258333&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission2.td?rev=258333&r1=258332&r2=258333&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/TableGen/<a href="http://trydecode-emission2.td/" rel="noreferrer" target="_blank" class="">trydecode-emission2.td</a> (original)<br class="">
+++ llvm/trunk/test/TableGen/<a href="http://trydecode-emission2.td/" rel="noreferrer" target="_blank" class="">trydecode-emission2.td</a> Wed Jan 20 13:14:55 2016<br class="">
@@ -35,9 +35,9 @@ def InstB : TestInstruction {<br class="">
// CHECK-NEXT: /* 7 */ MCD::OPC_ExtractField, 5, 3, // Inst{7-5} ...<br class="">
// CHECK-NEXT: /* 10 */ MCD::OPC_FilterValue, 0, 22, 0, // Skip to: 36<br class="">
// CHECK-NEXT: /* 14 */ MCD::OPC_CheckField, 0, 2, 3, 5, 0, // Skip to: 25<br class="">
-// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, 24, 0, 0, 0, // Opcode: InstB, skip to: 25<br class="">
+// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode: InstB, skip to: 25<br class="">
// CHECK-NEXT: /* 25 */ MCD::OPC_CheckField, 3, 2, 0, 5, 0, // Skip to: 36<br class="">
-// CHECK-NEXT: /* 31 */ MCD::OPC_TryDecode, 23, 1, 0, 0, // Opcode: InstA, skip to: 36<br class="">
+// CHECK-NEXT: /* 31 */ MCD::OPC_TryDecode, 24, 1, 0, 0, // Opcode: InstA, skip to: 36<br class="">
// CHECK-NEXT: /* 36 */ MCD::OPC_Fail,<br class="">
<br class="">
// CHECK: if (DecodeInstB(MI, insn, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; }<br class="">
<br class="">
Modified: llvm/trunk/test/TableGen/<a href="http://trydecode-emission3.td/" rel="noreferrer" target="_blank" class="">trydecode-emission3.td</a><br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission3.td?rev=258333&r1=258332&r2=258333&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/TableGen/trydecode-emission3.td?rev=258333&r1=258332&r2=258333&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/TableGen/<a href="http://trydecode-emission3.td/" rel="noreferrer" target="_blank" class="">trydecode-emission3.td</a> (original)<br class="">
+++ llvm/trunk/test/TableGen/<a href="http://trydecode-emission3.td/" rel="noreferrer" target="_blank" class="">trydecode-emission3.td</a> Wed Jan 20 13:14:55 2016<br class="">
@@ -37,8 +37,8 @@ def InstB : TestInstruction {<br class="">
// CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ...<br class="">
// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 14, 0, // Skip to: 21<br class="">
// CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 5, 0, // Skip to: 18<br class="">
-// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 24, 0, 0, 0, // Opcode: InstB, skip to: 18<br class="">
-// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 23, 1, // Opcode: InstA<br class="">
+// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 25, 0, 0, 0, // Opcode: InstB, skip to: 18<br class="">
+// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 24, 1, // Opcode: InstA<br class="">
// CHECK-NEXT: /* 21 */ MCD::OPC_Fail,<br class="">
<br class="">
// CHECK: if (DecodeInstBOp(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; }<br class="">
<br class="">
Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=258333&r1=258332&r2=258333&view=diff" rel="noreferrer" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=258333&r1=258332&r2=258333&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)<br class="">
+++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Wed Jan 20 13:14:55 2016<br class="">
@@ -301,6 +301,9 @@ GetInstByName(const char *Name,<br class="">
/// their enum value.<br class="">
void CodeGenTarget::ComputeInstrsByEnum() const {<br class="">
// The ordering here must match the ordering in TargetOpcodes.h.<br class="">
+ // FIXME: It would be nice to have the opcode directly extracted<br class="">
+ // to avoid potential errors. At the very, least a compile time<br class="">
+ // error would be appreciated if the order does not match.<br class="">
static const char *const FixedInstrs[] = {<br class="">
"PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL",<br class="">
"GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG",<br class="">
@@ -308,6 +311,8 @@ void CodeGenTarget::ComputeInstrsByEnum(<br class="">
"REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START",<br class="">
"LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD",<br class="">
"STATEPOINT", "LOCAL_ESCAPE", "FAULTING_LOAD_OP",<br class="">
+ // Generic opcodes for GlobalISel start here.<br class="">
+ "G_ADD",<br class="">
nullptr};<br class="">
const auto &Insts = getInstructions();<br class="">
for (const char *const *p = FixedInstrs; *p; ++p) {<br class="">
<br class="">
<br class="">
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</blockquote></div>
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