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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'>Thank you, I’ll fix this.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><b><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'>From:</span></b><span style='font-size:11.0pt;font-family:"Calibri",sans-serif'> Alexey Samsonov [mailto:vonosmas@gmail.com] <br><b>Sent:</b> Thursday, December 03, 2015 6:29 PM<br><b>To:</b> Colin LeMahieu<br><b>Cc:</b> llvm-commits; Mike Aizatsky<br><b>Subject:</b> Re: [llvm] r254652 - [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings.<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>Looks like this commit introduced an undefined behavior which was caught by UBSan bootstrap bot:<o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal><a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/8316/steps/check-llvm%20ubsan/logs/stdio">http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/8316/steps/check-llvm%20ubsan/logs/stdio</a><o:p></o:p></p></div></div><div><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>On Thu, Dec 3, 2015 at 1:44 PM, Colin LeMahieu via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>> wrote:<o:p></o:p></p><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-top:5.0pt;margin-right:0in;margin-bottom:5.0pt'><p class=MsoNormal>Author: colinl<br>Date: Thu Dec 3 15:44:28 2015<br>New Revision: 254652<br><br>URL: <a href="http://llvm.org/viewvc/llvm-project?rev=254652&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=254652&view=rev</a><br>Log:<br>[Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings.<br><br>Added:<br> llvm/trunk/test/MC/Hexagon/test.s<br> llvm/trunk/test/MC/Hexagon/v60-alu.s<br> llvm/trunk/test/MC/Hexagon/v60-permute.s<br> llvm/trunk/test/MC/Hexagon/v60-shift.s<br> llvm/trunk/test/MC/Hexagon/v60-vcmp.s<br> llvm/trunk/test/MC/Hexagon/v60-vmem.s<br> llvm/trunk/test/MC/Hexagon/v60-vmpy-acc.s<br> llvm/trunk/test/MC/Hexagon/v60-vmpy1.s<br> llvm/trunk/test/MC/Hexagon/v60lookup.s<br>Modified:<br> llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp<br> llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h<br><br>Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp?rev=254652&r1=254651&r2=254652&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp?rev=254652&r1=254651&r2=254652&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp (original)<br>+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp Thu Dec 3 15:44:28 2015<br>@@ -95,6 +95,60 @@ unsigned HexagonResource::setWeight(unsi<br> return (Weight);<br> }<br><br>+HexagonCVIResource::TypeUnitsAndLanes *HexagonCVIResource::TUL;<br>+<br>+bool HexagonCVIResource::SetUp = HexagonCVIResource::setup();<br>+<br>+bool HexagonCVIResource::setup() {<br>+ assert(!TUL);<br>+ TUL = new (TypeUnitsAndLanes);<br>+<br>+ (*TUL)[HexagonII::TypeCVI_VA] =<br>+ UnitsAndLanes(CVI_XLANE | CVI_SHIFT | CVI_MPY0 | CVI_MPY1, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VA_DV] = UnitsAndLanes(CVI_XLANE | CVI_MPY0, 2);<br>+ (*TUL)[HexagonII::TypeCVI_VX] = UnitsAndLanes(CVI_MPY0 | CVI_MPY1, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VX_DV] = UnitsAndLanes(CVI_MPY0, 2);<br>+ (*TUL)[HexagonII::TypeCVI_VP] = UnitsAndLanes(CVI_XLANE, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VP_VS] = UnitsAndLanes(CVI_XLANE, 2);<br>+ (*TUL)[HexagonII::TypeCVI_VS] = UnitsAndLanes(CVI_SHIFT, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VINLANESAT] = UnitsAndLanes(CVI_SHIFT, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VM_LD] =<br>+ UnitsAndLanes(CVI_XLANE | CVI_SHIFT | CVI_MPY0 | CVI_MPY1, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VM_TMP_LD] = UnitsAndLanes(CVI_NONE, 0);<br>+ (*TUL)[HexagonII::TypeCVI_VM_CUR_LD] =<br>+ UnitsAndLanes(CVI_XLANE | CVI_SHIFT | CVI_MPY0 | CVI_MPY1, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VM_VP_LDU] = UnitsAndLanes(CVI_XLANE, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VM_ST] =<br>+ UnitsAndLanes(CVI_XLANE | CVI_SHIFT | CVI_MPY0 | CVI_MPY1, 1);<br>+ (*TUL)[HexagonII::TypeCVI_VM_NEW_ST] = UnitsAndLanes(CVI_NONE, 0);<br>+ (*TUL)[HexagonII::TypeCVI_VM_STU] = UnitsAndLanes(CVI_XLANE, 1);<br>+ (*TUL)[HexagonII::TypeCVI_HIST] = UnitsAndLanes(CVI_XLANE, 4);<br>+<br>+ return true;<br>+}<br>+<br>+HexagonCVIResource::HexagonCVIResource(MCInstrInfo const &MCII, unsigned s,<br>+ MCInst const *id)<br>+ : HexagonResource(s) {<br>+ unsigned T = HexagonMCInstrInfo::getType(MCII, *id);<br>+<br>+ if (TUL->count(T)) {<br>+ // For an HVX insn.<br>+ Valid = true;<br>+ setUnits((*TUL)[T].first);<br>+ setLanes((*TUL)[T].second);<br>+ setLoad(HexagonMCInstrInfo::getDesc(MCII, *id).mayLoad());<br>+ setStore(HexagonMCInstrInfo::getDesc(MCII, *id).mayStore());<br>+ } else {<br>+ // For core insns.<br>+ Valid = false;<br>+ setUnits(0);<br>+ setLanes(0);<br>+ setLoad(false);<br>+ setStore(false);<br>+ }<br>+}<br>+<br> HexagonShuffler::HexagonShuffler(MCInstrInfo const &MCII,<br> MCSubtargetInfo const &STI)<br> : MCII(MCII), STI(STI) {<br>@@ -109,7 +163,7 @@ void HexagonShuffler::reset() {<br><br> void HexagonShuffler::append(MCInst const *ID, MCInst const *Extender,<br> unsigned S, bool X) {<br>- HexagonInstr PI(ID, Extender, S, X);<br>+ HexagonInstr PI(MCII, ID, Extender, S, X);<br><br> Packet.push_back(PI);<br> }<br>@@ -128,6 +182,8 @@ bool HexagonShuffler::check() {<br> // Number of memory operations, loads, solo loads, stores, solo stores, single<br> // stores.<br> unsigned memory = 0, loads = 0, load0 = 0, stores = 0, store0 = 0, store1 = 0;<br>+ // Number of HVX loads, HVX stores.<br>+ unsigned CVIloads = 0, CVIstores = 0;<br> // Number of duplex insns, solo insns.<br> unsigned duplex = 0, solo = 0;<br> // Number of insns restricting other insns in the packet to A and X types,<br>@@ -170,6 +226,12 @@ bool HexagonShuffler::check() {<br> case HexagonII::TypeJ:<br> ++jumps;<br> break;<br>+ case HexagonII::TypeCVI_VM_VP_LDU:<br>+ ++onlyNo1;<br>+ case HexagonII::TypeCVI_VM_LD:<br>+ case HexagonII::TypeCVI_VM_TMP_LD:<br>+ case HexagonII::TypeCVI_VM_CUR_LD:<br>+ ++CVIloads;<br> case HexagonII::TypeLD:<br> ++loads;<br> ++memory;<br>@@ -178,6 +240,11 @@ bool HexagonShuffler::check() {<br> if (HexagonMCInstrInfo::getDesc(MCII, *ID).isReturn())<br> ++jumps, ++jump1; // DEALLOC_RETURN is of type LD.<br> break;<br>+ case HexagonII::TypeCVI_VM_STU:<br>+ ++onlyNo1;<br>+ case HexagonII::TypeCVI_VM_ST:<br>+ case HexagonII::TypeCVI_VM_NEW_ST:<br>+ ++CVIstores;<br> case HexagonII::TypeST:<br> ++stores;<br> ++memory;<br>@@ -205,9 +272,9 @@ bool HexagonShuffler::check() {<br> }<br><br> // Check if the packet is legal.<br>- if ((load0 > 1 || store0 > 1) || (duplex > 1 || (duplex && memory)) ||<br>- (solo && size() > 1) || (onlyAX && neitherAnorX > 1) ||<br>- (onlyAX && xtypeFloat)) {<br>+ if ((load0 > 1 || store0 > 1 || CVIloads > 1 || CVIstores > 1) ||<br>+ (duplex > 1 || (duplex && memory)) || (solo && size() > 1) ||<br>+ (onlyAX && neitherAnorX > 1) || (onlyAX && xtypeFloat)) {<br> Error = SHUFFLE_ERROR_INVALID;<br> return false;<br> }<br>@@ -338,6 +405,19 @@ bool HexagonShuffler::check() {<br> return false;<br> }<br> }<br>+ // Verify the CVI slot subscriptions.<br>+ {<br>+ HexagonUnitAuction AuctionCVI;<br>+<br>+ std::sort(begin(), end(), HexagonInstr::lessCVI);<br>+<br>+ for (iterator I = begin(); I != end(); ++I)<br>+ for (unsigned i = 0; i < I->CVI.getLanes(); ++i) // TODO: I->CVI.isValid?<br>+ if (!AuctionCVI.bid(I->CVI.getUnits() << i)) {<br>+ Error = SHUFFLE_ERROR_SLOTS;<br>+ return false;<br>+ }<br>+ }<br><br> Error = SHUFFLE_SUCCESS;<br> return true;<br><br>Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h?rev=254652&r1=254651&r2=254652&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h?rev=254652&r1=254651&r2=254652&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h (original)<br>+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h Thu Dec 3 15:44:28 2015<br>@@ -51,6 +51,44 @@ public:<br> };<br> };<br><br>+// HVX insn resources.<br>+class HexagonCVIResource : public HexagonResource {<br>+ typedef std::pair<unsigned, unsigned> UnitsAndLanes;<br>+ typedef llvm::DenseMap<unsigned, UnitsAndLanes> TypeUnitsAndLanes;<br>+<br>+ // Available HVX slots.<br>+ enum {<br>+ CVI_NONE = 0,<br>+ CVI_XLANE = 1 << 0,<br>+ CVI_SHIFT = 1 << 1,<br>+ CVI_MPY0 = 1 << 2,<br>+ CVI_MPY1 = 1 << 3<br>+ };<br>+<br>+ static bool SetUp;<br>+ static bool setup();<br>+ static TypeUnitsAndLanes *TUL;<br>+<br>+ // Count of adjacent slots that the insn requires to be executed.<br>+ unsigned Lanes;<br>+ // Flag whether the insn is a load or a store.<br>+ bool Load, Store;<br>+ // Flag whether the HVX resources are valid.<br>+ bool Valid;<br>+<br>+ void setLanes(unsigned l) { Lanes = l; };<br>+ void setLoad(bool f = true) { Load = f; };<br>+ void setStore(bool f = true) { Store = f; };<br>+<br>+public:<br>+ HexagonCVIResource(MCInstrInfo const &MCII, unsigned s, MCInst const *id);<br>+<br>+ bool isValid() const { return (Valid); };<br>+ unsigned getLanes() const { return (Lanes); };<br>+ bool mayLoad() const { return (Load); };<br>+ bool mayStore() const { return (Store); };<br>+};<br>+<br> // Handle to an insn used by the shuffling algorithm.<br> class HexagonInstr {<br> friend class HexagonShuffler;<br>@@ -58,12 +96,14 @@ class HexagonInstr {<br> MCInst const *ID;<br> MCInst const *Extender;<br> HexagonResource Core;<br>+ HexagonCVIResource CVI;<br> bool SoloException;<br><br> public:<br>- HexagonInstr(MCInst const *id, MCInst const *Extender, unsigned s,<br>- bool x = false)<br>- : ID(id), Extender(Extender), Core(s), SoloException(x){};<br>+ HexagonInstr(MCInstrInfo const &MCII, MCInst const *id,<br>+ MCInst const *Extender, unsigned s, bool x = false)<br>+ : ID(id), Extender(Extender), Core(s), CVI(MCII, s, id),<br>+ SoloException(x){};<br><br> MCInst const *getDesc() const { return (ID); };<br><br>@@ -79,6 +119,10 @@ public:<br> static bool lessCore(const HexagonInstr &A, const HexagonInstr &B) {<br> return (HexagonResource::lessUnits(A.Core, B.Core));<br> };<br>+ // Check if the handles are in ascending order by HVX slots.<br>+ static bool lessCVI(const HexagonInstr &A, const HexagonInstr &B) {<br>+ return (HexagonResource::lessUnits(A.CVI, B.CVI));<br>+ };<br> };<br><br> // Bundle shuffler.<br><br>Added: llvm/trunk/test/MC/Hexagon/test.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/test.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/test.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/test.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/test.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,4 @@<br>+#RUN: llvm-mc -filetype=obj -triple=hexagon -mcpu=hexagonv60 %s<br>+<br>+{ vmem (r0 + #0) = v0<br>+ r0 = memw(r0) }<br>\ No newline at end of file<br><br>Added: llvm/trunk/test/MC/Hexagon/v60-alu.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-alu.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-alu.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/v60-alu.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/v60-alu.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,312 @@<br>+#RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=obj %s | \<br>+#RUN: llvm-objdump -triple=hexagon -mcpu=hexagonv60 -d - | \<br>+#RUN: FileCheck %s<br>+<br>+#CHECK: 1ce2cbd7 { v23.w = vavg(v11.w,{{ *}}v2.w):rnd }<br>+v23.w=vavg(v11.w,v2.w):rnd<br>+<br>+#CHECK: 1cf4d323 { v3.h = vnavg(v19.h,{{ *}}v20.h) }<br>+v3.h=vnavg(v19.h,v20.h)<br>+<br>+#CHECK: 1cffce9a { v26.uh = vavg(v14.uh,{{ *}}v31.uh):rnd }<br>+v26.uh=vavg(v14.uh,v31.uh):rnd<br>+<br>+#CHECK: 1ce5cba1 { v1.h = vavg(v11.h,{{ *}}v5.h):rnd }<br>+v1.h=vavg(v11.h,v5.h):rnd<br>+<br>+#CHECK: 1cc0d012 { v18.ub = vabsdiff(v16.ub,{{ *}}v0.ub) }<br>+v18.ub=vabsdiff(v16.ub,v0.ub)<br>+<br>+#CHECK: 1cc2de29 { v9.uh = vabsdiff(v30.h,{{ *}}v2.h) }<br>+v9.uh=vabsdiff(v30.h,v2.h)<br>+<br>+#CHECK: 1ce9ca06 { v6.b = vnavg(v10.ub,{{ *}}v9.ub) }<br>+v6.b=vnavg(v10.ub,v9.ub)<br>+<br>+#CHECK: 1caacf90 { v17:16.w = vadd(v15.h,{{ *}}v10.h) }<br>+v17:16.w=vadd(v15.h,v10.h)<br>+<br>+#CHECK: 1cb4cabe { v31:30.h = vsub(v10.ub,{{ *}}v20.ub) }<br>+v31:30.h=vsub(v10.ub,v20.ub)<br>+<br>+#CHECK: 1cb8cada { v27:26.w = vsub(v10.uh,{{ *}}v24.uh) }<br>+v27:26.w=vsub(v10.uh,v24.uh)<br>+<br>+#CHECK: 1cbcdbe8 { v9:8.w = vsub(v27.h,{{ *}}v28.h) }<br>+v9:8.w=vsub(v27.h,v28.h)<br>+<br>+#CHECK: 1caeca00 { v1:0.h = vsub(v11:10.h,{{ *}}v15:14.h):sat }<br>+v1:0.h=vsub(v11:10.h,v15:14.h):sat<br>+<br>+#CHECK: 1ca8c43e { v31:30.w = vsub(v5:4.w,{{ *}}v9:8.w):sat }<br>+v31:30.w=vsub(v5:4.w,v9:8.w):sat<br>+<br>+#CHECK: 1cbad95c { v29:28.h = vadd(v25.ub,{{ *}}v26.ub) }<br>+v29:28.h=vadd(v25.ub,v26.ub)<br>+<br>+#CHECK: 1ca1dc64 { v5:4.w = vadd(v28.uh,{{ *}}v1.uh) }<br>+v5:4.w=vadd(v28.uh,v1.uh)<br>+<br>+#CHECK: 1c79c350 { v16.h = vsub(v3.h,{{ *}}v25.h):sat }<br>+v16.h=vsub(v3.h,v25.h):sat<br>+<br>+#CHECK: 1c7fd364 { v4.w = vsub(v19.w,{{ *}}v31.w):sat }<br>+v4.w=vsub(v19.w,v31.w):sat<br>+<br>+#CHECK: 1c67d816 { v22.ub = vsub(v24.ub,{{ *}}v7.ub):sat }<br>+v22.ub=vsub(v24.ub,v7.ub):sat<br>+<br>+#CHECK: 1c7ddc2f { v15.uh = vsub(v28.uh,{{ *}}v29.uh):sat }<br>+v15.uh=vsub(v28.uh,v29.uh):sat<br>+<br>+#CHECK: 1c5cc6d7 { v23.h = vsub(v6.h,{{ *}}v28.h) }<br>+v23.h=vsub(v6.h,v28.h)<br>+<br>+#CHECK: 1c54cae4 { v4.w = vsub(v10.w,{{ *}}v20.w) }<br>+v4.w=vsub(v10.w,v20.w)<br>+<br>+#CHECK: 1c4dc78b { v11.w = vadd(v7.w,{{ *}}v13.w):sat }<br>+v11.w=vadd(v7.w,v13.w):sat<br>+<br>+#CHECK: 1c48c7a4 { v4.b = vsub(v7.b,{{ *}}v8.b) }<br>+v4.b=vsub(v7.b,v8.b)<br>+<br>+#CHECK: 1cdec3b0 { v16.uh = vavg(v3.uh,{{ *}}v30.uh) }<br>+v16.uh=vavg(v3.uh,v30.uh)<br>+<br>+#CHECK: 1c76dc98 { v25:24.b = vadd(v29:28.b,{{ *}}v23:22.b) }<br>+v25:24.b=vadd(v29:28.b,v23:22.b)<br>+<br>+#CHECK: 1c7ad4a6 { v7:6.h = vadd(v21:20.h,{{ *}}v27:26.h) }<br>+v7:6.h=vadd(v21:20.h,v27:26.h)<br>+<br>+#CHECK: 1cc7c564 { v4.uw = vabsdiff(v5.w,{{ *}}v7.w) }<br>+v4.uw=vabsdiff(v5.w,v7.w)<br>+<br>+#CHECK: 1cd2cdc1 { v1.h = vavg(v13.h,{{ *}}v18.h) }<br>+v1.h=vavg(v13.h,v18.h)<br>+<br>+#CHECK: 1cd5d246 { v6.uh = vabsdiff(v18.uh,{{ *}}v21.uh) }<br>+v6.uh=vabsdiff(v18.uh,v21.uh)<br>+<br>+#CHECK: 1cdcd987 { v7.ub = vavg(v25.ub,{{ *}}v28.ub) }<br>+v7.ub=vavg(v25.ub,v28.ub)<br>+<br>+#CHECK: 1c92c6e4 { v5:4.uh = vsub(v7:6.uh,{{ *}}v19:18.uh):sat }<br>+v5:4.uh=vsub(v7:6.uh,v19:18.uh):sat<br>+<br>+#CHECK: 1c86dace { v15:14.ub = vsub(v27:26.ub,{{ *}}v7:6.ub):sat }<br>+v15:14.ub=vsub(v27:26.ub,v7:6.ub):sat<br>+<br>+#CHECK: 1cffc07c { v28.ub = vavg(v0.ub,{{ *}}v31.ub):rnd }<br>+v28.ub=vavg(v0.ub,v31.ub):rnd<br>+<br>+#CHECK: 1cf8d851 { v17.w = vnavg(v24.w,{{ *}}v24.w) }<br>+v17.w=vnavg(v24.w,v24.w)<br>+<br>+#CHECK: 1c70d2e6 { v7:6.ub = vadd(v19:18.ub,{{ *}}v17:16.ub):sat }<br>+v7:6.ub=vadd(v19:18.ub,v17:16.ub):sat<br>+<br>+#CHECK: 1c72dec6 { v7:6.w = vadd(v31:30.w,{{ *}}v19:18.w) }<br>+v7:6.w=vadd(v31:30.w,v19:18.w)<br>+<br>+#CHECK: 1c92d23e { v31:30.h = vadd(v19:18.h,{{ *}}v19:18.h):sat }<br>+v31:30.h=vadd(v19:18.h,v19:18.h):sat<br>+<br>+#CHECK: 1c94de1e { v31:30.uh = vadd(v31:30.uh,{{ *}}v21:20.uh):sat }<br>+v31:30.uh=vadd(v31:30.uh,v21:20.uh):sat<br>+<br>+#CHECK: 1c9ec07c { v29:28.b = vsub(v1:0.b,{{ *}}v31:30.b) }<br>+v29:28.b=vsub(v1:0.b,v31:30.b)<br>+<br>+#CHECK: 1c88da56 { v23:22.w = vadd(v27:26.w,{{ *}}v9:8.w):sat }<br>+v23:22.w=vadd(v27:26.w,v9:8.w):sat<br>+<br>+#CHECK: 1c9acab8 { v25:24.w = vsub(v11:10.w,{{ *}}v27:26.w) }<br>+v25:24.w=vsub(v11:10.w,v27:26.w)<br>+<br>+#CHECK: 1c82d282 { v3:2.h = vsub(v19:18.h,{{ *}}v3:2.h) }<br>+v3:2.h=vsub(v19:18.h,v3:2.h)<br>+<br>+#CHECK: 1c2bd9a6 { v6 = vand(v25,{{ *}}v11) }<br>+v6=vand(v25,v11)<br>+<br>+#CHECK: 1c43c22d { v13.ub = vadd(v2.ub,{{ *}}v3.ub):sat }<br>+v13.ub=vadd(v2.ub,v3.ub):sat<br>+<br>+#CHECK: 1c59d707 { v7.w = vadd(v23.w,{{ *}}v25.w) }<br>+v7.w=vadd(v23.w,v25.w)<br>+<br>+#CHECK: 1c3fc9e1 { v1 = vxor(v9,{{ *}}v31) }<br>+v1=vxor(v9,v31)<br>+<br>+#CHECK: 1c2acbdf { v31 = vor(v11,{{ *}}v10) }<br>+v31=vor(v11,v10)<br>+<br>+#CHECK: 1cdaccf6 { v22.w = vavg(v12.w,{{ *}}v26.w) }<br>+v22.w=vavg(v12.w,v26.w)<br>+<br>+#CHECK: 1c5ac767 { v7.h = vadd(v7.h,{{ *}}v26.h):sat }<br>+v7.h=vadd(v7.h,v26.h):sat<br>+<br>+#CHECK: 1c40d956 { v22.uh = vadd(v25.uh,{{ *}}v0.uh):sat }<br>+v22.uh=vadd(v25.uh,v0.uh):sat<br>+<br>+#CHECK: 1fbbd611 { v17.w = vasr(v22.w{{ *}},{{ *}}v27.w) }<br>+v17.w=vasr(v22.w,v27.w)<br>+<br>+#CHECK: 1fbad835 { v21.w = vlsr(v24.w{{ *}},{{ *}}v26.w) }<br>+v21.w=vlsr(v24.w,v26.w)<br>+<br>+#CHECK: 1f79cedc { v28.b = vround(v14.h{{ *}},{{ *}}v25.h):sat }<br>+v28.b=vround(v14.h,v25.h):sat<br>+<br>+#CHECK: 1f69c4e0 { v0.ub = vround(v4.h{{ *}},{{ *}}v9.h):sat }<br>+v0.ub=vround(v4.h,v9.h):sat<br>+<br>+#CHECK: 1f72c485 { v5.h = vround(v4.w{{ *}},{{ *}}v18.w):sat }<br>+v5.h=vround(v4.w,v18.w):sat<br>+<br>+#CHECK: 1f6bc8b1 { v17.uh = vround(v8.w{{ *}},{{ *}}v11.w):sat }<br>+v17.uh=vround(v8.w,v11.w):sat<br>+<br>+#CHECK: 1f71c25b { v27.ub = vsat(v2.h{{ *}},{{ *}}v17.h) }<br>+v27.ub=vsat(v2.h,v17.h)<br>+<br>+#CHECK: 1f66c560 { v0.h = vsat(v5.w{{ *}},{{ *}}v6.w) }<br>+v0.h=vsat(v5.w,v6.w)<br>+<br>+#CHECK: 1fb3d148 { v8.h = vlsr(v17.h{{ *}},{{ *}}v19.h) }<br>+v8.h=vlsr(v17.h,v19.h)<br>+<br>+#CHECK: 1fbec56e { v14.h = vasr(v5.h{{ *}},{{ *}}v30.h) }<br>+v14.h=vasr(v5.h,v30.h)<br>+<br>+#CHECK: 1fb2d2a2 { v2.h = vasl(v18.h{{ *}},{{ *}}v18.h) }<br>+v2.h=vasl(v18.h,v18.h)<br>+<br>+#CHECK: 1faccc95 { v21.w = vasl(v12.w{{ *}},{{ *}}v12.w) }<br>+v21.w=vasl(v12.w,v12.w)<br>+<br>+#CHECK: 1fb9c1e2 { v2.h = vadd(v1.h{{ *}},{{ *}}v25.h) }<br>+v2.h=vadd(v1.h,v25.h)<br>+<br>+#CHECK: 1fbbd5df { v31.b = vadd(v21.b{{ *}},{{ *}}v27.b) }<br>+v31.b=vadd(v21.b,v27.b)<br>+<br>+#CHECK: 1f25c578 { v24 = vrdelta(v5{{ *}},{{ *}}v5) }<br>+v24=vrdelta(v5,v5)<br>+<br>+#CHECK: 1f22c62a { v10 = vdelta(v6{{ *}},{{ *}}v2) }<br>+v10=vdelta(v6,v2)<br>+<br>+#CHECK: 1f20d102 { v2.w = vmax(v17.w{{ *}},{{ *}}v0.w) }<br>+v2.w=vmax(v17.w,v0.w)<br>+<br>+#CHECK: 1f1ed6fc { v28.h = vmax(v22.h{{ *}},{{ *}}v30.h) }<br>+v28.h=vmax(v22.h,v30.h)<br>+<br>+#CHECK: 1f0cc8d8 { v24.uh = vmax(v8.uh{{ *}},{{ *}}v12.uh) }<br>+v24.uh=vmax(v8.uh,v12.uh)<br>+<br>+#CHECK: 1f00c1b0 { v16.ub = vmax(v1.ub{{ *}},{{ *}}v0.ub) }<br>+v16.ub=vmax(v1.ub,v0.ub)<br>+<br>+#CHECK: 1f12d08e { v14.w = vmin(v16.w{{ *}},{{ *}}v18.w) }<br>+v14.w=vmin(v16.w,v18.w)<br>+<br>+#CHECK: 1f1ad466 { v6.h = vmin(v20.h{{ *}},{{ *}}v26.h) }<br>+v6.h=vmin(v20.h,v26.h)<br>+<br>+#CHECK: 1f13df5d { v29.uh = vmin(v31.uh{{ *}},{{ *}}v19.uh) }<br>+v29.uh=vmin(v31.uh,v19.uh)<br>+<br>+#CHECK: 1f09c226 { v6.ub = vmin(v2.ub{{ *}},{{ *}}v9.ub) }<br>+v6.ub=vmin(v2.ub,v9.ub)<br>+<br>+#CHECK: 1f41d34f { v15.b = vshuffo(v19.b{{ *}},{{ *}}v1.b) }<br>+v15.b=vshuffo(v19.b,v1.b)<br>+<br>+#CHECK: 1f5fc72e { v14.b = vshuffe(v7.b{{ *}},{{ *}}v31.b) }<br>+v14.b=vshuffe(v7.b,v31.b)<br>+<br>+#CHECK: 1f34d0f7 { v23.b = vdeale(v16.b{{ *}},{{ *}}v20.b) }<br>+v23.b=vdeale(v16.b,v20.b)<br>+<br>+#CHECK: 1f4bd6c4 { v5:4.b = vshuffoe(v22.b{{ *}},{{ *}}v11.b) }<br>+v5:4.b=vshuffoe(v22.b,v11.b)<br>+<br>+#CHECK: 1f5dcea2 { v3:2.h = vshuffoe(v14.h{{ *}},{{ *}}v29.h) }<br>+v3:2.h=vshuffoe(v14.h,v29.h)<br>+<br>+#CHECK: 1f4fd186 { v6.h = vshuffo(v17.h{{ *}},{{ *}}v15.h) }<br>+v6.h=vshuffo(v17.h,v15.h)<br>+<br>+#CHECK: 1f5bda79 { v25.h = vshuffe(v26.h{{ *}},{{ *}}v27.h) }<br>+v25.h=vshuffe(v26.h,v27.h)<br>+<br>+#CHECK: 1f41d1f2 { v19:18 = vcombine(v17{{ *}},{{ *}}v1) }<br>+v19:18=vcombine(v17,v1)<br>+<br>+#CHECK: 1e82f432 { if (!q2) v18.b -= v20.b }<br>+if (!q2) v18.b-=v20.b<br>+<br>+#CHECK: 1ec2fd13 { if (q3) v19.w -= v29.w }<br>+if (q3) v19.w-=v29.w<br>+<br>+#CHECK: 1e81fef9 { if (q2) v25.h -= v30.h }<br>+if (q2) v25.h-=v30.h<br>+<br>+#CHECK: 1e81e2d3 { if (q2) v19.b -= v2.b }<br>+if (q2) v19.b-=v2.b<br>+<br>+#CHECK: 1e41ecad { if (!q1) v13.w += v12.w }<br>+if (!q1) v13.w+=v12.w<br>+<br>+#CHECK: 1e41e789 { if (!q1) v9.h += v7.h }<br>+if (!q1) v9.h+=v7.h<br>+<br>+#CHECK: 1e81e967 { if (!q2) v7.b += v9.b }<br>+if (!q2) v7.b+=v9.b<br>+<br>+#CHECK: 1e41f04f { if (q1) v15.w += v16.w }<br>+if (q1) v15.w+=v16.w<br>+<br>+#CHECK: 1e01e838 { if (q0) v24.h += v8.h }<br>+if (q0) v24.h+=v8.h<br>+<br>+#CHECK: 1ec1f112 { if (q3) v18.b += v17.b }<br>+if (q3) v18.b+=v17.b<br>+<br>+#CHECK: 1e42f67b { if (!q1) v27.w -= v22.w }<br>+if (!q1) v27.w-=v22.w<br>+<br>+#CHECK: 1e82ea5b { if (!q2) v27.h -= v10.h }<br>+if (!q2) v27.h-=v10.h<br>+<br>+#CHECK: 1e00c586 { v6 = vnot(v5) }<br>+v6=vnot(v5)<br>+<br>+#CHECK: 1e00df70 { v16.w = vabs(v31.w):sat }<br>+v16.w=vabs(v31.w):sat<br>+<br>+#CHECK: 1e00d45f { v31.w = vabs(v20.w) }<br>+v31.w=vabs(v20.w)<br>+<br>+#CHECK: 1e00db2f { v15.h = vabs(v27.h):sat }<br>+v15.h=vabs(v27.h):sat<br>+<br>+#CHECK: 1e00d001 { v1.h = vabs(v16.h) }<br>+v1.h=vabs(v16.h)<br>+<br>+#CHECK: 1e02c832 { v19:18.uh = vzxt(v8.ub) }<br>+v19:18.uh=vzxt(v8.ub)<br>+<br>+#CHECK: 1e02c98a { v11:10.w = vsxt(v9.h) }<br>+v11:10.w=vsxt(v9.h)<br>+<br>+#CHECK: 1e02cf76 { v23:22.h = vsxt(v15.b) }<br>+v23:22.h=vsxt(v15.b)<br>+<br>+#CHECK: 1e02c258 { v25:24.uw = vzxt(v2.uh) }<br>+v25:24.uw=vzxt(v2.uh)<br><br>Added: llvm/trunk/test/MC/Hexagon/v60-permute.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-permute.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-permute.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/v60-permute.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/v60-permute.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,51 @@<br>+#RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=obj %s | \<br>+#RUN: llvm-objdump -triple=hexagon -mcpu=hexagonv60 -d - | \<br>+#RUN: FileCheck %s<br>+<br>+#CHECK: 1fd2d5cf { v15.b = vpack(v21.h{{ *}},{{ *}}v18.h):sat }<br>+v15.b=vpack(v21.h,v18.h):sat<br>+<br>+#CHECK: 1fd7d7a2 { v2.ub = vpack(v23.h{{ *}},{{ *}}v23.h):sat }<br>+v2.ub=vpack(v23.h,v23.h):sat<br>+<br>+#CHECK: 1fc7d464 { v4.h = vpacke(v20.w{{ *}},{{ *}}v7.w) }<br>+v4.h=vpacke(v20.w,v7.w)<br>+<br>+#CHECK: 1fc2c75b { v27.b = vpacke(v7.h{{ *}},{{ *}}v2.h) }<br>+v27.b=vpacke(v7.h,v2.h)<br>+<br>+#CHECK: 1fc9c5ed { v13.uh = vpack(v5.w{{ *}},{{ *}}v9.w):sat }<br>+v13.uh=vpack(v5.w,v9.w):sat<br>+<br>+#CHECK: 1ff1d81f { v31.h = vpack(v24.w{{ *}},{{ *}}v17.w):sat }<br>+v31.h=vpack(v24.w,v17.w):sat<br>+<br>+#CHECK: 1fe6c435 { v21.b = vpacko(v4.h{{ *}},{{ *}}v6.h) }<br>+v21.b=vpacko(v4.h,v6.h)<br>+<br>+#CHECK: 1febc140 { v0.h = vpacko(v1.w{{ *}},{{ *}}v11.w) }<br>+v0.h=vpacko(v1.w,v11.w)<br>+<br>+#CHECK: 1e01d256 { v23:22.h = vunpack(v18.b) }<br>+v23:22.h=vunpack(v18.b)<br>+<br>+#CHECK: 1e01cc38 { v25:24.uw = vunpack(v12.uh) }<br>+v25:24.uw=vunpack(v12.uh)<br>+<br>+#CHECK: 1e01c61e { v31:30.uh = vunpack(v6.ub) }<br>+v31:30.uh=vunpack(v6.ub)<br>+<br>+#CHECK: 1e01d778 { v25:24.w = vunpack(v23.h) }<br>+v25:24.w=vunpack(v23.h)<br>+<br>+#CHECK: 1e00c0e0 { v0.b = vdeal(v0.b) }<br>+v0.b=vdeal(v0.b)<br>+<br>+#CHECK: 1e00d5c9 { v9.h = vdeal(v21.h) }<br>+v9.h=vdeal(v21.h)<br>+<br>+#CHECK: 1e02cb1c { v28.b = vshuff(v11.b) }<br>+v28.b=vshuff(v11.b)<br>+<br>+#CHECK: 1e01d8fe { v30.h = vshuff(v24.h) }<br>+v30.h=vshuff(v24.h)<br><br>Added: llvm/trunk/test/MC/Hexagon/v60-shift.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-shift.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-shift.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/v60-shift.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/v60-shift.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,39 @@<br>+#RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=obj %s | \<br>+#RUN: llvm-objdump -triple=hexagon -mcpu=hexagonv60 -d - | \<br>+#RUN: FileCheck %s<br>+<br>+#CHECK: 198fd829 { v9.uw = vlsr(v24.uw,{{ *}}r15) }<br>+v9.uw=vlsr(v24.uw,r15)<br>+<br>+#CHECK: 1999d645 { v5.uh = vlsr(v22.uh,{{ *}}r25) }<br>+v5.uh=vlsr(v22.uh,r25)<br>+<br>+#CHECK: 198cc303 { v3.h = vasl(v3.h,{{ *}}r12) }<br>+v3.h=vasl(v3.h,r12)<br>+<br>+#CHECK: 1965d7ac { v12.w = vasr(v23.w,{{ *}}r5) }<br>+v12.w=vasr(v23.w,r5)<br>+<br>+#CHECK: 197dddc3 { v3.h = vasr(v29.h,{{ *}}r29) }<br>+v3.h=vasr(v29.h,r29)<br>+<br>+#CHECK: 197adde8 { v8.w = vasl(v29.w,{{ *}}r26) }<br>+v8.w=vasl(v29.w,r26)<br>+<br>+#CHECK: 1977cc26 { v6 = vror(v12,{{ *}}r23) }<br>+v6=vror(v12,r23)<br>+<br>+#CHECK: 1e02cfad { v13.uw = vcl0(v15.uw) }<br>+v13.uw=vcl0(v15.uw)<br>+<br>+#CHECK: 1e02defb { v27.uh = vcl0(v30.uh) }<br>+v27.uh=vcl0(v30.uh)<br>+<br>+#CHECK: 1e03de90 { v16.w = vnormamt(v30.w) }<br>+v16.w=vnormamt(v30.w)<br>+<br>+#CHECK: 1e03d4a3 { v3.h = vnormamt(v20.h) }<br>+v3.h=vnormamt(v20.h)<br>+<br>+#CHECK: 1e02c2d8 { v24.h = vpopcount(v2.h) }<br>+v24.h=vpopcount(v2.h)<br><br>Added: llvm/trunk/test/MC/Hexagon/v60-vcmp.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-vcmp.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-vcmp.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/v60-vcmp.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/v60-vcmp.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,84 @@<br>+#RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=obj %s | \<br>+#RUN: llvm-objdump -triple=hexagon -mcpu=hexagonv60 -d - | \<br>+#RUN: FileCheck %s<br>+<br>+#CHECK: 1c81f142 { q2 |= vcmp.eq(v17.b{{ *}},{{ *}}v1.b) }<br>+q2|=vcmp.eq(v17.b,v1.b)<br>+<br>+#CHECK: 1c84fb2a { q2 &= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v27.uw{{ *}},{{ *}}v4.uw) }<br>+q2&=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v27.uw,v4.uw)<br>+<br>+#CHECK: 1c8cf826 { q2 &= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v24.uh{{ *}},{{ *}}v12.uh) }<br>+q2&=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v24.uh,v12.uh)<br>+<br>+#CHECK: 1c80e720 { q0 &= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v7.ub{{ *}},{{ *}}v0.ub) }<br>+q0&=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v7.ub,v0.ub)<br>+<br>+#CHECK: 1c9aed1a { q2 &= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v13.w{{ *}},{{ *}}v26.w) }<br>+q2&=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v13.w,v26.w)<br>+<br>+#CHECK: 1c8de516 { q2 &= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v5.h{{ *}},{{ *}}v13.h) }<br>+q2&=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v5.h,v13.h)<br>+<br>+#CHECK: 1c8dfc11 { q1 &= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v28.b{{ *}},{{ *}}v13.b) }<br>+q1&=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v28.b,v13.b)<br>+<br>+#CHECK: 1c94fa0b { q3 &= vcmp.eq(v26.w{{ *}},{{ *}}v20.w) }<br>+q3&=vcmp.eq(v26.w,v20.w)<br>+<br>+#CHECK: 1c83e206 { q2 &= vcmp.eq(v2.h{{ *}},{{ *}}v3.h) }<br>+q2&=vcmp.eq(v2.h,v3.h)<br>+<br>+#CHECK: 1c85e900 { q0 &= vcmp.eq(v9.b{{ *}},{{ *}}v5.b) }<br>+q0&=vcmp.eq(v9.b,v5.b)<br>+<br>+#CHECK: 1c9cfca8 { q0 ^= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v28.uw{{ *}},{{ *}}v28.uw) }<br>+q0^=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v28.uw,v28.uw)<br>+<br>+#CHECK: 1c81faa0 { q0 ^= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v26.ub{{ *}},{{ *}}v1.ub) }<br>+q0^=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v26.ub,v1.ub)<br>+<br>+#CHECK: 1c96f0a4 { q0 ^= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v16.uh{{ *}},{{ *}}v22.uh) }<br>+q0^=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v16.uh,v22.uh)<br>+<br>+#CHECK: 1c9bf795 { q1 ^= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v23.h{{ *}},{{ *}}v27.h) }<br>+q1^=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v23.h,v27.h)<br>+<br>+#CHECK: 1c9de698 { q0 ^= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v6.w{{ *}},{{ *}}v29.w) }<br>+q0^=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v6.w,v29.w)<br>+<br>+#CHECK: 1c82ef8a { q2 ^= vcmp.eq(v15.w{{ *}},{{ *}}v2.w) }<br>+q2^=vcmp.eq(v15.w,v2.w)<br>+<br>+#CHECK: 1c99e891 { q1 ^= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v8.b{{ *}},{{ *}}v25.b) }<br>+q1^=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v8.b,v25.b)<br>+<br>+#CHECK: 1c8afe55 { q1 |= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v30.h{{ *}},{{ *}}v10.h) }<br>+q1|=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v30.h,v10.h)<br>+<br>+#CHECK: 1c92ef50 { q0 |= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v15.b{{ *}},{{ *}}v18.b) }<br>+q0|=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v15.b,v18.b)<br>+<br>+#CHECK: 1c9ffb4b { q3 |= vcmp.eq(v27.w{{ *}},{{ *}}v31.w) }<br>+q3|=vcmp.eq(v27.w,v31.w)<br>+<br>+#CHECK: 1c87e944 { q0 |= vcmp.eq(v9.h{{ *}},{{ *}}v7.h) }<br>+q0|=vcmp.eq(v9.h,v7.h)<br>+<br>+#CHECK: 1c8ee768 { q0 |= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v7.uw{{ *}},{{ *}}v14.uw) }<br>+q0|=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v7.uw,v14.uw)<br>+<br>+#CHECK: 1c92e265 { q1 |= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v2.uh{{ *}},{{ *}}v18.uh) }<br>+q1|=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v2.uh,v18.uh)<br>+<br>+#CHECK: 1c80f062 { q2 |= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v16.ub{{ *}},{{ *}}v0.ub) }<br>+q2|=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v16.ub,v0.ub)<br>+<br>+#CHECK: 1c91f75a { q2 |= <a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v23.w{{ *}},{{ *}}v17.w) }<br>+q2|=<a href="http://vcmp.gt" target="_blank">vcmp.gt</a>(v23.w,v17.w)<br>+<br>+#CHECK: 1c86fe84 { q0 ^= vcmp.eq(v30.h{{ *}},{{ *}}v6.h) }<br>+q0^=vcmp.eq(v30.h,v6.h)<br>+<br>+#CHECK: 1c86ec82 { q2 ^= vcmp.eq(v12.b{{ *}},{{ *}}v6.b) }<br>+q2^=vcmp.eq(v12.b,v6.b)<br><br>Added: llvm/trunk/test/MC/Hexagon/v60-vmem.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-vmem.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-vmem.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/v60-vmem.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/v60-vmem.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,424 @@<br>+#RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=obj %s | \<br>+#RUN: llvm-objdump -triple=hexagon -mcpu=hexagonv60 -d - | \<br>+#RUN: FileCheck %s<br>+<br>+#CHECK: 292cc11b { vmem(r12++#1) = v27 }<br>+{<br>+ vmem(r12++#1)=v27<br>+}<br>+<br>+#CHECK: 294dc319 { v25 = vmem(r13++#3):nt }<br>+{<br>+ v25=vmem(r13++#3):nt<br>+}<br>+<br>+#CHECK: 2904c1fb { v27 = vmemu(r4++#1) }<br>+{<br>+ v27=vmemu(r4++#1)<br>+}<br>+<br>+#CHECK: 291dc01f { v31 = vmem(r29++#0) }<br>+{<br>+ v31=vmem(r29++#0)<br>+}<br>+<br>+#CHECK: 293ec0ff { vmemu(r30++#0) = v31 }<br>+{<br>+ vmemu(r30++#0)=v31<br>+}<br>+<br>+#CHECK: 296ec411 { vmem(r14++#-4):nt = v17 }<br>+{<br>+ vmem(r14++#-4):nt=v17<br>+}<br>+<br>+#CHECK: 29fec62f { if (!p0) vmem(r30++#-2):nt = v15 }<br>+{<br>+ if (!p0) vmem(r30++#-2):nt=v15<br>+}<br>+<br>+#CHECK: 29f9c914 { if (p1) vmem(r25++#1):nt = v20 }<br>+{<br>+ if (p1) vmem(r25++#1):nt=v20<br>+}<br>+<br>+#CHECK: 2984de30 { if (!q3) vmem(r4++#-2) = v16 }<br>+{<br>+ if (!q3) vmem(r4++#-2)=v16<br>+}<br>+<br>+#CHECK: 2992dd1f { if (q3) vmem(r18++#-3) = v31 }<br>+{<br>+ if (q3) vmem(r18++#-3)=v31<br>+}<br>+<br>+#CHECK: 29c9c425 { if (!q0) vmem(r9++#-4):nt = v5 }<br>+{<br>+ if (!q0) vmem(r9++#-4):nt=v5<br>+}<br>+<br>+#CHECK: 29d1cf11 { if (q1) vmem(r17++#-1):nt = v17 }<br>+{<br>+ if (q1) vmem(r17++#-1):nt=v17<br>+}<br>+<br>+#CHECK: 29a7c328 { if (!p0) vmem(r7++#3) = v8 }<br>+{<br>+ if (!p0) vmem(r7++#3)=v8<br>+}<br>+<br>+#CHECK: 29b6cc1d { if (p1) vmem(r22++#-4) = v29 }<br>+{<br>+ if (p1) vmem(r22++#-4)=v29<br>+}<br>+<br>+#CHECK: 29abc5fe { if (!p0) vmemu(r11++#-3) = v30 }<br>+{<br>+ if (!p0) vmemu(r11++#-3)=v30<br>+}<br>+<br>+#CHECK: 29b8d5c4 { if (p2) vmemu(r24++#-3) = v4 }<br>+{<br>+ if (p2) vmemu(r24++#-3)=v4<br>+}<br>+<br>+#CHECK: 2860e407 { vmem(r0+#-4):nt = v7 }<br>+{<br>+ vmem(r0+#-4):nt=v7<br>+}<br>+<br>+#CHECK: 2830e2e7 { vmemu(r16+#-6) = v7 }<br>+{<br>+ vmemu(r16+#-6)=v7<br>+}<br>+<br>+#CHECK: 2839c316 { vmem(r25+#3) = v22 }<br>+{<br>+ vmem(r25+#3)=v22<br>+}<br>+#CHECK: 284be316 { v22 = vmem(r11+#-5):nt }<br>+{<br>+ v22=vmem(r11+#-5):nt<br>+}<br>+<br>+#CHECK: 280ec1e6 { v6 = vmemu(r14+#1) }<br>+{<br>+ v6=vmemu(r14+#1)<br>+}<br>+<br>+#CHECK: 280ae50c { v12 = vmem(r10+#-3) }<br>+{<br>+ v12=vmem(r10+#-3)<br>+}<br>+<br>+#CHECK: 2b62e005 { vmem(r2++m1):nt = v5 }<br>+{<br>+ vmem(r2++m1):nt=v5<br>+}<br>+<br>+#CHECK: 2b28e0f2 { vmemu(r8++m1) = v18 }<br>+{<br>+ vmemu(r8++m1)=v18<br>+}<br>+<br>+#CHECK: 2b42e019 { v25 = vmem(r2++m1):nt }<br>+{<br>+ v25=vmem(r2++m1):nt<br>+}<br>+<br>+#CHECK: 2b2ce009 { vmem(r12++m1) = v9 }<br>+{<br>+ vmem(r12++m1)=v9<br>+}<br>+<br>+#CHECK: 2b03c005 { v5 = vmem(r3++m0) }<br>+{<br>+ v5=vmem(r3++m0)<br>+}<br>+<br>+<br>+#CHECK: 2b0ec0f5 { v21 = vmemu(r14++m0) }<br>+{<br>+ v21=vmemu(r14++m0)<br>+}<br>+<br>+#CHECK: 2be8c022 { if (!p0) vmem(r8++m0):nt = v2 }<br>+{<br>+ if (!p0) vmem(r8++m0):nt=v2<br>+}<br>+<br>+#CHECK: 2bebd813 { if (p3) vmem(r11++m0):nt = v19 }<br>+{<br>+ if (p3) vmem(r11++m0):nt=v19<br>+}<br>+<br>+#CHECK: 2ba5e0e7 { if (!p0) vmemu(r5++m1) = v7 }<br>+{<br>+ if (!p0) vmemu(r5++m1)=v7<br>+}<br>+<br>+#CHECK: 2ba4f0dd { if (p2) vmemu(r4++m1) = v29 }<br>+{<br>+ if (p2) vmemu(r4++m1)=v29<br>+}<br>+<br>+#CHECK: 2ba4e828 { if (!p1) vmem(r4++m1) = v8 }<br>+{<br>+ if (!p1) vmem(r4++m1)=v8<br>+}<br>+<br>+#CHECK: 2bbae803 { if (p1) vmem(r26++m1) = v3 }<br>+{<br>+ if (p1) vmem(r26++m1)=v3<br>+}<br>+<br>+#CHECK: 2bc9c027 { if (!q0) vmem(r9++m0):nt = v7 }<br>+{<br>+ if (!q0) vmem(r9++m0):nt=v7<br>+}<br>+<br>+#CHECK: 2bcfc001 { if (q0) vmem(r15++m0):nt = v1 }<br>+{<br>+ if (q0) vmem(r15++m0):nt=v1<br>+}<br>+<br>+#CHECK: 2b97f031 { if (!q2) vmem(r23++m1) = v17 }<br>+{<br>+ if (!q2) vmem(r23++m1)=v17<br>+}<br>+<br>+#CHECK: 2b8ad809 { if (q3) vmem(r10++m0) = v9 }<br>+{<br>+ if (q3) vmem(r10++m0)=v9<br>+}<br>+<br>+#CHECK: 28c7f438 { if (!q2) vmem(r7+#-4):nt = v24 }<br>+{<br>+ if (!q2) vmem(r7+#-4):nt=v24<br>+}<br>+<br>+#CHECK: 28d1eb15 { if (q1) vmem(r17+#-5):nt = v21 }<br>+{<br>+ if (q1) vmem(r17+#-5):nt=v21<br>+}<br>+<br>+#CHECK: 289cfe2b { if (!q3) vmem(r28+#-2) = v11 }<br>+{<br>+ if (!q3) vmem(r28+#-2)=v11<br>+}<br>+<br>+#CHECK: 288eef0f { if (q1) vmem(r14+#-1) = v15 }<br>+{<br>+ if (q1) vmem(r14+#-1)=v15<br>+}<br>+<br>+#CHECK: 28a2d1e1 { if (!p2) vmemu(r2+#1) = v1 }<br>+{<br>+ if (!p2) vmemu(r2+#1)=v1<br>+}<br>+<br>+#CHECK: 28bcf4db { if (p2) vmemu(r28+#-4) = v27 }<br>+{<br>+ if (p2) vmemu(r28+#-4)=v27<br>+}<br>+<br>+#CHECK: 28b2c925 { if (!p1) vmem(r18+#1) = v5 }<br>+{<br>+ if (!p1) vmem(r18+#1)=v5<br>+}<br>+<br>+#CHECK: 28afe41a { if (p0) vmem(r15+#-4) = v26 }<br>+{<br>+ if (p0) vmem(r15+#-4)=v26<br>+}<br>+<br>+#CHECK: 28f7fd3a { if (!p3) vmem(r23+#-3):nt = v26 }<br>+{<br>+ if (!p3) vmem(r23+#-3):nt=v26<br>+}<br>+<br>+#CHECK: 28f5fd10 { if (p3) vmem(r21+#-3):nt = v16 }<br>+{<br>+ if (p3) vmem(r21+#-3):nt=v16<br>+}<br>+<br>+#CHECK: 2945c440 v0.tmp = vmem(r5++#-4):nt }<br>+{<br>+ v0.tmp=vmem(r5++#-4):nt<br>+ v26=v0<br>+}<br>+<br>+#CHECK: 2942c338 v24.cur = vmem(r2++#3):nt }<br>+{<br>+ v24.cur=vmem(r2++#3):nt<br>+ v6=v24<br>+}<br>+<br>+#CHECK: 2908c157 v23.tmp = vmem(r8++#1) }<br>+{<br>+ v25=v23<br>+ v23.tmp=vmem(r8++#1)<br>+}<br>+<br>+#CHECK: 2903c72d v13.cur = vmem(r3++#-1) }<br>+{<br>+ v13.cur=vmem(r3++#-1)<br>+ v21=v13<br>+}<br>+<br>+#CHECK: 2855c743 v3.tmp = vmem(r21+#7):nt }<br>+{<br>+ v3.tmp=vmem(r21+#7):nt<br>+ v21=v3<br>+}<br>+<br>+#CHECK: 2856e025 v5.cur = vmem(r22+#-8):nt }<br>+{<br>+ v5.cur=vmem(r22+#-8):nt<br>+ v29=v5<br>+}<br>+<br>+#CHECK: 2802c555 v21.tmp = vmem(r2+#5) }<br>+{<br>+ v31=v21<br>+ v21.tmp=vmem(r2+#5)<br>+}<br>+<br>+#CHECK: 2814e12a v10.cur = vmem(r20+#-7) }<br>+{<br>+ v9=v10<br>+ v10.cur=vmem(r20+#-7)<br>+}<br>+<br>+<br>+#CHECK: 2b52c02c v12.cur = vmem(r18++m0):nt }<br>+{<br>+ v12.cur=vmem(r18++m0):nt<br>+ v25=v12<br>+}<br>+<br>+#CHECK: 2b4ae043 v3.tmp = vmem(r10++m1):nt }<br>+{<br>+ v25=v3<br>+ v3.tmp=vmem(r10++m1):nt<br>+}<br>+<br>+#CHECK: 2b06c025 v5.cur = vmem(r6++m0) }<br>+{<br>+ v5.cur=vmem(r6++m0)<br>+ v10=v5<br>+}<br>+<br>+#CHECK: 2b17e048 v8.tmp = vmem(r23++m1) }<br>+{<br>+ v8.tmp=vmem(r23++m1)<br>+ v28=v8<br>+}<br>+<br>+#CHECK: 282ee422 vmem(r14+#-4) = v14.new }<br>+{<br>+ v14 = v14<br>+ vmem(r14+#-4)=v14.new<br>+}<br>+<br>+#CHECK: 2866e222 vmem(r6+#-6):nt = v16.new }<br>+{<br>+ v16 = v8<br>+ vmem(r6+#-6):nt=v16.new<br>+}<br>+<br>+#CHECK: 28b1cd42 if(p1) vmem(r17+#5) = v17.new }<br>+{<br>+ v17 = v25<br>+ if(p1)vmem(r17+#5)=v17.new<br>+}<br>+<br>+#CHECK: 28bbeb6a if(!p1) vmem(r27+#-5) = v17.new }<br>+{<br>+ v17 = v15<br>+ if(!p1)vmem(r27+#-5)=v17.new<br>+}<br>+<br>+#CHECK: 28e4d252 if(p2) vmem(r4+#2):nt = v24.new }<br>+{<br>+ v24 = v10<br>+ if(p2)vmem(r4+#2):nt=v24.new<br>+}<br>+<br>+#CHECK: 28f8d17a if(!p2) vmem(r24+#1):nt = v4.new }<br>+{<br>+ v4 = v8<br>+ if(!p2)vmem(r24+#1):nt=v4.new<br>+}<br>+<br>+#CHECK: 2924c322 vmem(r4++#3) = v4.new }<br>+{<br>+ v4 = v3<br>+ vmem(r4++#3)=v4.new<br>+}<br>+<br>+#CHECK: 2961c122 vmem(r1++#1):nt = v7.new }<br>+{<br>+ v7 = v8<br>+ vmem(r1++#1):nt=v7.new<br>+}<br>+<br>+#CHECK: 29a6d042 if(p2) vmem(r6++#0) = v11.new }<br>+{<br>+ v11 = v13<br>+ if(p2)vmem(r6++#0)=v11.new<br>+}<br>+<br>+#CHECK: 29a2cb6a if(!p1) vmem(r2++#3) = v25.new }<br>+{<br>+ v25 = v17<br>+ if(!p1)vmem(r2++#3)=v25.new<br>+}<br>+<br>+#CHECK: 29f5c952 if(p1) vmem(r21++#1):nt = v14.new }<br>+{<br>+ v14 = v13<br>+ if(p1)vmem(r21++#1):nt=v14.new<br>+}<br>+<br>+#CHECK: 29f7cd7a if(!p1) vmem(r23++#-3):nt = v1.new }<br>+{<br>+ v1 = v0<br>+ if(!p1)vmem(r23++#-3):nt=v1.new<br>+}<br>+<br>+#CHECK: 2b3ec022 vmem(r30++m0) = v10.new }<br>+{<br>+ v10 = v23<br>+ vmem(r30++m0)=v10.new<br>+}<br>+<br>+#CHECK: 2b6fc022 vmem(r15++m0):nt = v19.new }<br>+{<br>+ v19 = v20<br>+ vmem(r15++m0):nt=v19.new<br>+}<br>+<br>+#CHECK: 2bb7f042 if(p2) vmem(r23++m1) = v6.new }<br>+{<br>+ v6 = v30<br>+ if(p2)vmem(r23++m1)=v6.new<br>+}<br>+<br>+#CHECK: 2ba2f06a if(!p2) vmem(r2++m1) = v12.new }<br>+{<br>+ v12 = v9<br>+ if(!p2)vmem(r2++m1)=v12.new<br>+}<br>+<br>+#CHECK: 2be7e852 if(p1) vmem(r7++m1):nt = v3.new }<br>+{<br>+ v3 = v13<br>+ if(p1)vmem(r7++m1):nt=v3.new<br>+}<br>+<br>+#CHECK: 2bfdd07a if(!p2) vmem(r29++m0):nt = v29.new }<br>+{<br>+ v29 = v9<br>+ if(!p2)vmem(r29++m0):nt=v29.new<br>+}<br><br>Added: llvm/trunk/test/MC/Hexagon/v60-vmpy-acc.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-vmpy-acc.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-vmpy-acc.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/v60-vmpy-acc.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/v60-vmpy-acc.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,123 @@<br>+#RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=obj %s | \<br>+#RUN: llvm-objdump -triple=hexagon -mcpu=hexagonv60 -d - | \<br>+#RUN: FileCheck %s<br>+<br>+#CHECK: 1936ee37 { v23.w += vdmpy(v15:14.h,r22.uh,#1):sat }<br>+v23.w += vdmpy(v15:14.h,r22.uh,#1):sat<br>+<br>+#CHECK: 193bf90f { v15.w += vdmpy(v25.h,r27.uh):sat }<br>+v15.w += vdmpy(v25.h,r27.uh):sat<br>+<br>+#CHECK: 1902fcf0 { v17:16.h += vdmpy(v29:28.ub,r2.b) }<br>+v17:16.h += vdmpy(v29:28.ub,r2.b)<br>+<br>+#CHECK: 190cffd1 { v17.h += vdmpy(v31.ub,r12.b) }<br>+v17.h += vdmpy(v31.ub,r12.b)<br>+<br>+#CHECK: 1900f5ac { v12.w += vrmpy(v21.ub,r0.b) }<br>+v12.w += vrmpy(v21.ub,r0.b)<br>+<br>+#CHECK: 1905fb86 { v6.uw += vrmpy(v27.ub,r5.ub) }<br>+v6.uw += vrmpy(v27.ub,r5.ub)<br>+<br>+#CHECK: 191de570 { v16.w += vdmpy(v5.h,r29.b) }<br>+v16.w += vdmpy(v5.h,r29.b)<br>+<br>+#CHECK: 191de846 { v7:6.w += vtmpy(v9:8.h,r29.b) }<br>+v7:6.w += vtmpy(v9:8.h,r29.b)<br>+<br>+#CHECK: 190bfa22 { v3:2.h += vtmpy(v27:26.ub,r11.b) }<br>+v3:2.h += vtmpy(v27:26.ub,r11.b)<br>+<br>+#CHECK: 1915e408 { v9:8.h += vtmpy(v5:4.b,r21.b) }<br>+v9:8.h += vtmpy(v5:4.b,r21.b)<br>+<br>+#CHECK: 1987f71e { v31:30.uh += vmpy(v23.ub,r7.ub) }<br>+v31:30.uh += vmpy(v23.ub,r7.ub)<br>+<br>+#CHECK: 1969ff47 { v7.w += vasl(v31.w,r9) }<br>+v7.w += vasl(v31.w,r9)<br>+<br>+#CHECK: 196de3b0 { v16.w += vasr(v3.w,r13) }<br>+v16.w += vasr(v3.w,r13)<br>+<br>+#CHECK: 1977fe0a { v11:10.uw += vdsad(v31:30.uh,r23.uh) }<br>+v11:10.uw += vdsad(v31:30.uh,r23.uh)<br>+<br>+#CHECK: 196eee36 { v22.h += vmpyi(v14.h,r14.b) }<br>+v22.h += vmpyi(v14.h,r14.b)<br>+<br>+#CHECK: 1931faac { v13:12.h += vmpy(v26.ub,r17.b) }<br>+v13:12.h += vmpy(v26.ub,r17.b)<br>+<br>+#CHECK: 193cfc94 { v21:20.w += vdmpy(v29:28.h,r28.b) }<br>+v21:20.w += vdmpy(v29:28.h,r28.b)<br>+<br>+#CHECK: 1934fc62 { v2.w += vdmpy(v28.h,r20.h):sat }<br>+v2.w += vdmpy(v28.h,r20.h):sat<br>+<br>+#CHECK: 1925fe5f { v31.w += vdmpy(v31:30.h,r5.h):sat }<br>+v31.w += vdmpy(v31:30.h,r5.h):sat<br>+<br>+#CHECK: 194efe36 { v23:22.uw += vmpy(v30.uh,r14.uh) }<br>+v23:22.uw += vmpy(v30.uh,r14.uh)<br>+<br>+#CHECK: 1948e306 { v7:6.w += vmpy(v3.h,r8.h):sat }<br>+v7:6.w += vmpy(v3.h,r8.h):sat<br>+<br>+#CHECK: 192af2f8 { v25:24.w += vmpa(v19:18.h,r10.b) }<br>+v25:24.w += vmpa(v19:18.h,r10.b)<br>+<br>+#CHECK: 1926e4da { v27:26.h += vmpa(v5:4.ub,r6.b) }<br>+v27:26.h += vmpa(v5:4.ub,r6.b)<br>+<br>+#CHECK: 194ff078 { v24.w += vmpyi(v16.w,r15.h) }<br>+v24.w += vmpyi(v16.w,r15.h)<br>+<br>+#CHECK: 1946e247 { v7.w += vmpyi(v2.w,r6.b) }<br>+v7.w += vmpyi(v2.w,r6.b)<br>+<br>+#CHECK: 1c3fead5 { v21.w += vmpyo(v10.w,v31.h):<<1:sat:shift }<br>+v21.w += vmpyo(v10.w,v31.h):<<1:sat:shift<br>+<br>+#CHECK: 1c30e1fa { v26.w += vmpyo(v1.w,v16.h):<<1:rnd:sat:shift }<br>+v26.w += vmpyo(v1.w,v16.h):<<1:rnd:sat:shift<br>+<br>+#CHECK: 1c34f690 { v16.h += vmpyi(v22.h,v20.h) }<br>+v16.h += vmpyi(v22.h,v20.h)<br>+<br>+#CHECK: 1c34f4b5 { v21.w += vmpyie(v20.w,v20.uh) }<br>+v21.w += vmpyie(v20.w,v20.uh)<br>+<br>+#CHECK: 1c54f804 { v4.w += vmpyie(v24.w,v20.h) }<br>+v4.w += vmpyie(v24.w,v20.h)<br>+<br>+#CHECK: 1c1ff6f4 { v21:20.w += vmpy(v22.h,v31.h) }<br>+v21:20.w += vmpy(v22.h,v31.h)<br>+<br>+#CHECK: 1c31f026 { v7:6.w += vmpy(v16.h,v17.uh) }<br>+v7:6.w += vmpy(v16.h,v17.uh)<br>+<br>+#CHECK: 1c12fb98 { v25:24.h += vmpy(v27.b,v18.b) }<br>+v25:24.h += vmpy(v27.b,v18.b)<br>+<br>+#CHECK: 1c17fcc0 { v1:0.h += vmpy(v28.ub,v23.b) }<br>+v1:0.h += vmpy(v28.ub,v23.b)<br>+<br>+#CHECK: 1c16f26f { v15.w += vdmpy(v18.h,v22.h):sat }<br>+v15.w += vdmpy(v18.h,v22.h):sat<br>+<br>+#CHECK: 1c0bea3a { v26.w += vrmpy(v10.b,v11.b) }<br>+v26.w += vrmpy(v10.b,v11.b)<br>+<br>+#CHECK: 1c15eb47 { v7.w += vrmpy(v11.ub,v21.b) }<br>+v7.w += vrmpy(v11.ub,v21.b)<br>+<br>+#CHECK: 1c26e40e { v15:14.uw += vmpy(v4.uh,v6.uh) }<br>+v15:14.uw += vmpy(v4.uh,v6.uh)<br>+<br>+#CHECK: 1c0df9a8 { v9:8.uh += vmpy(v25.ub,v13.ub) }<br>+v9:8.uh += vmpy(v25.ub,v13.ub)<br>+<br>+#CHECK: 1c0afc15 { v21.uw += vrmpy(v28.ub,v10.ub) }<br>+v21.uw += vrmpy(v28.ub,v10.ub)<br><br>Added: llvm/trunk/test/MC/Hexagon/v60-vmpy1.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-vmpy1.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60-vmpy1.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/v60-vmpy1.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/v60-vmpy1.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,138 @@<br>+#RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=obj %s | \<br>+#RUN: llvm-objdump -triple=hexagon -mcpu=hexagonv60 -d - | \<br>+#RUN: FileCheck %s<br>+<br>+#CHECK: 1939c223 { v3.w = vdmpy(v3:2.h,{{ *}}r25.uh,{{ *}}#1):sat }<br>+v3.w=vdmpy(v3:2.h,r25.uh,#1):sat<br>+<br>+#CHECK: 1936de0d { v13.w = vdmpy(v30.h,{{ *}}r22.uh):sat }<br>+v13.w=vdmpy(v30.h,r22.uh):sat<br>+<br>+#CHECK: 1919ccea { v11:10.h = vdmpy(v13:12.ub,{{ *}}r25.b) }<br>+v11:10.h=vdmpy(v13:12.ub,r25.b)<br>+<br>+#CHECK: 1918ced6 { v22.h = vdmpy(v14.ub,{{ *}}r24.b) }<br>+v22.h=vdmpy(v14.ub,r24.b)<br>+<br>+#CHECK: 1911deba { v27:26.uw = vdsad(v31:30.uh,{{ *}}r17.uh) }<br>+v27:26.uw=vdsad(v31:30.uh,r17.uh)<br>+<br>+#CHECK: 1908da97 { v23.w = vrmpy(v26.ub,{{ *}}r8.b) }<br>+v23.w=vrmpy(v26.ub,r8.b)<br>+<br>+#CHECK: 1915c974 { v20.uw = vrmpy(v9.ub,{{ *}}r21.ub) }<br>+v20.uw=vrmpy(v9.ub,r21.ub)<br>+<br>+#CHECK: 190dd446 { v6.w = vdmpy(v20.h,{{ *}}r13.b) }<br>+v6.w=vdmpy(v20.h,r13.b)<br>+<br>+#CHECK: 190ec030 { v17:16.h = vtmpy(v1:0.ub,{{ *}}r14.b) }<br>+v17:16.h=vtmpy(v1:0.ub,r14.b)<br>+<br>+#CHECK: 1918de1c { v29:28.h = vtmpy(v31:30.b,{{ *}}r24.b) }<br>+v29:28.h=vtmpy(v31:30.b,r24.b)<br>+<br>+#CHECK: 198dddf1 { v17.w = vmpyi(v29.w,{{ *}}r13.h) }<br>+v17.w=vmpyi(v29.w,r13.h)<br>+<br>+#CHECK: 19bccb13 { v19.w = vmpyi(v11.w,{{ *}}r28.b) }<br>+v19.w=vmpyi(v11.w,r28.b)<br>+<br>+#CHECK: 19c8cb0a { v11:10.uh = vmpy(v11.ub,{{ *}}r8.ub) }<br>+v11:10.uh=vmpy(v11.ub,r8.ub)<br>+<br>+#CHECK: 1973d012 { v18.h = vmpyi(v16.h,{{ *}}r19.b) }<br>+v18.h=vmpyi(v16.h,r19.b)<br>+<br>+#CHECK: 1922d1aa { v11:10.h = vmpy(v17.ub,{{ *}}r2.b) }<br>+v11:10.h=vmpy(v17.ub,r2.b)<br>+<br>+#CHECK: 1936ce9c { v29:28.w = vdmpy(v15:14.h,{{ *}}r22.b) }<br>+v29:28.w=vdmpy(v15:14.h,r22.b)<br>+<br>+#CHECK: 1925d86b { v11.w = vdmpy(v25:24.h,{{ *}}r5.h):sat }<br>+v11.w=vdmpy(v25:24.h,r5.h):sat<br>+<br>+#CHECK: 1925c255 { v21.w = vdmpy(v2.h,{{ *}}r5.h):sat }<br>+v21.w=vdmpy(v2.h,r5.h):sat<br>+<br>+#CHECK: 1941d424 { v4.h = vmpy(v20.h,{{ *}}r1.h):<<1:sat }<br>+v4.h=vmpy(v20.h,r1.h):<<1:sat<br>+<br>+#CHECK: 1943cf0a { v11:10.w = vmpy(v15.h,{{ *}}r3.h) }<br>+v11:10.w=vmpy(v15.h,r3.h)<br>+<br>+#CHECK: 193ec2f0 { v17:16.w = vmpa(v3:2.h,{{ *}}r30.b) }<br>+v17:16.w=vmpa(v3:2.h,r30.b)<br>+<br>+#CHECK: 193ddcde { v31:30.h = vmpa(v29:28.ub,{{ *}}r29.b) }<br>+v31:30.h=vmpa(v29:28.ub,r29.b)<br>+<br>+#CHECK: 1946de76 { v23:22.uw = vmpy(v30.uh,{{ *}}r6.uh) }<br>+v23:22.uw=vmpy(v30.uh,r6.uh)<br>+<br>+#CHECK: 1945c945 { v5.h = vmpy(v9.h,{{ *}}r5.h):<<1:rnd:sat }<br>+v5.h=vmpy(v9.h,r5.h):<<1:rnd:sat<br>+<br>+#CHECK: 19b0c280 { v1:0.w = vtmpy(v3:2.h,{{ *}}r16.b) }<br>+v1:0.w=vtmpy(v3:2.h,r16.b)<br>+<br>+#CHECK: 1c34d937 { v23.h = vmpy(v25.h,{{ *}}v20.h):<<1:rnd:sat }<br>+v23.h=vmpy(v25.h,v20.h):<<1:rnd:sat<br>+<br>+#CHECK: 1c36c90a { v11:10.uw = vmpy(v9.uh,{{ *}}v22.uh) }<br>+v11:10.uw=vmpy(v9.uh,v22.uh)<br>+<br>+#CHECK: 1c09c3ec { v13:12.w = vmpy(v3.h,{{ *}}v9.h) }<br>+v13:12.w=vmpy(v3.h,v9.h)<br>+<br>+#CHECK: 1c0dd1d8 { v25:24.h = vmpy(v17.ub,{{ *}}v13.b) }<br>+v25:24.h=vmpy(v17.ub,v13.b)<br>+<br>+#CHECK: 1c0dc0a4 { v5:4.uh = vmpy(v0.ub,{{ *}}v13.ub) }<br>+v5:4.uh=vmpy(v0.ub,v13.ub)<br>+<br>+#CHECK: 1c14df84 { v5:4.h = vmpy(v31.b,{{ *}}v20.b) }<br>+v5:4.h=vmpy(v31.b,v20.b)<br>+<br>+#CHECK: 1c16d77c { v28.w = vdmpy(v23.h,{{ *}}v22.h):sat }<br>+v28.w=vdmpy(v23.h,v22.h):sat<br>+<br>+#CHECK: 1c08d84f { v15.w = vrmpy(v24.ub,{{ *}}v8.b) }<br>+v15.w=vrmpy(v24.ub,v8.b)<br>+<br>+#CHECK: 1c06da29 { v9.w = vrmpy(v26.b,{{ *}}v6.b) }<br>+v9.w=vrmpy(v26.b,v6.b)<br>+<br>+#CHECK: 1c1ac805 { v5.uw = vrmpy(v8.ub,{{ *}}v26.ub) }<br>+v5.uw=vrmpy(v8.ub,v26.ub)<br>+<br>+#CHECK: 1c39d089 { v9.h = vmpyi(v16.h,{{ *}}v25.h) }<br>+v9.h=vmpyi(v16.h,v25.h)<br>+<br>+#CHECK: 1c3ecc64 { v5:4.h = vmpa(v13:12.ub,{{ *}}v31:30.b) }<br>+v5:4.h=vmpa(v13:12.ub,v31:30.b)<br>+<br>+#CHECK: 1c21ce54 { v21:20.w = vmpy(v14.h,{{ *}}v1.uh) }<br>+v21:20.w=vmpy(v14.h,v1.uh)<br>+<br>+#CHECK: 1cf2c6f0 { v17:16.h = vmpa(v7:6.ub,{{ *}}v19:18.ub) }<br>+v17:16.h=vmpa(v7:6.ub,v19:18.ub)<br>+<br>+#CHECK: 1fcdc82b { v11.w = vmpyio(v8.w{{ *}},{{ *}}v13.h) }<br>+v11.w=vmpyio(v8.w,v13.h)<br>+<br>+#CHECK: 1fdeda10 { v16.w = vmpyie(v26.w{{ *}},{{ *}}v30.uh) }<br>+v16.w=vmpyie(v26.w,v30.uh)<br>+<br>+#CHECK: 1ff2c2a6 { v6.w = vmpye(v2.w{{ *}},{{ *}}v18.uh) }<br>+v6.w=vmpye(v2.w,v18.uh)<br>+<br>+#CHECK: 1ff7cbfa { v26.w = vmpyo(v11.w{{ *}},{{ *}}v23.h):<<1:sat }<br>+v26.w=vmpyo(v11.w,v23.h):<<1:sat<br>+<br>+#CHECK: 1f5cd411 { v17.w = vmpyo(v20.w{{ *}},{{ *}}v28.h):<<1:rnd:sat }<br>+v17.w=vmpyo(v20.w,v28.h):<<1:rnd:sat<br>+<br>+#CHECK: 1f71cf1d { v29.w = vmpyieo(v15.h{{ *}},{{ *}}v17.h) }<br>+v29.w=vmpyieo(v15.h,v17.h)<br><br>Added: llvm/trunk/test/MC/Hexagon/v60lookup.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60lookup.s?rev=254652&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Hexagon/v60lookup.s?rev=254652&view=auto</a><br>==============================================================================<br>--- llvm/trunk/test/MC/Hexagon/v60lookup.s (added)<br>+++ llvm/trunk/test/MC/Hexagon/v60lookup.s Thu Dec 3 15:44:28 2015<br>@@ -0,0 +1,14 @@<br>+#RUN: llvm-mc -triple=hexagon -mcpu=hexagonv60 -filetype=obj %s | \<br>+#RUN: llvm-objdump -triple=hexagon -mcpu=hexagonv60 -d - | \<br>+#RUN: FileCheck %s<br>+<br>+ V31.b = vlut32(V29.b, V15.b, R1)<br>+# CHECK: 1b79fd3f { v31.b = vlut32(v29.b,v15.b,r1) }<br>+ V31.b |= vlut32(V29.b, V15.b, R2)<br>+# CHECK: 1b7afdbf { v31.b |= vlut32(v29.b,v15.b,r2) }<br>+ V31:30.h = vlut16(V29.b, V15.h, R3)<br>+# CHECK: 1b7bfdde { v31:30.h = vlut16(v29.b,v15.h,r3) }<br>+ v31:30.h |= vlut16(v2.b, v9.h, r4)<br>+# CHECK: 1b4ce2fe { v31:30.h |= vlut16(v2.b,v9.h,r4) }<br>+ v31.w = vinsert(r4)<br>+# CHECK: 19a4e03f { v31.w = vinsert(r4) }<br><br><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a><br><a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><o:p></o:p></p></blockquote></div><p class=MsoNormal><br><br clear=all><o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><p class=MsoNormal>-- <o:p></o:p></p><div><div><p class=MsoNormal>Alexey Samsonov<br><a href="mailto:vonosmas@gmail.com" target="_blank">vonosmas@gmail.com</a><o:p></o:p></p></div></div></div></div></body></html>