<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Thu, Nov 12, 2015 at 4:29 AM, James Molloy via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">Author: jamesm<br>
Date: Thu Nov 12 06:29:09 2015<br>
New Revision: 252878<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=252878&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=252878&view=rev</a><br>
Log:<br>
[SDAG] Introduce a new BITREVERSE node along with a corresponding LLVM intrinsic<br>
<br>
Several backends have instructions to reverse the order of bits in an integer. Conceptually matching such patterns is similar to @llvm.bswap, and it was mentioned in <a href="http://reviews.llvm.org/D14234" rel="noreferrer" target="_blank">http://reviews.llvm.org/D14234</a> that it would be best if these patterns were matched in InstCombine instead of reimplemented in every different target.<br>
<br>
This patch introduces an intrinsic @llvm.bitreverse.i* that operates similarly to @llvm.bswap. For plumbing purposes there is also a new ISD node ISD::BITREVERSE, with simple expansion and promotion support.<br>
<br>
The intention is that InstCombine's BSWAP detection logic will be extended to support BITREVERSE too, and @llvm.bitreverse intrinsics emitted (if the backend supports lowering it efficiently).<br>
<br>
Added:<br>
llvm/trunk/test/CodeGen/AArch64/bitreverse.ll<br>
llvm/trunk/test/CodeGen/PowerPC/bitreverse.ll<br>
llvm/trunk/test/CodeGen/X86/bitreverse.ll<br>
Modified:<br>
llvm/trunk/docs/LangRef.rst<br>
llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h<br>
llvm/trunk/include/llvm/IR/Intrinsics.td<br>
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h<br>
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp<br>
llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp<br>
<br>
Modified: llvm/trunk/docs/LangRef.rst<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.rst?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/LangRef.rst?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/docs/LangRef.rst (original)<br>
+++ llvm/trunk/docs/LangRef.rst Thu Nov 12 06:29:09 2015<br>
@@ -10417,6 +10417,34 @@ Bit Manipulation Intrinsics<br>
LLVM provides intrinsics for a few important bit manipulation<br>
operations. These allow efficient code generation for some algorithms.<br>
<br>
+'``llvm.bitreverse.*``' Intrinsics<br>
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^<br>
+<br>
+Syntax:<br>
+"""""""<br>
+<br>
+This is an overloaded intrinsic function. You can use bitreverse on any<br>
+integer type.<br>
+<br>
+::<br>
+<br>
+ declare i16 @llvm.bitreverse.i16(i16 <id>)<br>
+ declare i32 @llvm.bitreverse.i32(i32 <id>)<br>
+ declare i64 @llvm.bitreverse.i64(i64 <id>)<br>
+<br>
+Overview:<br>
+"""""""""<br>
+<br>
+The '``llvm.bitreverse``' family of intrinsics is used to reverse the<br>
+bitpattern of an integer value; for example ``0b1234567`` becomes<br>
+``0b7654321``.<br>
+<br>
+Semantics:<br>
+""""""""""<br>
+<br>
+The ``<a href="http://llvm.bitreverse.iN" rel="noreferrer" target="_blank">llvm.bitreverse.iN</a>`` intrinsic returns an i16 value that has bit<br>
+``M`` in the input moved to bit ``N-M`` in the output.<br>
+<br>
'``llvm.bswap.*``' Intrinsics<br>
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^<br>
<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/ISDOpcodes.h Thu Nov 12 06:29:09 2015<br>
@@ -336,7 +336,7 @@ namespace ISD {<br>
SHL, SRA, SRL, ROTL, ROTR,<br>
<br>
/// Byte Swap and Counting operators.<br>
- BSWAP, CTTZ, CTLZ, CTPOP,<br>
+ BSWAP, CTTZ, CTLZ, CTPOP, BITREVERSE,<br>
<br>
/// [SU]ABSDIFF - Signed/Unsigned absolute difference of two input integer<br>
/// vector. These nodes are generated from llvm.*absdiff* intrinsics.<br>
<br>
Modified: llvm/trunk/include/llvm/IR/Intrinsics.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/Intrinsics.td?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/Intrinsics.td?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/IR/Intrinsics.td (original)<br>
+++ llvm/trunk/include/llvm/IR/Intrinsics.td Thu Nov 12 06:29:09 2015<br>
@@ -400,6 +400,7 @@ let Properties = [IntrNoMem] in {<br>
def int_ctpop: Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>]>;<br>
def int_ctlz : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, llvm_i1_ty]>;<br>
def int_cttz : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, llvm_i1_ty]>;<br>
+ def int_bitreverse : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>]>;<br>
}<br>
<br>
//===------------------------ Debugger Intrinsics -------------------------===//<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Nov 12 06:29:09 2015<br>
@@ -145,6 +145,7 @@ private:<br>
SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned,<br>
SDLoc dl);<br>
<br>
+ SDValue ExpandBITREVERSE(SDValue Op, SDLoc dl);<br>
SDValue ExpandBSWAP(SDValue Op, SDLoc dl);<br>
SDValue ExpandBitCount(unsigned Opc, SDValue Op, SDLoc dl);<br>
<br>
@@ -2775,6 +2776,29 @@ SDValue SelectionDAGLegalize::PromoteLeg<br>
return DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation);<br>
}<br>
<br>
+/// Open code the operations for BITREVERSE.<br>
+SDValue SelectionDAGLegalize::ExpandBITREVERSE(SDValue Op, SDLoc dl) {<br>
+ EVT VT = Op.getValueType();<br>
+ EVT SHVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout());<br>
+ unsigned Sz = VT.getSizeInBits();<br>
+<br>
+ SDValue Tmp, Tmp2;<br>
+ Tmp = DAG.getConstant(0, dl, VT);<br>
+ for (unsigned I = 0, J = Sz-1; I < Sz; ++I, --J) {<br>
+ if (I < J)<br>
+ Tmp2 =<br>
+ DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(J - I, dl, SHVT));<br>
+ else<br>
+ Tmp2 =<br>
+ DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(I - J, dl, SHVT));<br>
+ Tmp2 =<br>
+ DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(1U << J, dl, VT));<br></blockquote><div> </div><div>According to UBSan, 1U is a 32-bit value and J is 63, which makes this shift larger than the bit-width. Attempting to fix this by casting 1 to uin64_t first results in the following assertion when testing CodeGen/AArch64/bitreverse.ll:</div><div><br></div><div>llc: ../lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1110: llvm::SDValue llvm::SelectionDAG::getConstant(uint64_t, llvm::SDLoc, llvm::EVT, bool, bool): Assertion `(EltVT.getSizeInBits() >= 64 || (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && "getConstant with a uint64_t value that doesn't fit in the type!"' failed.<br></div><div><br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
+ Tmp = DAG.getNode(ISD::OR, dl, VT, Tmp, Tmp2);<br>
+ }<br>
+<br>
+ return Tmp;<br>
+}<br>
+<br>
/// Open code the operations for BSWAP of the specified operation.<br>
SDValue SelectionDAGLegalize::ExpandBSWAP(SDValue Op, SDLoc dl) {<br>
EVT VT = Op.getValueType();<br>
@@ -2941,6 +2965,9 @@ bool SelectionDAGLegalize::ExpandNode(SD<br>
Tmp1 = ExpandBitCount(Node->getOpcode(), Node->getOperand(0), dl);<br>
Results.push_back(Tmp1);<br>
break;<br>
+ case ISD::BITREVERSE:<br>
+ Results.push_back(ExpandBITREVERSE(Node->getOperand(0), dl));<br>
+ break;<br>
case ISD::BSWAP:<br>
Results.push_back(ExpandBSWAP(Node->getOperand(0), dl));<br>
break;<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Thu Nov 12 06:29:09 2015<br>
@@ -53,6 +53,7 @@ void DAGTypeLegalizer::PromoteIntegerRes<br>
case ISD::AssertSext: Res = PromoteIntRes_AssertSext(N); break;<br>
case ISD::AssertZext: Res = PromoteIntRes_AssertZext(N); break;<br>
case ISD::BITCAST: Res = PromoteIntRes_BITCAST(N); break;<br>
+ case ISD::BITREVERSE: Res = PromoteIntRes_BITREVERSE(N); break;<br>
case ISD::BSWAP: Res = PromoteIntRes_BSWAP(N); break;<br>
case ISD::BUILD_PAIR: Res = PromoteIntRes_BUILD_PAIR(N); break;<br>
case ISD::Constant: Res = PromoteIntRes_Constant(N); break;<br>
@@ -320,6 +321,19 @@ SDValue DAGTypeLegalizer::PromoteIntRes_<br>
TLI.getShiftAmountTy(NVT, DAG.getDataLayout())));<br>
}<br>
<br>
+SDValue DAGTypeLegalizer::PromoteIntRes_BITREVERSE(SDNode *N) {<br>
+ SDValue Op = GetPromotedInteger(N->getOperand(0));<br>
+ EVT OVT = N->getValueType(0);<br>
+ EVT NVT = Op.getValueType();<br>
+ SDLoc dl(N);<br>
+<br>
+ unsigned DiffBits = NVT.getScalarSizeInBits() - OVT.getScalarSizeInBits();<br>
+ return DAG.getNode(<br>
+ ISD::SRL, dl, NVT, DAG.getNode(ISD::BITREVERSE, dl, NVT, Op),<br>
+ DAG.getConstant(DiffBits, dl,<br>
+ TLI.getShiftAmountTy(NVT, DAG.getDataLayout())));<br>
+}<br>
+<br>
SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_PAIR(SDNode *N) {<br>
// The pair element type may be legal, or may not promote to the same type as<br>
// the result, for example i14 = BUILD_PAIR (i7, i7). Handle all cases.<br>
@@ -1263,6 +1277,7 @@ void DAGTypeLegalizer::ExpandIntegerResu<br>
case ISD::ANY_EXTEND: ExpandIntRes_ANY_EXTEND(N, Lo, Hi); break;<br>
case ISD::AssertSext: ExpandIntRes_AssertSext(N, Lo, Hi); break;<br>
case ISD::AssertZext: ExpandIntRes_AssertZext(N, Lo, Hi); break;<br>
+ case ISD::BITREVERSE: ExpandIntRes_BITREVERSE(N, Lo, Hi); break;<br>
case ISD::BSWAP: ExpandIntRes_BSWAP(N, Lo, Hi); break;<br>
case ISD::Constant: ExpandIntRes_Constant(N, Lo, Hi); break;<br>
case ISD::CTLZ_ZERO_UNDEF:<br>
@@ -1833,6 +1848,14 @@ void DAGTypeLegalizer::ExpandIntRes_Asse<br>
}<br>
}<br>
<br>
+void DAGTypeLegalizer::ExpandIntRes_BITREVERSE(SDNode *N,<br>
+ SDValue &Lo, SDValue &Hi) {<br>
+ SDLoc dl(N);<br>
+ GetExpandedInteger(N->getOperand(0), Hi, Lo); // Note swapped operands.<br>
+ Lo = DAG.getNode(ISD::BITREVERSE, dl, Lo.getValueType(), Lo);<br>
+ Hi = DAG.getNode(ISD::BITREVERSE, dl, Hi.getValueType(), Hi);<br>
+}<br>
+<br>
void DAGTypeLegalizer::ExpandIntRes_BSWAP(SDNode *N,<br>
SDValue &Lo, SDValue &Hi) {<br>
SDLoc dl(N);<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Thu Nov 12 06:29:09 2015<br>
@@ -234,6 +234,7 @@ private:<br>
SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N);<br>
SDValue PromoteIntRes_BITCAST(SDNode *N);<br>
SDValue PromoteIntRes_BSWAP(SDNode *N);<br>
+ SDValue PromoteIntRes_BITREVERSE(SDNode *N);<br>
SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);<br>
SDValue PromoteIntRes_Constant(SDNode *N);<br>
SDValue PromoteIntRes_CONVERT_RNDSAT(SDNode *N);<br>
@@ -330,6 +331,7 @@ private:<br>
void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);<br>
void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);<br>
void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);<br>
+ void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi);<br>
void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);<br>
void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);<br>
void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Thu Nov 12 06:29:09 2015<br>
@@ -67,6 +67,7 @@ void DAGTypeLegalizer::ScalarizeVectorRe<br>
case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;<br>
case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;<br>
case ISD::ANY_EXTEND:<br>
+ case ISD::BITREVERSE:<br>
case ISD::BSWAP:<br>
case ISD::CTLZ:<br>
case ISD::CTLZ_ZERO_UNDEF:<br>
@@ -616,6 +617,7 @@ void DAGTypeLegalizer::SplitVectorResult<br>
SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);<br>
break;<br>
<br>
+ case ISD::BITREVERSE:<br>
case ISD::BSWAP:<br>
case ISD::CONVERT_RNDSAT:<br>
case ISD::CTLZ:<br>
@@ -2027,6 +2029,7 @@ void DAGTypeLegalizer::WidenVectorResult<br>
Res = WidenVecRes_Convert(N);<br>
break;<br>
<br>
+ case ISD::BITREVERSE:<br>
case ISD::BSWAP:<br>
case ISD::CTLZ:<br>
case ISD::CTPOP:<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Thu Nov 12 06:29:09 2015<br>
@@ -4872,6 +4872,11 @@ SelectionDAGBuilder::visitIntrinsicCall(<br>
DAG.setRoot(Res.getValue(1));<br>
return nullptr;<br>
}<br>
+ case Intrinsic::bitreverse:<br>
+ setValue(&I, DAG.getNode(ISD::BITREVERSE, sdl,<br>
+ getValue(I.getArgOperand(0)).getValueType(),<br>
+ getValue(I.getArgOperand(0))));<br>
+ return nullptr;<br>
case Intrinsic::bswap:<br>
setValue(&I, DAG.getNode(ISD::BSWAP, sdl,<br>
getValue(I.getArgOperand(0)).getValueType(),<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp Thu Nov 12 06:29:09 2015<br>
@@ -311,13 +311,14 @@ std::string SDNode::getOperationName(con<br>
case ISD::GC_TRANSITION_END: return "gc_transition.end";<br>
<br>
// Bit manipulation<br>
+ case ISD::BITREVERSE: return "bitreverse";<br>
case ISD::BSWAP: return "bswap";<br>
case ISD::CTPOP: return "ctpop";<br>
case ISD::CTTZ: return "cttz";<br>
case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";<br>
case ISD::CTLZ: return "ctlz";<br>
case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";<br>
-<br>
+<br>
// Trampolines<br>
case ISD::INIT_TRAMPOLINE: return "init_trampoline";<br>
case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";<br>
<br>
Modified: llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp?rev=252878&r1=252877&r2=252878&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp?rev=252878&r1=252877&r2=252878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp Thu Nov 12 06:29:09 2015<br>
@@ -828,7 +828,8 @@ void TargetLoweringBase::initActions() {<br>
setOperationAction(ISD::UMULO, VT, Expand);<br>
setOperationAction(ISD::UABSDIFF, VT, Expand);<br>
setOperationAction(ISD::SABSDIFF, VT, Expand);<br>
-<br>
+ setOperationAction(ISD::BITREVERSE, VT, Expand);<br>
+<br>
// These library functions default to expand.<br>
setOperationAction(ISD::FROUND, VT, Expand);<br>
<br>
<br>
Added: llvm/trunk/test/CodeGen/AArch64/bitreverse.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/bitreverse.ll?rev=252878&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/bitreverse.ll?rev=252878&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/AArch64/bitreverse.ll (added)<br>
+++ llvm/trunk/test/CodeGen/AArch64/bitreverse.ll Thu Nov 12 06:29:09 2015<br>
@@ -0,0 +1,23 @@<br>
+; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s<br>
+<br>
+; These tests just check that the plumbing is in place for @llvm.bitreverse. The<br>
+; actual output is massive at the moment as llvm.bitreverse is not yet legal.<br>
+<br>
+declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone<br>
+<br>
+define <2 x i16> @f(<2 x i16> %a) {<br>
+; CHECK-LABEL: f:<br>
+; CHECK: ushr<br>
+ %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)<br>
+ ret <2 x i16> %b<br>
+}<br>
+<br>
+declare i8 @llvm.bitreverse.i8(i8) readnone<br>
+<br>
+define i8 @g(i8 %a) {<br>
+; CHECK-LABEL: g:<br>
+; CHECK: lsl<br>
+; CHECK: and<br>
+ %b = call i8 @llvm.bitreverse.i8(i8 %a)<br>
+ ret i8 %b<br>
+}<br>
<br>
Added: llvm/trunk/test/CodeGen/PowerPC/bitreverse.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/bitreverse.ll?rev=252878&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/bitreverse.ll?rev=252878&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/PowerPC/bitreverse.ll (added)<br>
+++ llvm/trunk/test/CodeGen/PowerPC/bitreverse.ll Thu Nov 12 06:29:09 2015<br>
@@ -0,0 +1,23 @@<br>
+; RUN: llc -march=ppc64 %s -o - | FileCheck %s<br>
+<br>
+; These tests just check that the plumbing is in place for @llvm.bitreverse. The<br>
+; actual output is massive at the moment as llvm.bitreverse is not yet legal.<br>
+<br>
+declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone<br>
+<br>
+define <2 x i16> @f(<2 x i16> %a) {<br>
+; CHECK-LABEL: f:<br>
+; CHECK: rlwinm<br>
+ %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)<br>
+ ret <2 x i16> %b<br>
+}<br>
+<br>
+declare i8 @llvm.bitreverse.i8(i8) readnone<br>
+<br>
+define i8 @g(i8 %a) {<br>
+; CHECK-LABEL: g:<br>
+; CHECK: rlwinm<br>
+; CHECK: rlwimi<br>
+ %b = call i8 @llvm.bitreverse.i8(i8 %a)<br>
+ ret i8 %b<br>
+}<br>
<br>
Added: llvm/trunk/test/CodeGen/X86/bitreverse.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitreverse.ll?rev=252878&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitreverse.ll?rev=252878&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/bitreverse.ll (added)<br>
+++ llvm/trunk/test/CodeGen/X86/bitreverse.ll Thu Nov 12 06:29:09 2015<br>
@@ -0,0 +1,22 @@<br>
+; RUN: llc -march=x86 %s -o - | FileCheck %s<br>
+<br>
+; These tests just check that the plumbing is in place for @llvm.bitreverse. The<br>
+; actual output is massive at the moment as llvm.bitreverse is not yet legal.<br>
+<br>
+declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone<br>
+<br>
+define <2 x i16> @f(<2 x i16> %a) {<br>
+; CHECK-LABEL: f:<br>
+; CHECK: shll<br>
+ %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)<br>
+ ret <2 x i16> %b<br>
+}<br>
+<br>
+declare i8 @llvm.bitreverse.i8(i8) readnone<br>
+<br>
+define i8 @g(i8 %a) {<br>
+; CHECK-LABEL: g:<br>
+; CHECK: shlb<br>
+ %b = call i8 @llvm.bitreverse.i8(i8 %a)<br>
+ ret i8 %b<br>
+}<br>
<br>
<br>
_______________________________________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br>
<a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" rel="noreferrer" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><br>
</blockquote></div><br></div></div>