<div dir="ltr"><div class="gmail_quote"><div dir="ltr">On Sat, Oct 24, 2015 at 1:50 PM Simon Pilgrim via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: rksimon<br>
Date: Sat Oct 24 15:48:08 2015<br>
New Revision: 251207<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=251207&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=251207&view=rev</a><br>
Log:<br>
[X86][SSE] lowerVectorShuffleWithUNPCK - use equivalent shuffle mask test.<br>
<br>
Use isShuffleEquivalent to match UNPCK shuffles - better support for build vector inputs.<br></blockquote><div><br></div><div>Why was there no test case exercising this?</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=251207&r1=251206&r2=251207&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=251207&r1=251206&r2=251207&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Oct 24 15:48:08 2015<br>
@@ -6785,43 +6785,32 @@ static SDValue lowerVectorShuffleWithUNP<br>
SDValue V1, SDValue V2,<br>
SelectionDAG &DAG) {<br>
int NumElts = VT.getVectorNumElements();<br>
- bool Unpckl = true;<br>
- bool Unpckh = true;<br>
- bool UnpcklSwapped = true;<br>
- bool UnpckhSwapped = true;<br>
int NumEltsInLane = 128 / VT.getScalarSizeInBits();<br>
+ SmallVector<int, 8> Unpckl;<br>
+ SmallVector<int, 8> Unpckh;<br>
<br>
for (int i = 0; i < NumElts; ++i) {<br>
unsigned LaneStart = (i / NumEltsInLane) * NumEltsInLane;<br>
-<br>
int LoPos = (i % NumEltsInLane) / 2 + LaneStart + NumElts * (i % 2);<br>
int HiPos = LoPos + NumEltsInLane / 2;<br>
- int LoPosSwapped = (LoPos + NumElts) % (NumElts * 2);<br>
- int HiPosSwapped = (HiPos + NumElts) % (NumElts * 2);<br>
-<br>
- if (Mask[i] == -1)<br>
- continue;<br>
- if (Mask[i] != LoPos)<br>
- Unpckl = false;<br>
- if (Mask[i] != HiPos)<br>
- Unpckh = false;<br>
- if (Mask[i] != LoPosSwapped)<br>
- UnpcklSwapped = false;<br>
- if (Mask[i] != HiPosSwapped)<br>
- UnpckhSwapped = false;<br>
- if (!Unpckl && !Unpckh && !UnpcklSwapped && !UnpckhSwapped)<br>
- return SDValue();<br>
+ Unpckl.push_back(LoPos);<br>
+ Unpckh.push_back(HiPos);<br>
}<br>
- if (Unpckl)<br>
+<br>
+ if (isShuffleEquivalent(V1, V2, Mask, Unpckl))<br>
return DAG.getNode(X86ISD::UNPCKL, DL, VT, V1, V2);<br>
- if (Unpckh)<br>
+ if (isShuffleEquivalent(V1, V2, Mask, Unpckh))<br>
return DAG.getNode(X86ISD::UNPCKH, DL, VT, V1, V2);<br>
- if (UnpcklSwapped)<br>
+<br>
+ // Commute and try again.<br>
+ ShuffleVectorSDNode::commuteMask(Unpckl);<br>
+ if (isShuffleEquivalent(V1, V2, Mask, Unpckl))<br>
return DAG.getNode(X86ISD::UNPCKL, DL, VT, V2, V1);<br>
- if (UnpckhSwapped)<br>
+<br>
+ ShuffleVectorSDNode::commuteMask(Unpckh);<br>
+ if (isShuffleEquivalent(V1, V2, Mask, Unpckh))<br>
return DAG.getNode(X86ISD::UNPCKH, DL, VT, V2, V1);<br>
<br>
- llvm_unreachable("Unexpected result of UNPCK mask analysis");<br>
return SDValue();<br>
}<br>
<br>
<br>
<br>
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</blockquote></div></div>