<div dir="ltr">This commit is also breaking the clang test CodeGen/avx512f-builtins.c</div><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Sep 9, 2015 at 7:35 AM, Igor Breger via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: ibreger<br>
Date: Wed Sep 9 09:35:09 2015<br>
New Revision: 247149<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=247149&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=247149&view=rev</a><br>
Log:<br>
AVX512: Implemented encoding and intrinsics for<br>
vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4<br>
Added tests for intrinsics and encoding.<br>
<br>
Differential Revision: <a href="http://reviews.llvm.org/D11802" rel="noreferrer" target="_blank">http://reviews.llvm.org/D11802</a><br>
<br>
Modified:<br>
llvm/trunk/include/llvm/IR/IntrinsicsX86.td<br>
llvm/trunk/lib/Target/X86/X86InstrAVX512.td<br>
llvm/trunk/test/CodeGen/X86/avx512-cvt.ll<br>
llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll<br>
llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll<br>
llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics.ll<br>
llvm/trunk/test/CodeGen/X86/avx512dqvl-intrinsics.ll<br>
llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll<br>
llvm/trunk/test/MC/X86/avx512-encodings.s<br>
llvm/trunk/test/MC/X86/x86-64-avx512dq.s<br>
llvm/trunk/test/MC/X86/x86-64-avx512dq_vl.s<br>
llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s<br>
<br>
Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)<br>
+++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Wed Sep 9 09:35:09 2015<br>
@@ -2233,20 +2233,52 @@ let TargetPrefix = "x86" in { // All in<br>
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".<br>
def int_x86_avx512_mask_vextractf32x4_512 :<br>
GCCBuiltin<"__builtin_ia32_extractf32x4_mask">,<br>
- Intrinsic<[llvm_v4f32_ty], [llvm_v16f32_ty, llvm_i8_ty,<br>
- llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ Intrinsic<[llvm_v4f32_ty], [llvm_v16f32_ty, llvm_i32_ty,<br>
+ llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;<br>
def int_x86_avx512_mask_vextracti32x4_512 :<br>
GCCBuiltin<"__builtin_ia32_extracti32x4_mask">,<br>
- Intrinsic<[llvm_v4i32_ty], [llvm_v16i32_ty, llvm_i8_ty,<br>
- llvm_v4i32_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ Intrinsic<[llvm_v4i32_ty], [llvm_v16i32_ty, llvm_i32_ty,<br>
+ llvm_v4i32_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ def int_x86_avx512_mask_vextractf32x4_256 :<br>
+ GCCBuiltin<"__builtin_ia32_extractf32x4_256_mask">,<br>
+ Intrinsic<[llvm_v4f32_ty], [llvm_v8f32_ty, llvm_i32_ty,<br>
+ llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ def int_x86_avx512_mask_vextracti32x4_256 :<br>
+ GCCBuiltin<"__builtin_ia32_extracti32x4_256_mask">,<br>
+ Intrinsic<[llvm_v4i32_ty], [llvm_v8i32_ty, llvm_i32_ty,<br>
+ llvm_v4i32_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ def int_x86_avx512_mask_vextractf64x2_256 :<br>
+ GCCBuiltin<"__builtin_ia32_extractf64x2_256_mask">,<br>
+ Intrinsic<[llvm_v2f64_ty], [llvm_v4f64_ty, llvm_i32_ty,<br>
+ llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ def int_x86_avx512_mask_vextracti64x2_256 :<br>
+ GCCBuiltin<"__builtin_ia32_extracti64x2_256_mask">,<br>
+ Intrinsic<[llvm_v2i64_ty], [llvm_v4i64_ty, llvm_i32_ty,<br>
+ llvm_v2i64_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ def int_x86_avx512_mask_vextractf64x2_512 :<br>
+ GCCBuiltin<"__builtin_ia32_extractf64x2_512_mask">,<br>
+ Intrinsic<[llvm_v2f64_ty], [llvm_v8f64_ty, llvm_i32_ty,<br>
+ llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ def int_x86_avx512_mask_vextracti64x2_512 :<br>
+ GCCBuiltin<"__builtin_ia32_extracti64x2_512_mask">,<br>
+ Intrinsic<[llvm_v2i64_ty], [llvm_v8i64_ty, llvm_i32_ty,<br>
+ llvm_v2i64_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ def int_x86_avx512_mask_vextractf32x8_512 :<br>
+ GCCBuiltin<"__builtin_ia32_extractf32x8_mask">,<br>
+ Intrinsic<[llvm_v8f32_ty], [llvm_v16f32_ty, llvm_i32_ty,<br>
+ llvm_v8f32_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ def int_x86_avx512_mask_vextracti32x8_512 :<br>
+ GCCBuiltin<"__builtin_ia32_extracti32x8_mask">,<br>
+ Intrinsic<[llvm_v8i32_ty],[llvm_v16i32_ty, llvm_i32_ty,<br>
+ llvm_v8i32_ty, llvm_i8_ty], [IntrNoMem]>;<br>
def int_x86_avx512_mask_vextractf64x4_512 :<br>
GCCBuiltin<"__builtin_ia32_extractf64x4_mask">,<br>
- Intrinsic<[llvm_v4f64_ty], [llvm_v8f64_ty, llvm_i8_ty,<br>
- llvm_v4f64_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ Intrinsic<[llvm_v4f64_ty], [llvm_v8f64_ty, llvm_i32_ty,<br>
+ llvm_v4f64_ty, llvm_i8_ty], [IntrNoMem]>;<br>
def int_x86_avx512_mask_vextracti64x4_512 :<br>
GCCBuiltin<"__builtin_ia32_extracti64x4_mask">,<br>
- Intrinsic<[llvm_v4i64_ty], [llvm_v8i64_ty, llvm_i8_ty,<br>
- llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>;<br>
+ Intrinsic<[llvm_v4i64_ty], [llvm_v8i64_ty, llvm_i32_ty,<br>
+ llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>;<br>
}<br>
<br>
// Conditional load ops<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Wed Sep 9 09:35:09 2015<br>
@@ -566,85 +566,142 @@ def VINSERTPSzrm: AVX512AIi8<0x21, MRMSr<br>
// AVX-512 VECTOR EXTRACT<br>
//---<br>
<br>
+multiclass vextract_for_size_first_position_lowering<X86VectorVTInfo From,<br>
+ X86VectorVTInfo To> {<br>
+ // A subvector extract from the first vector position is<br>
+ // a subregister copy that needs no instruction.<br>
+ def NAME # To.NumElts:<br>
+ Pat<(To.VT (extract_subvector (From.VT From.RC:$src),(iPTR 0))),<br>
+ (To.VT (EXTRACT_SUBREG (From.VT From.RC:$src), To.SubRegIdx))>;<br>
+}<br>
+<br>
multiclass vextract_for_size<int Opcode,<br>
- X86VectorVTInfo From, X86VectorVTInfo To,<br>
- X86VectorVTInfo AltFrom, X86VectorVTInfo AltTo,<br>
- PatFrag vextract_extract,<br>
- SDNodeXForm EXTRACT_get_vextract_imm> {<br>
+ X86VectorVTInfo From, X86VectorVTInfo To,<br>
+ PatFrag vextract_extract> :<br>
+ vextract_for_size_first_position_lowering<From, To> {<br>
+<br>
let hasSideEffects = 0, ExeDomain = To.ExeDomain in {<br>
+ // use AVX512_maskable_in_asm (AVX512_maskable can't be used due to<br>
+ // vextract_extract), we interesting only in patterns without mask,<br>
+ // intrinsics pattern match generated bellow.<br>
defm rr : AVX512_maskable_in_asm<Opcode, MRMDestReg, To, (outs To.RC:$dst),<br>
- (ins VR512:$src1, u8imm:$idx),<br>
- "vextract" # To.EltTypeName # "x4",<br>
+ (ins From.RC:$src1, i32u8imm:$idx),<br>
+ "vextract" # To.EltTypeName # "x" # To.NumElts,<br>
"$idx, $src1", "$src1, $idx",<br>
- [(set To.RC:$dst, (vextract_extract:$idx (From.VT VR512:$src1),<br>
+ [(set To.RC:$dst, (vextract_extract:$idx (From.VT From.RC:$src1),<br>
(iPTR imm)))]>,<br>
- AVX512AIi8Base, EVEX, EVEX_V512;<br>
- let mayStore = 1 in<br>
- def rm : AVX512AIi8<Opcode, MRMDestMem, (outs),<br>
- (ins To.MemOp:$dst, VR512:$src1, u8imm:$src2),<br>
- "vextract" # To.EltTypeName # "x4\t{$src2, $src1, $dst|"<br>
- "$dst, $src1, $src2}",<br>
- []>, EVEX, EVEX_V512, EVEX_CD8<To.EltSize, CD8VT4>;<br>
+ AVX512AIi8Base, EVEX;<br>
+ let mayStore = 1 in {<br>
+ def rm : AVX512AIi8<Opcode, MRMDestMem, (outs),<br>
+ (ins To.MemOp:$dst, From.RC:$src1, i32u8imm:$src2),<br>
+ "vextract" # To.EltTypeName # "x" # To.NumElts #<br>
+ "\t{$src2, $src1, $dst|$dst, $src1, $src2}",<br>
+ []>, EVEX;<br>
+<br>
+ def rmk : AVX512AIi8<Opcode, MRMDestMem, (outs),<br>
+ (ins To.MemOp:$dst, To.KRCWM:$mask,<br>
+ From.RC:$src1, i32u8imm:$src2),<br>
+ "vextract" # To.EltTypeName # "x" # To.NumElts #<br>
+ "\t{$src2, $src1, $dst {${mask}}|"<br>
+ "$dst {${mask}}, $src1, $src2}",<br>
+ []>, EVEX_K, EVEX;<br>
+ }//mayStore = 1<br>
}<br>
<br>
- // Codegen pattern with the alternative types, e.g. v8i64 -> v2i64 for<br>
- // vextracti32x4<br>
- def : Pat<(vextract_extract:$ext (AltFrom.VT VR512:$src1), (iPTR imm)),<br>
- (AltTo.VT (!cast<Instruction>(NAME # To.EltSize # "x4rr")<br>
- VR512:$src1,<br>
- (EXTRACT_get_vextract_imm To.RC:$ext)))>;<br>
-<br>
- // A 128/256-bit subvector extract from the first 512-bit vector position is<br>
- // a subregister copy that needs no instruction.<br>
- def : Pat<(To.VT (extract_subvector (From.VT VR512:$src), (iPTR 0))),<br>
- (To.VT<br>
- (EXTRACT_SUBREG (From.VT VR512:$src), To.SubRegIdx))>;<br>
-<br>
- // And for the alternative types.<br>
- def : Pat<(AltTo.VT (extract_subvector (AltFrom.VT VR512:$src), (iPTR 0))),<br>
- (AltTo.VT<br>
- (EXTRACT_SUBREG (AltFrom.VT VR512:$src), AltTo.SubRegIdx))>;<br>
-<br>
// Intrinsic call with masking.<br>
def : Pat<(!cast<Intrinsic>("int_x86_avx512_mask_vextract" # To.EltTypeName #<br>
- "x4_512")<br>
- VR512:$src1, (iPTR imm:$idx), To.RC:$src0, GR8:$mask),<br>
- (!cast<Instruction>(NAME # To.EltSize # "x4rrk") To.RC:$src0,<br>
- (v4i1 (COPY_TO_REGCLASS GR8:$mask, VK4WM)),<br>
- VR512:$src1, imm:$idx)>;<br>
+ "x" # To.NumElts # "_" # From.Size)<br>
+ From.RC:$src1, (iPTR imm:$idx), To.RC:$src0, To.MRC:$mask),<br>
+ (!cast<Instruction>(NAME # To.EltSize # "x" # To.NumElts #<br>
+ From.ZSuffix # "rrk")<br>
+ To.RC:$src0,<br>
+ (COPY_TO_REGCLASS To.MRC:$mask, To.KRCWM),<br>
+ From.RC:$src1, imm:$idx)>;<br>
<br>
// Intrinsic call with zero-masking.<br>
def : Pat<(!cast<Intrinsic>("int_x86_avx512_mask_vextract" # To.EltTypeName #<br>
- "x4_512")<br>
- VR512:$src1, (iPTR imm:$idx), To.ImmAllZerosV, GR8:$mask),<br>
- (!cast<Instruction>(NAME # To.EltSize # "x4rrkz")<br>
- (v4i1 (COPY_TO_REGCLASS GR8:$mask, VK4WM)),<br>
- VR512:$src1, imm:$idx)>;<br>
+ "x" # To.NumElts # "_" # From.Size)<br>
+ From.RC:$src1, (iPTR imm:$idx), To.ImmAllZerosV, To.MRC:$mask),<br>
+ (!cast<Instruction>(NAME # To.EltSize # "x" # To.NumElts #<br>
+ From.ZSuffix # "rrkz")<br>
+ (COPY_TO_REGCLASS To.MRC:$mask, To.KRCWM),<br>
+ From.RC:$src1, imm:$idx)>;<br>
<br>
// Intrinsic call without masking.<br>
def : Pat<(!cast<Intrinsic>("int_x86_avx512_mask_vextract" # To.EltTypeName #<br>
- "x4_512")<br>
- VR512:$src1, (iPTR imm:$idx), To.ImmAllZerosV, (i8 -1)),<br>
- (!cast<Instruction>(NAME # To.EltSize # "x4rr")<br>
- VR512:$src1, imm:$idx)>;<br>
+ "x" # To.NumElts # "_" # From.Size)<br>
+ From.RC:$src1, (iPTR imm:$idx), To.ImmAllZerosV, (i8 -1)),<br>
+ (!cast<Instruction>(NAME # To.EltSize # "x" # To.NumElts #<br>
+ From.ZSuffix # "rr")<br>
+ From.RC:$src1, imm:$idx)>;<br>
}<br>
<br>
-multiclass vextract_for_type<ValueType EltVT32, int Opcode32,<br>
- ValueType EltVT64, int Opcode64> {<br>
- defm NAME # "32x4" : vextract_for_size<Opcode32,<br>
+// This multiclass generates patterns for matching vextract with common types<br>
+// (X86VectorVTInfo From , X86VectorVTInfo To) and alternative types<br>
+// (X86VectorVTInfo AltFrom, X86VectorVTInfo AltTo)<br>
+multiclass vextract_for_size_all<int Opcode,<br>
+ X86VectorVTInfo From, X86VectorVTInfo To,<br>
+ X86VectorVTInfo AltFrom, X86VectorVTInfo AltTo,<br>
+ PatFrag vextract_extract,<br>
+ SDNodeXForm EXTRACT_get_vextract_imm> :<br>
+ vextract_for_size<Opcode, From, To, vextract_extract>,<br>
+ vextract_for_size_first_position_lowering<AltFrom, AltTo> {<br>
+<br>
+ // Codegen pattern with the alternative types.<br>
+ // Only add this if operation not supported natively via AVX512DQ<br>
+ let Predicates = [NoDQI] in<br>
+ def : Pat<(vextract_extract:$ext (AltFrom.VT AltFrom.RC:$src1), (iPTR imm)),<br>
+ (AltTo.VT (!cast<Instruction>(NAME # To.EltSize # "x" #<br>
+ To.NumElts # From.ZSuffix # "rr")<br>
+ AltFrom.RC:$src1,<br>
+ (EXTRACT_get_vextract_imm To.RC:$ext)))>;<br>
+}<br>
+<br>
+multiclass vextract_for_type<ValueType EltVT32, int Opcode128,<br>
+ ValueType EltVT64, int Opcode256> {<br>
+ defm NAME # "32x4Z" : vextract_for_size_all<Opcode128,<br>
X86VectorVTInfo<16, EltVT32, VR512>,<br>
X86VectorVTInfo< 4, EltVT32, VR128X>,<br>
X86VectorVTInfo< 8, EltVT64, VR512>,<br>
X86VectorVTInfo< 2, EltVT64, VR128X>,<br>
vextract128_extract,<br>
- EXTRACT_get_vextract128_imm>;<br>
- defm NAME # "64x4" : vextract_for_size<Opcode64,<br>
+ EXTRACT_get_vextract128_imm>,<br>
+ EVEX_V512, EVEX_CD8<32, CD8VT4>;<br>
+ defm NAME # "64x4Z" : vextract_for_size_all<Opcode256,<br>
X86VectorVTInfo< 8, EltVT64, VR512>,<br>
X86VectorVTInfo< 4, EltVT64, VR256X>,<br>
X86VectorVTInfo<16, EltVT32, VR512>,<br>
X86VectorVTInfo< 8, EltVT32, VR256>,<br>
vextract256_extract,<br>
- EXTRACT_get_vextract256_imm>, VEX_W;<br>
+ EXTRACT_get_vextract256_imm>,<br>
+ VEX_W, EVEX_V512, EVEX_CD8<64, CD8VT4>;<br>
+ let Predicates = [HasVLX] in<br>
+ defm NAME # "32x4Z256" : vextract_for_size_all<Opcode128,<br>
+ X86VectorVTInfo< 8, EltVT32, VR256X>,<br>
+ X86VectorVTInfo< 4, EltVT32, VR128X>,<br>
+ X86VectorVTInfo< 4, EltVT64, VR256X>,<br>
+ X86VectorVTInfo< 2, EltVT64, VR128X>,<br>
+ vextract128_extract,<br>
+ EXTRACT_get_vextract128_imm>,<br>
+ EVEX_V256, EVEX_CD8<32, CD8VT4>;<br>
+ let Predicates = [HasVLX, HasDQI] in<br>
+ defm NAME # "64x2Z256" : vextract_for_size<Opcode128,<br>
+ X86VectorVTInfo< 4, EltVT64, VR256X>,<br>
+ X86VectorVTInfo< 2, EltVT64, VR128X>,<br>
+ vextract128_extract>,<br>
+ VEX_W, EVEX_V256, EVEX_CD8<64, CD8VT2>;<br>
+ let Predicates = [HasDQI] in {<br>
+ defm NAME # "64x2Z" : vextract_for_size<Opcode128,<br>
+ X86VectorVTInfo< 8, EltVT64, VR512>,<br>
+ X86VectorVTInfo< 2, EltVT64, VR128X>,<br>
+ vextract128_extract>,<br>
+ VEX_W, EVEX_V512, EVEX_CD8<64, CD8VT2>;<br>
+ defm NAME # "32x8Z" : vextract_for_size<Opcode256,<br>
+ X86VectorVTInfo<16, EltVT32, VR512>,<br>
+ X86VectorVTInfo< 8, EltVT32, VR256X>,<br>
+ vextract256_extract>,<br>
+ EVEX_V512, EVEX_CD8<32, CD8VT8>;<br>
+ }<br>
}<br>
<br>
defm VEXTRACTF : vextract_for_type<f32, 0x19, f64, 0x1b>;<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512-cvt.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-cvt.ll?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-cvt.ll?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512-cvt.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512-cvt.ll Wed Sep 9 09:35:09 2015<br>
@@ -52,14 +52,14 @@ define <4 x i64> @f32tosl(<4 x float> %a<br>
}<br>
<br>
; CHECK-LABEL: sltof432<br>
-; CHECK: vcvtqq2ps<br>
+; CHECK: vcvtqq2ps<br>
define <4 x float> @sltof432(<4 x i64> %a) {<br>
%b = sitofp <4 x i64> %a to <4 x float><br>
ret <4 x float> %b<br>
}<br>
<br>
; CHECK-LABEL: ultof432<br>
-; CHECK: vcvtuqq2ps<br>
+; CHECK: vcvtuqq2ps<br>
define <4 x float> @ultof432(<4 x i64> %a) {<br>
%b = uitofp <4 x i64> %a to <4 x float><br>
ret <4 x float> %b<br>
@@ -279,12 +279,14 @@ define i32 @float_to_int(float %x) {<br>
ret i32 %res<br>
}<br>
<br>
-; CHECK-LABEL: uitof64<br>
-; CHECK: vcvtudq2pd<br>
-; CHECK: vextracti64x4<br>
-; CHECK: vcvtudq2pd<br>
-; CHECK: ret<br>
define <16 x double> @uitof64(<16 x i32> %a) nounwind {<br>
+; CHECK-LABEL: uitof64:<br>
+; CHECK: ## BB#0:<br>
+; CHECK-NEXT: vcvtudq2pd %ymm0, %zmm2<br>
+; CHECK-NEXT: vextracti32x8 $1, %zmm0, %ymm0<br>
+; CHECK-NEXT: vcvtudq2pd %ymm0, %zmm1<br>
+; CHECK-NEXT: vmovaps %zmm2, %zmm0<br>
+; CHECK-NEXT: retq<br>
%b = uitofp <16 x i32> %a to <16 x double><br>
ret <16 x double> %b<br>
}<br>
@@ -407,7 +409,7 @@ define <8 x double> @sitofp_8i1_double(<<br>
}<br>
<br>
; CHECK-LABEL: @uitofp_16i8<br>
-; CHECK: vpmovzxbd<br>
+; CHECK: vpmovzxbd<br>
; CHECK: vcvtudq2ps<br>
define <16 x float> @uitofp_16i8(<16 x i8>%a) {<br>
%b = uitofp <16 x i8> %a to <16 x float><br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll Wed Sep 9 09:35:09 2015<br>
@@ -12,14 +12,24 @@ define <16 x float> @test1(<16 x float><br>
ret <16 x float> %rrr3<br>
}<br>
<br>
-;CHECK-LABEL: test2:<br>
-;KNL: vinsertf32x4 $0<br>
-;SKX: vinsertf64x2 $0<br>
-;CHECK: vextractf32x4 $3<br>
-;KNL: vinsertf32x4 $3<br>
-;SKX: vinsertf64x2 $3<br>
-;CHECK: ret<br>
define <8 x double> @test2(<8 x double> %x, double* %br, double %y) nounwind {<br>
+; KNL-LABEL: test2:<br>
+; KNL: ## BB#0:<br>
+; KNL-NEXT: vmovhpd (%rdi), %xmm0, %xmm2<br>
+; KNL-NEXT: vinsertf32x4 $0, %xmm2, %zmm0, %zmm0<br>
+; KNL-NEXT: vextractf32x4 $3, %zmm0, %xmm2<br>
+; KNL-NEXT: vmovsd %xmm1, %xmm2, %xmm1<br>
+; KNL-NEXT: vinsertf32x4 $3, %xmm1, %zmm0, %zmm0<br>
+; KNL-NEXT: retq<br>
+;<br>
+; SKX-LABEL: test2:<br>
+; SKX: ## BB#0:<br>
+; SKX-NEXT: vmovhpd (%rdi), %xmm0, %xmm2<br>
+; SKX-NEXT: vinsertf64x2 $0, %xmm2, %zmm0, %zmm0<br>
+; SKX-NEXT: vextractf64x2 $3, %zmm0, %xmm2<br>
+; SKX-NEXT: vmovsd %xmm1, %xmm2, %xmm1<br>
+; SKX-NEXT: vinsertf64x2 $3, %xmm1, %zmm0, %zmm0<br>
+; SKX-NEXT: retq<br>
%rrr = load double, double* %br<br>
%rrr2 = insertelement <8 x double> %x, double %rrr, i32 1<br>
%rrr3 = insertelement <8 x double> %rrr2, double %y, i32 6<br>
@@ -36,12 +46,22 @@ define <16 x float> @test3(<16 x float><br>
ret <16 x float> %rrr2<br>
}<br>
<br>
-;CHECK-LABEL: test4:<br>
-;CHECK: vextracti32x4 $2<br>
-;KNL: vinserti32x4 $0<br>
-;SKX: vinserti64x2 $0<br>
-;CHECK: ret<br>
define <8 x i64> @test4(<8 x i64> %x) nounwind {<br>
+; KNL-LABEL: test4:<br>
+; KNL: ## BB#0:<br>
+; KNL-NEXT: vextracti32x4 $2, %zmm0, %xmm1<br>
+; KNL-NEXT: vmovq %xmm1, %rax<br>
+; KNL-NEXT: vpinsrq $1, %rax, %xmm0, %xmm1<br>
+; KNL-NEXT: vinserti32x4 $0, %xmm1, %zmm0, %zmm0<br>
+; KNL-NEXT: retq<br>
+;<br>
+; SKX-LABEL: test4:<br>
+; SKX: ## BB#0:<br>
+; SKX-NEXT: vextracti64x2 $2, %zmm0, %xmm1<br>
+; SKX-NEXT: vmovq %xmm1, %rax<br>
+; SKX-NEXT: vpinsrq $1, %rax, %xmm0, %xmm1<br>
+; SKX-NEXT: vinserti64x2 $0, %xmm1, %zmm0, %zmm0<br>
+; SKX-NEXT: retq<br>
%eee = extractelement <8 x i64> %x, i32 4<br>
%rrr2 = insertelement <8 x i64> %x, i64 %eee, i32 1<br>
ret <8 x i64> %rrr2<br>
@@ -142,7 +162,7 @@ define i64 @test12(<16 x i64>%a, <16 x i<br>
;CHECK: andl $1, %eax<br>
;CHECK: kmovw %eax, %k0<br>
;CHECK: movw $-4<br>
-;CHECK: korw<br>
+;CHECK: korw<br>
define i16 @test13(i32 %a, i32 %b) {<br>
%cmp_res = icmp ult i32 %a, %b<br>
%maskv = insertelement <16 x i1> <i1 true, i1 false, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i1 %cmp_res, i32 0<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll Wed Sep 9 09:35:09 2015<br>
@@ -911,38 +911,38 @@ declare i8 @llvm.x86.avx512.mask.ucmp.q.<br>
define <4 x float> @test_mask_vextractf32x4(<4 x float> %b, <16 x float> %a, i8 %mask) {<br>
; CHECK-LABEL: test_mask_vextractf32x4:<br>
; CHECK: vextractf32x4 $2, %zmm1, %xmm0 {%k1}<br>
- %res = call <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float> %a, i8 2, <4 x float> %b, i8 %mask)<br>
+ %res = call <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float> %a, i32 2, <4 x float> %b, i8 %mask)<br>
ret <4 x float> %res<br>
}<br>
<br>
-declare <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float>, i8, <4 x float>, i8)<br>
+declare <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float>, i32, <4 x float>, i8)<br>
<br>
define <4 x i64> @test_mask_vextracti64x4(<4 x i64> %b, <8 x i64> %a, i8 %mask) {<br>
; CHECK-LABEL: test_mask_vextracti64x4:<br>
; CHECK: vextracti64x4 $2, %zmm1, %ymm0 {%k1}<br>
- %res = call <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64> %a, i8 2, <4 x i64> %b, i8 %mask)<br>
+ %res = call <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64> %a, i32 2, <4 x i64> %b, i8 %mask)<br>
ret <4 x i64> %res<br>
}<br>
<br>
-declare <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64>, i8, <4 x i64>, i8)<br>
+declare <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64>, i32, <4 x i64>, i8)<br>
<br>
define <4 x i32> @test_maskz_vextracti32x4(<16 x i32> %a, i8 %mask) {<br>
; CHECK-LABEL: test_maskz_vextracti32x4:<br>
; CHECK: vextracti32x4 $2, %zmm0, %xmm0 {%k1} {z}<br>
- %res = call <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32> %a, i8 2, <4 x i32> zeroinitializer, i8 %mask)<br>
+ %res = call <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32> %a, i32 2, <4 x i32> zeroinitializer, i8 %mask)<br>
ret <4 x i32> %res<br>
}<br>
<br>
-declare <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32>, i8, <4 x i32>, i8)<br>
+declare <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32>, i32, <4 x i32>, i8)<br>
<br>
define <4 x double> @test_vextractf64x4(<8 x double> %a) {<br>
; CHECK-LABEL: test_vextractf64x4:<br>
; CHECK: vextractf64x4 $2, %zmm0, %ymm0 ##<br>
- %res = call <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double> %a, i8 2, <4 x double> zeroinitializer, i8 -1)<br>
+ %res = call <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double> %a, i32 2, <4 x double> zeroinitializer, i8 -1)<br>
ret <4 x double> %res<br>
}<br>
<br>
-declare <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double>, i8, <4 x double>, i8)<br>
+declare <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double>, i32, <4 x double>, i8)<br>
<br>
define <16 x i32> @test_x86_avx512_pslli_d(<16 x i32> %a0) {<br>
; CHECK-LABEL: test_x86_avx512_pslli_d<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics.ll?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics.ll?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics.ll Wed Sep 9 09:35:09 2015<br>
@@ -315,3 +315,44 @@ define <2 x double>@test_int_x86_avx512_<br>
%res2 = fadd <2 x double> %res, %res1<br>
ret <2 x double> %res2<br>
}<br>
+<br>
+<br>
+declare <2 x double> @llvm.x86.avx512.mask.vextractf64x2.512(<8 x double>, i32, <2 x double>, i8)<br>
+<br>
+define <2 x double>@test_int_x86_avx512_mask_vextractf64x2_512(<8 x double> %x0, <2 x double> %x2, i8 %x3) {<br>
+; CHECK-LABEL: test_int_x86_avx512_mask_vextractf64x2_512:<br>
+; CHECK: ## BB#0:<br>
+; CHECK-NEXT: kmovw %edi, %k1<br>
+; CHECK-NEXT: vextractf64x2 $1, %zmm0, %xmm1 {%k1}<br>
+; CHECK-NEXT: vextractf64x2 $1, %zmm0, %xmm2 {%k1} {z}<br>
+; CHECK-NEXT: vextractf64x2 $1, %zmm0, %xmm0<br>
+; CHECK-NEXT: vaddpd %xmm0, %xmm1, %xmm0<br>
+; CHECK-NEXT: vaddpd %xmm0, %xmm2, %xmm0<br>
+; CHECK-NEXT: retq<br>
+ %res = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.512(<8 x double> %x0,i32 1, <2 x double> %x2, i8 %x3)<br>
+ %res2 = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.512(<8 x double> %x0,i32 1, <2 x double> zeroinitializer, i8 %x3)<br>
+ %res1 = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.512(<8 x double> %x0,i32 1, <2 x double> zeroinitializer, i8 -1)<br>
+ %res3 = fadd <2 x double> %res, %res1<br>
+ %res4 = fadd <2 x double> %res2, %res3<br>
+ ret <2 x double> %res4<br>
+}<br>
+<br>
+declare <8 x float> @llvm.x86.avx512.mask.vextractf32x8.512(<16 x float>, i32, <8 x float>, i8)<br>
+<br>
+define <8 x float>@test_int_x86_avx512_mask_vextractf32x8(<16 x float> %x0, <8 x float> %x2, i8 %x3) {<br>
+; CHECK-LABEL: test_int_x86_avx512_mask_vextractf32x8:<br>
+; CHECK: ## BB#0:<br>
+; CHECK-NEXT: kmovw %edi, %k1<br>
+; CHECK-NEXT: vextractf32x8 $1, %zmm0, %ymm1 {%k1}<br>
+; CHECK-NEXT: vextractf32x8 $1, %zmm0, %ymm2 {%k1} {z}<br>
+; CHECK-NEXT: vextractf32x8 $1, %zmm0, %ymm0<br>
+; CHECK-NEXT: vaddps %ymm0, %ymm1, %ymm0<br>
+; CHECK-NEXT: vaddps %ymm0, %ymm2, %ymm0<br>
+; CHECK-NEXT: retq<br>
+ %res = call <8 x float> @llvm.x86.avx512.mask.vextractf32x8.512(<16 x float> %x0,i32 1, <8 x float> %x2, i8 %x3)<br>
+ %res2 = call <8 x float> @llvm.x86.avx512.mask.vextractf32x8.512(<16 x float> %x0,i32 1, <8 x float> zeroinitializer, i8 %x3)<br>
+ %res1 = call <8 x float> @llvm.x86.avx512.mask.vextractf32x8.512(<16 x float> %x0,i32 1, <8 x float> zeroinitializer, i8 -1)<br>
+ %res3 = fadd <8 x float> %res, %res1<br>
+ %res4 = fadd <8 x float> %res2, %res3<br>
+ ret <8 x float> %res4<br>
+}<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512dqvl-intrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512dqvl-intrinsics.ll?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512dqvl-intrinsics.ll?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512dqvl-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512dqvl-intrinsics.ll Wed Sep 9 09:35:09 2015<br>
@@ -1648,3 +1648,23 @@ define <8 x float>@test_int_x86_avx512_m<br>
%res2 = fadd <8 x float> %res, %res1<br>
ret <8 x float> %res2<br>
}<br>
+<br>
+declare <2 x double> @llvm.x86.avx512.mask.vextractf64x2.256(<4 x double>, i32, <2 x double>, i8)<br>
+<br>
+define <2 x double>@test_int_x86_avx512_mask_vextractf64x2_256(<4 x double> %x0, <2 x double> %x2, i8 %x3) {<br>
+; CHECK-LABEL: test_int_x86_avx512_mask_vextractf64x2_256:<br>
+; CHECK: ## BB#0:<br>
+; CHECK-NEXT: kmovw %edi, %k1<br>
+; CHECK-NEXT: vextractf64x2 $1, %ymm0, %xmm1 {%k1}<br>
+; CHECK-NEXT: vextractf64x2 $1, %ymm0, %xmm2 {%k1} {z}<br>
+; CHECK-NEXT: vextractf64x2 $1, %ymm0, %xmm0<br>
+; CHECK-NEXT: vaddpd %xmm0, %xmm1, %xmm0<br>
+; CHECK-NEXT: vaddpd %xmm2, %xmm0, %xmm0<br>
+; CHECK-NEXT: retq<br>
+ %res = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.256(<4 x double> %x0,i32 1, <2 x double> %x2, i8 %x3)<br>
+ %res2 = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.256(<4 x double> %x0,i32 1, <2 x double> zeroinitializer, i8 %x3)<br>
+ %res1 = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.256(<4 x double> %x0,i32 1, <2 x double> zeroinitializer, i8 -1)<br>
+ %res3 = fadd <2 x double> %res, %res1<br>
+ %res4 = fadd <2 x double> %res3, %res2<br>
+ ret <2 x double> %res4<br>
+}<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll Wed Sep 9 09:35:09 2015<br>
@@ -4508,6 +4508,26 @@ define <8 x float>@test_int_x86_avx512_m<br>
ret <8 x float> %res2<br>
}<br>
<br>
+declare <4 x float> @llvm.x86.avx512.mask.vextractf32x4.256(<8 x float>, i32, <4 x float>, i8)<br>
+<br>
+define <4 x float>@test_int_x86_avx512_mask_vextractf32x4_256(<8 x float> %x0, <4 x float> %x2, i8 %x3) {<br>
+; CHECK-LABEL: test_int_x86_avx512_mask_vextractf32x4_256:<br>
+; CHECK: ## BB#0:<br>
+; CHECK-NEXT: kmovw %edi, %k1<br>
+; CHECK-NEXT: vextractf32x4 $1, %ymm0, %xmm1 {%k1}<br>
+; CHECK-NEXT: vextractf32x4 $1, %ymm0, %xmm2 {%k1} {z}<br>
+; CHECK-NEXT: vextractf32x4 $1, %ymm0, %xmm0<br>
+; CHECK-NEXT: vaddps %xmm2, %xmm1, %xmm1<br>
+; CHECK-NEXT: vaddps %xmm1, %xmm0, %xmm0<br>
+; CHECK-NEXT: retq<br>
+ %res = call <4 x float> @llvm.x86.avx512.mask.vextractf32x4.256(<8 x float> %x0, i32 1, <4 x float> %x2, i8 %x3)<br>
+ %res1 = call <4 x float> @llvm.x86.avx512.mask.vextractf32x4.256(<8 x float> %x0, i32 1, <4 x float> zeroinitializer, i8 %x3)<br>
+ %res2 = call <4 x float> @llvm.x86.avx512.mask.vextractf32x4.256(<8 x float> %x0, i32 1, <4 x float> zeroinitializer, i8 -1)<br>
+ %res3 = fadd <4 x float> %res, %res1<br>
+ %res4 = fadd <4 x float> %res2, %res3<br>
+ ret <4 x float> %res4<br>
+}<br>
+<br>
declare <2 x double> @llvm.x86.avx512.mask.getmant.pd.128(<2 x double>, i32, <2 x double>, i8)<br>
<br>
define <2 x double>@test_int_x86_avx512_mask_getmant_pd_128(<2 x double> %x0, <2 x double> %x2, i8 %x3) {<br>
<br>
Modified: llvm/trunk/test/MC/X86/avx512-encodings.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/avx512-encodings.s?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/avx512-encodings.s?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/X86/avx512-encodings.s (original)<br>
+++ llvm/trunk/test/MC/X86/avx512-encodings.s Wed Sep 9 09:35:09 2015<br>
@@ -14958,6 +14958,198 @@ vpermilpd $0x23, 0x400(%rbx), %zmm2<br>
// CHECK: encoding: [0x62,0xf2,0xc5,0x08,0x43,0x92,0xf8,0xfb,0xff,0xff]<br>
vgetexpsd -1032(%rdx), %xmm7, %xmm2<br>
<br>
+// CHECK: vextractf32x4 $171, %zmm21, %xmm15<br>
+// CHECK: encoding: [0x62,0xc3,0x7d,0x48,0x19,0xef,0xab]<br>
+ vextractf32x4 $0xab, %zmm21, %xmm15<br>
+<br>
+// CHECK: vextractf32x4 $171, %zmm21, %xmm15 {%k1}<br>
+// CHECK: encoding: [0x62,0xc3,0x7d,0x49,0x19,0xef,0xab]<br>
+ vextractf32x4 $0xab, %zmm21, %xmm15 {%k1}<br>
+<br>
+// CHECK: vextractf32x4 $171, %zmm21, %xmm15 {%k1} {z}<br>
+// CHECK: encoding: [0x62,0xc3,0x7d,0xc9,0x19,0xef,0xab]<br>
+ vextractf32x4 $0xab, %zmm21, %xmm15 {%k1} {z}<br>
+<br>
+// CHECK: vextractf32x4 $123, %zmm21, %xmm15<br>
+// CHECK: encoding: [0x62,0xc3,0x7d,0x48,0x19,0xef,0x7b]<br>
+ vextractf32x4 $0x7b, %zmm21, %xmm15<br>
+<br>
+// CHECK: vextractf32x4 $171, %zmm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x19,0x21,0xab]<br>
+ vextractf32x4 $0xab, %zmm20, (%rcx)<br>
+<br>
+// CHECK: vextractf32x4 $171, %zmm20, (%rcx) {%k7}<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x4f,0x19,0x21,0xab]<br>
+ vextractf32x4 $0xab, %zmm20, (%rcx) {%k7}<br>
+<br>
+// CHECK: vextractf32x4 $123, %zmm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x19,0x21,0x7b]<br>
+ vextractf32x4 $0x7b, %zmm20, (%rcx)<br>
+<br>
+// CHECK: vextractf32x4 $123, %zmm20, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x48,0x19,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextractf32x4 $0x7b, %zmm20, 291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf32x4 $123, %zmm20, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x19,0x62,0x7f,0x7b]<br>
+ vextractf32x4 $0x7b, %zmm20, 2032(%rdx)<br>
+<br>
+// CHECK: vextractf32x4 $123, %zmm20, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x19,0xa2,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextractf32x4 $0x7b, %zmm20, 2048(%rdx)<br>
+<br>
+// CHECK: vextractf32x4 $123, %zmm20, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x19,0x62,0x80,0x7b]<br>
+ vextractf32x4 $0x7b, %zmm20, -2048(%rdx)<br>
+<br>
+// CHECK: vextractf32x4 $123, %zmm20, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x19,0xa2,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextractf32x4 $0x7b, %zmm20, -2064(%rdx)<br>
+<br>
+// CHECK: vextractf64x4 $171, %zmm24, %ymm11<br>
+// CHECK: encoding: [0x62,0x43,0xfd,0x48,0x1b,0xc3,0xab]<br>
+ vextractf64x4 $0xab, %zmm24, %ymm11<br>
+<br>
+// CHECK: vextractf64x4 $171, %zmm24, %ymm11 {%k5}<br>
+// CHECK: encoding: [0x62,0x43,0xfd,0x4d,0x1b,0xc3,0xab]<br>
+ vextractf64x4 $0xab, %zmm24, %ymm11 {%k5}<br>
+<br>
+// CHECK: vextractf64x4 $171, %zmm24, %ymm11 {%k5} {z}<br>
+// CHECK: encoding: [0x62,0x43,0xfd,0xcd,0x1b,0xc3,0xab]<br>
+ vextractf64x4 $0xab, %zmm24, %ymm11 {%k5} {z}<br>
+<br>
+// CHECK: vextractf64x4 $123, %zmm24, %ymm11<br>
+// CHECK: encoding: [0x62,0x43,0xfd,0x48,0x1b,0xc3,0x7b]<br>
+ vextractf64x4 $0x7b, %zmm24, %ymm11<br>
+<br>
+// CHECK: vextractf64x4 $171, %zmm5, (%rcx)<br>
+// CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x1b,0x29,0xab]<br>
+ vextractf64x4 $0xab, %zmm5, (%rcx)<br>
+<br>
+// CHECK: vextractf64x4 $171, %zmm5, (%rcx) {%k4}<br>
+// CHECK: encoding: [0x62,0xf3,0xfd,0x4c,0x1b,0x29,0xab]<br>
+ vextractf64x4 $0xab, %zmm5, (%rcx) {%k4}<br>
+<br>
+// CHECK: vextractf64x4 $123, %zmm5, (%rcx)<br>
+// CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x1b,0x29,0x7b]<br>
+ vextractf64x4 $0x7b, %zmm5, (%rcx)<br>
+<br>
+// CHECK: vextractf64x4 $123, %zmm5, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xb3,0xfd,0x48,0x1b,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextractf64x4 $0x7b, %zmm5, 291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf64x4 $123, %zmm5, 4064(%rdx)<br>
+// CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x1b,0x6a,0x7f,0x7b]<br>
+ vextractf64x4 $0x7b, %zmm5, 4064(%rdx)<br>
+<br>
+// CHECK: vextractf64x4 $123, %zmm5, 4096(%rdx)<br>
+// CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x1b,0xaa,0x00,0x10,0x00,0x00,0x7b]<br>
+ vextractf64x4 $0x7b, %zmm5, 4096(%rdx)<br>
+<br>
+// CHECK: vextractf64x4 $123, %zmm5, -4096(%rdx)<br>
+// CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x1b,0x6a,0x80,0x7b]<br>
+ vextractf64x4 $0x7b, %zmm5, -4096(%rdx)<br>
+<br>
+// CHECK: vextractf64x4 $123, %zmm5, -4128(%rdx)<br>
+// CHECK: encoding: [0x62,0xf3,0xfd,0x48,0x1b,0xaa,0xe0,0xef,0xff,0xff,0x7b]<br>
+ vextractf64x4 $0x7b, %zmm5, -4128(%rdx)<br>
+<br>
+// CHECK: vextracti32x4 $171, %zmm16, %xmm13<br>
+// CHECK: encoding: [0x62,0xc3,0x7d,0x48,0x39,0xc5,0xab]<br>
+ vextracti32x4 $0xab, %zmm16, %xmm13<br>
+<br>
+// CHECK: vextracti32x4 $171, %zmm16, %xmm13 {%k5}<br>
+// CHECK: encoding: [0x62,0xc3,0x7d,0x4d,0x39,0xc5,0xab]<br>
+ vextracti32x4 $0xab, %zmm16, %xmm13 {%k5}<br>
+<br>
+// CHECK: vextracti32x4 $171, %zmm16, %xmm13 {%k5} {z}<br>
+// CHECK: encoding: [0x62,0xc3,0x7d,0xcd,0x39,0xc5,0xab]<br>
+ vextracti32x4 $0xab, %zmm16, %xmm13 {%k5} {z}<br>
+<br>
+// CHECK: vextracti32x4 $123, %zmm16, %xmm13<br>
+// CHECK: encoding: [0x62,0xc3,0x7d,0x48,0x39,0xc5,0x7b]<br>
+ vextracti32x4 $0x7b, %zmm16, %xmm13<br>
+<br>
+// CHECK: vextracti32x4 $171, %zmm29, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x39,0x29,0xab]<br>
+ vextracti32x4 $0xab, %zmm29, (%rcx)<br>
+<br>
+// CHECK: vextracti32x4 $171, %zmm29, (%rcx) {%k2}<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x4a,0x39,0x29,0xab]<br>
+ vextracti32x4 $0xab, %zmm29, (%rcx) {%k2}<br>
+<br>
+// CHECK: vextracti32x4 $123, %zmm29, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x39,0x29,0x7b]<br>
+ vextracti32x4 $0x7b, %zmm29, (%rcx)<br>
+<br>
+// CHECK: vextracti32x4 $123, %zmm29, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0x23,0x7d,0x48,0x39,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextracti32x4 $0x7b, %zmm29, 291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti32x4 $123, %zmm29, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x39,0x6a,0x7f,0x7b]<br>
+ vextracti32x4 $0x7b, %zmm29, 2032(%rdx)<br>
+<br>
+// CHECK: vextracti32x4 $123, %zmm29, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x39,0xaa,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextracti32x4 $0x7b, %zmm29, 2048(%rdx)<br>
+<br>
+// CHECK: vextracti32x4 $123, %zmm29, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x39,0x6a,0x80,0x7b]<br>
+ vextracti32x4 $0x7b, %zmm29, -2048(%rdx)<br>
+<br>
+// CHECK: vextracti32x4 $123, %zmm29, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x39,0xaa,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextracti32x4 $0x7b, %zmm29, -2064(%rdx)<br>
+<br>
+// CHECK: vextracti64x4 $171, %zmm16, %ymm13<br>
+// CHECK: encoding: [0x62,0xc3,0xfd,0x48,0x3b,0xc5,0xab]<br>
+ vextracti64x4 $0xab, %zmm16, %ymm13<br>
+<br>
+// CHECK: vextracti64x4 $171, %zmm16, %ymm13 {%k3}<br>
+// CHECK: encoding: [0x62,0xc3,0xfd,0x4b,0x3b,0xc5,0xab]<br>
+ vextracti64x4 $0xab, %zmm16, %ymm13 {%k3}<br>
+<br>
+// CHECK: vextracti64x4 $171, %zmm16, %ymm13 {%k3} {z}<br>
+// CHECK: encoding: [0x62,0xc3,0xfd,0xcb,0x3b,0xc5,0xab]<br>
+ vextracti64x4 $0xab, %zmm16, %ymm13 {%k3} {z}<br>
+<br>
+// CHECK: vextracti64x4 $123, %zmm16, %ymm13<br>
+// CHECK: encoding: [0x62,0xc3,0xfd,0x48,0x3b,0xc5,0x7b]<br>
+ vextracti64x4 $0x7b, %zmm16, %ymm13<br>
+<br>
+// CHECK: vextracti64x4 $171, %zmm30, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x3b,0x31,0xab]<br>
+ vextracti64x4 $0xab, %zmm30, (%rcx)<br>
+<br>
+// CHECK: vextracti64x4 $171, %zmm30, (%rcx) {%k4}<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x4c,0x3b,0x31,0xab]<br>
+ vextracti64x4 $0xab, %zmm30, (%rcx) {%k4}<br>
+<br>
+// CHECK: vextracti64x4 $123, %zmm30, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x3b,0x31,0x7b]<br>
+ vextracti64x4 $0x7b, %zmm30, (%rcx)<br>
+<br>
+// CHECK: vextracti64x4 $123, %zmm30, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0x23,0xfd,0x48,0x3b,0xb4,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextracti64x4 $0x7b, %zmm30, 291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti64x4 $123, %zmm30, 4064(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x3b,0x72,0x7f,0x7b]<br>
+ vextracti64x4 $0x7b, %zmm30, 4064(%rdx)<br>
+<br>
+// CHECK: vextracti64x4 $123, %zmm30, 4096(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x3b,0xb2,0x00,0x10,0x00,0x00,0x7b]<br>
+ vextracti64x4 $0x7b, %zmm30, 4096(%rdx)<br>
+<br>
+// CHECK: vextracti64x4 $123, %zmm30, -4096(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x3b,0x72,0x80,0x7b]<br>
+ vextracti64x4 $0x7b, %zmm30, -4096(%rdx)<br>
+<br>
+// CHECK: vextracti64x4 $123, %zmm30, -4128(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x3b,0xb2,0xe0,0xef,0xff,0xff,0x7b]<br>
+ vextracti64x4 $0x7b, %zmm30, -4128(%rdx)<br>
+<br>
// CHECK: kunpckbw %k6, %k5, %k5<br>
// CHECK: encoding: [0xc5,0xd5,0x4b,0xee]<br>
kunpckbw %k6, %k5, %k5<br>
<br>
Modified: llvm/trunk/test/MC/X86/x86-64-avx512dq.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512dq.s?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512dq.s?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/X86/x86-64-avx512dq.s (original)<br>
+++ llvm/trunk/test/MC/X86/x86-64-avx512dq.s Wed Sep 9 09:35:09 2015<br>
@@ -2371,6 +2371,390 @@<br>
// CHECK: encoding: [0x62,0xa1,0xff,0xca,0x7a,0xd5]<br>
vcvtuqq2ps %zmm21, %ymm18 {%k2} {z}<br>
<br>
+// CHECK: vextractf32x8 $171, %zmm18, %ymm21<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x48,0x1b,0xd5,0xab]<br>
+ vextractf32x8 $0xab, %zmm18, %ymm21<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm18, %ymm21 {%k1}<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x49,0x1b,0xd5,0xab]<br>
+ vextractf32x8 $0xab, %zmm18, %ymm21 {%k1}<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm18, %ymm21 {%k1} {z}<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0xc9,0x1b,0xd5,0xab]<br>
+ vextractf32x8 $0xab, %zmm18, %ymm21 {%k1} {z}<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm18, %ymm21<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x48,0x1b,0xd5,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm18, %ymm21<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm21, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0x29,0xab]<br>
+ vextractf32x8 $0xab, %zmm21,(%rcx)<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm21, (%rcx) {%k3}<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x4b,0x1b,0x29,0xab]<br>
+ vextractf32x8 $0xab, %zmm21,(%rcx) {%k3}<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm21, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0x29,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm21,(%rcx)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm21, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x48,0x1b,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm21,291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm21, 4064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0x6a,0x7f,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm21,4064(%rdx)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm21, 4096(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0xaa,0x00,0x10,0x00,0x00,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm21,4096(%rdx)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm21, -4096(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0x6a,0x80,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm21,-4096(%rdx)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm21, -4128(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0xaa,0xe0,0xef,0xff,0xff,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm21,-4128(%rdx)<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm26, %ymm30<br>
+// CHECK: encoding: [0x62,0x03,0x7d,0x48,0x1b,0xd6,0xab]<br>
+ vextractf32x8 $0xab, %zmm26, %ymm30<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm26, %ymm30 {%k3}<br>
+// CHECK: encoding: [0x62,0x03,0x7d,0x4b,0x1b,0xd6,0xab]<br>
+ vextractf32x8 $0xab, %zmm26, %ymm30 {%k3}<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm26, %ymm30 {%k3} {z}<br>
+// CHECK: encoding: [0x62,0x03,0x7d,0xcb,0x1b,0xd6,0xab]<br>
+ vextractf32x8 $0xab, %zmm26, %ymm30 {%k3} {z}<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm26, %ymm30<br>
+// CHECK: encoding: [0x62,0x03,0x7d,0x48,0x1b,0xd6,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm26, %ymm30<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0x21,0xab]<br>
+ vextractf32x8 $0xab, %zmm20,(%rcx)<br>
+<br>
+// CHECK: vextractf32x8 $171, %zmm20, (%rcx) {%k3}<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x4b,0x1b,0x21,0xab]<br>
+ vextractf32x8 $0xab, %zmm20,(%rcx) {%k3}<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0x21,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm20,(%rcx)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm20, 4660(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x48,0x1b,0xa4,0xf0,0x34,0x12,0x00,0x00,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm20,4660(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm20, 4064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0x62,0x7f,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm20,4064(%rdx)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm20, 4096(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0xa2,0x00,0x10,0x00,0x00,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm20,4096(%rdx)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm20, -4096(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0x62,0x80,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm20,-4096(%rdx)<br>
+<br>
+// CHECK: vextractf32x8 $123, %zmm20, -4128(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x1b,0xa2,0xe0,0xef,0xff,0xff,0x7b]<br>
+ vextractf32x8 $0x7b, %zmm20,-4128(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm26, %xmm28<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x48,0x19,0xd4,0xab]<br>
+ vextractf64x2 $0xab, %zmm26, %xmm28<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm26, %xmm28 {%k5}<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x4d,0x19,0xd4,0xab]<br>
+ vextractf64x2 $0xab, %zmm26, %xmm28 {%k5}<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm26, %xmm28 {%k5} {z}<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0xcd,0x19,0xd4,0xab]<br>
+ vextractf64x2 $0xab, %zmm26, %xmm28 {%k5} {z}<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm26, %xmm28<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x48,0x19,0xd4,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm26, %xmm28<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm28, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x19,0x21,0xab]<br>
+ vextractf64x2 $0xab, %zmm28,(%rcx)<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm28, (%rcx) {%k3}<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x4b,0x19,0x21,0xab]<br>
+ vextractf64x2 $0xab, %zmm28,(%rcx) {%k3}<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm28, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x19,0x21,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm28,(%rcx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm28, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0x23,0xfd,0x48,0x19,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm28,291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm28, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x19,0x62,0x7f,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm28,2032(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm28, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x19,0xa2,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm28,2048(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm28, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x19,0x62,0x80,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm28,-2048(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm28, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x19,0xa2,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm28,-2064(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm26, %xmm19<br>
+// CHECK: encoding: [0x62,0x23,0xfd,0x48,0x19,0xd3,0xab]<br>
+ vextractf64x2 $0xab, %zmm26, %xmm19<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm26, %xmm19 {%k3}<br>
+// CHECK: encoding: [0x62,0x23,0xfd,0x4b,0x19,0xd3,0xab]<br>
+ vextractf64x2 $0xab, %zmm26, %xmm19 {%k3}<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm26, %xmm19 {%k3} {z}<br>
+// CHECK: encoding: [0x62,0x23,0xfd,0xcb,0x19,0xd3,0xab]<br>
+ vextractf64x2 $0xab, %zmm26, %xmm19 {%k3} {z}<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm26, %xmm19<br>
+// CHECK: encoding: [0x62,0x23,0xfd,0x48,0x19,0xd3,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm26, %xmm19<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm17, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x19,0x09,0xab]<br>
+ vextractf64x2 $0xab, %zmm17,(%rcx)<br>
+<br>
+// CHECK: vextractf64x2 $171, %zmm17, (%rcx) {%k1}<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x49,0x19,0x09,0xab]<br>
+ vextractf64x2 $0xab, %zmm17,(%rcx) {%k1}<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm17, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x19,0x09,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm17,(%rcx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm17, 4660(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x48,0x19,0x8c,0xf0,0x34,0x12,0x00,0x00,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm17,4660(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm17, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x19,0x4a,0x7f,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm17,2032(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm17, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x19,0x8a,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm17,2048(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm17, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x19,0x4a,0x80,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm17,-2048(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %zmm17, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x19,0x8a,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextractf64x2 $0x7b, %zmm17,-2064(%rdx)<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm24, %ymm20<br>
+// CHECK: encoding: [0x62,0x23,0x7d,0x48,0x3b,0xc4,0xab]<br>
+ vextracti32x8 $0xab, %zmm24, %ymm20<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm24, %ymm20 {%k1}<br>
+// CHECK: encoding: [0x62,0x23,0x7d,0x49,0x3b,0xc4,0xab]<br>
+ vextracti32x8 $0xab, %zmm24, %ymm20 {%k1}<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm24, %ymm20 {%k1} {z}<br>
+// CHECK: encoding: [0x62,0x23,0x7d,0xc9,0x3b,0xc4,0xab]<br>
+ vextracti32x8 $0xab, %zmm24, %ymm20 {%k1} {z}<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm24, %ymm20<br>
+// CHECK: encoding: [0x62,0x23,0x7d,0x48,0x3b,0xc4,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm24, %ymm20<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x3b,0x21,0xab]<br>
+ vextracti32x8 $0xab, %zmm20,(%rcx)<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm20, (%rcx) {%k3}<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x4b,0x3b,0x21,0xab]<br>
+ vextracti32x8 $0xab, %zmm20,(%rcx) {%k3}<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x3b,0x21,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm20,(%rcx)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm20, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x48,0x3b,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm20,291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm20, 4064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x3b,0x62,0x7f,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm20,4064(%rdx)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm20, 4096(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x3b,0xa2,0x00,0x10,0x00,0x00,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm20,4096(%rdx)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm20, -4096(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x3b,0x62,0x80,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm20,-4096(%rdx)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm20, -4128(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x48,0x3b,0xa2,0xe0,0xef,0xff,0xff,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm20,-4128(%rdx)<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm29, %ymm27<br>
+// CHECK: encoding: [0x62,0x03,0x7d,0x48,0x3b,0xeb,0xab]<br>
+ vextracti32x8 $0xab, %zmm29, %ymm27<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm29, %ymm27 {%k2}<br>
+// CHECK: encoding: [0x62,0x03,0x7d,0x4a,0x3b,0xeb,0xab]<br>
+ vextracti32x8 $0xab, %zmm29, %ymm27 {%k2}<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm29, %ymm27 {%k2} {z}<br>
+// CHECK: encoding: [0x62,0x03,0x7d,0xca,0x3b,0xeb,0xab]<br>
+ vextracti32x8 $0xab, %zmm29, %ymm27 {%k2} {z}<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm29, %ymm27<br>
+// CHECK: encoding: [0x62,0x03,0x7d,0x48,0x3b,0xeb,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm29, %ymm27<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm26, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x3b,0x11,0xab]<br>
+ vextracti32x8 $0xab, %zmm26,(%rcx)<br>
+<br>
+// CHECK: vextracti32x8 $171, %zmm26, (%rcx) {%k2}<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x4a,0x3b,0x11,0xab]<br>
+ vextracti32x8 $0xab, %zmm26,(%rcx) {%k2}<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm26, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x3b,0x11,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm26,(%rcx)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm26, 4660(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0x23,0x7d,0x48,0x3b,0x94,0xf0,0x34,0x12,0x00,0x00,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm26,4660(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm26, 4064(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x3b,0x52,0x7f,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm26,4064(%rdx)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm26, 4096(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x3b,0x92,0x00,0x10,0x00,0x00,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm26,4096(%rdx)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm26, -4096(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x3b,0x52,0x80,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm26,-4096(%rdx)<br>
+<br>
+// CHECK: vextracti32x8 $123, %zmm26, -4128(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x48,0x3b,0x92,0xe0,0xef,0xff,0xff,0x7b]<br>
+ vextracti32x8 $0x7b, %zmm26,-4128(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm20, %xmm17<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x48,0x39,0xe1,0xab]<br>
+ vextracti64x2 $0xab, %zmm20, %xmm17<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm20, %xmm17 {%k2}<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x4a,0x39,0xe1,0xab]<br>
+ vextracti64x2 $0xab, %zmm20, %xmm17 {%k2}<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm20, %xmm17 {%k2} {z}<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0xca,0x39,0xe1,0xab]<br>
+ vextracti64x2 $0xab, %zmm20, %xmm17 {%k2} {z}<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm20, %xmm17<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x48,0x39,0xe1,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm20, %xmm17<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm17, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x39,0x09,0xab]<br>
+ vextracti64x2 $0xab, %zmm17,(%rcx)<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm17, (%rcx) {%k5}<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x4d,0x39,0x09,0xab]<br>
+ vextracti64x2 $0xab, %zmm17,(%rcx) {%k5}<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm17, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x39,0x09,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm17,(%rcx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm17, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x48,0x39,0x8c,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm17,291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm17, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x39,0x4a,0x7f,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm17,2032(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm17, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x39,0x8a,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm17,2048(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm17, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x39,0x4a,0x80,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm17,-2048(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm17, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x48,0x39,0x8a,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm17,-2064(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm23, %xmm27<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x48,0x39,0xfb,0xab]<br>
+ vextracti64x2 $0xab, %zmm23, %xmm27<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm23, %xmm27 {%k5}<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x4d,0x39,0xfb,0xab]<br>
+ vextracti64x2 $0xab, %zmm23, %xmm27 {%k5}<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm23, %xmm27 {%k5} {z}<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0xcd,0x39,0xfb,0xab]<br>
+ vextracti64x2 $0xab, %zmm23, %xmm27 {%k5} {z}<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm23, %xmm27<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x48,0x39,0xfb,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm23, %xmm27<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm24, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x39,0x01,0xab]<br>
+ vextracti64x2 $0xab, %zmm24,(%rcx)<br>
+<br>
+// CHECK: vextracti64x2 $171, %zmm24, (%rcx) {%k3}<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x4b,0x39,0x01,0xab]<br>
+ vextracti64x2 $0xab, %zmm24,(%rcx) {%k3}<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm24, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x39,0x01,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm24,(%rcx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm24, 4660(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0x23,0xfd,0x48,0x39,0x84,0xf0,0x34,0x12,0x00,0x00,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm24,4660(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm24, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x39,0x42,0x7f,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm24,2032(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm24, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x39,0x82,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm24,2048(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm24, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x39,0x42,0x80,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm24,-2048(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %zmm24, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0xfd,0x48,0x39,0x82,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextracti64x2 $0x7b, %zmm24,-2064(%rdx)<br>
+<br>
// CHECK: ktestb %k6, %k4<br>
// CHECK: encoding: [0xc5,0xf9,0x99,0xe6]<br>
ktestb %k6, %k4<br>
<br>
Modified: llvm/trunk/test/MC/X86/x86-64-avx512dq_vl.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512dq_vl.s?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512dq_vl.s?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/X86/x86-64-avx512dq_vl.s (original)<br>
+++ llvm/trunk/test/MC/X86/x86-64-avx512dq_vl.s Wed Sep 9 09:35:09 2015<br>
@@ -3584,3 +3584,195 @@<br>
// CHECK: encoding: [0x62,0x61,0xff,0x38,0x7a,0xa2,0xf8,0xfb,0xff,0xff]<br>
vcvtuqq2ps -1032(%rdx){1to4}, %xmm28<br>
<br>
+// CHECK: vextractf64x2 $171, %ymm21, %xmm27<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x28,0x19,0xeb,0xab]<br>
+ vextractf64x2 $0xab, %ymm21, %xmm27<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm21, %xmm27 {%k7}<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x2f,0x19,0xeb,0xab]<br>
+ vextractf64x2 $0xab, %ymm21, %xmm27 {%k7}<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm21, %xmm27 {%k7} {z}<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0xaf,0x19,0xeb,0xab]<br>
+ vextractf64x2 $0xab, %ymm21, %xmm27 {%k7} {z}<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm21, %xmm27<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x28,0x19,0xeb,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm21, %xmm27<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x21,0xab]<br>
+ vextractf64x2 $0xab, %ymm20,(%rcx)<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm20, (%rcx) {%k1}<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x29,0x19,0x21,0xab]<br>
+ vextractf64x2 $0xab, %ymm20,(%rcx) {%k1}<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x21,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm20,(%rcx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm20, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x28,0x19,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm20,291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm20, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x62,0x7f,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm20,2032(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm20, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0xa2,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm20,2048(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm20, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x62,0x80,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm20,-2048(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm20, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0xa2,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm20,-2064(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm26, %xmm28<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x28,0x19,0xd4,0xab]<br>
+ vextractf64x2 $0xab, %ymm26, %xmm28<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm26, %xmm28 {%k4}<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x2c,0x19,0xd4,0xab]<br>
+ vextractf64x2 $0xab, %ymm26, %xmm28 {%k4}<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm26, %xmm28 {%k4} {z}<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0xac,0x19,0xd4,0xab]<br>
+ vextractf64x2 $0xab, %ymm26, %xmm28 {%k4} {z}<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm26, %xmm28<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x28,0x19,0xd4,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm26, %xmm28<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm17, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x09,0xab]<br>
+ vextractf64x2 $0xab, %ymm17,(%rcx)<br>
+<br>
+// CHECK: vextractf64x2 $171, %ymm17, (%rcx) {%k2}<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x2a,0x19,0x09,0xab]<br>
+ vextractf64x2 $0xab, %ymm17,(%rcx) {%k2}<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm17, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x09,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm17,(%rcx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm17, 4660(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x28,0x19,0x8c,0xf0,0x34,0x12,0x00,0x00,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm17,4660(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm17, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x4a,0x7f,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm17,2032(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm17, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x8a,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm17,2048(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm17, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x4a,0x80,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm17,-2048(%rdx)<br>
+<br>
+// CHECK: vextractf64x2 $123, %ymm17, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x19,0x8a,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextractf64x2 $0x7b, %ymm17,-2064(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm24, %xmm29<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x28,0x39,0xc5,0xab]<br>
+ vextracti64x2 $0xab, %ymm24, %xmm29<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm24, %xmm29 {%k7}<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x2f,0x39,0xc5,0xab]<br>
+ vextracti64x2 $0xab, %ymm24, %xmm29 {%k7}<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm24, %xmm29 {%k7} {z}<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0xaf,0x39,0xc5,0xab]<br>
+ vextracti64x2 $0xab, %ymm24, %xmm29 {%k7} {z}<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm24, %xmm29<br>
+// CHECK: encoding: [0x62,0x03,0xfd,0x28,0x39,0xc5,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm24, %xmm29<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm17, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x09,0xab]<br>
+ vextracti64x2 $0xab, %ymm17,(%rcx)<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm17, (%rcx) {%k1}<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x29,0x39,0x09,0xab]<br>
+ vextracti64x2 $0xab, %ymm17,(%rcx) {%k1}<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm17, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x09,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm17,(%rcx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm17, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x28,0x39,0x8c,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm17,291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm17, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x4a,0x7f,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm17,2032(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm17, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x8a,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm17,2048(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm17, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x4a,0x80,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm17,-2048(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm17, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x8a,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm17,-2064(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm17, %xmm29<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x28,0x39,0xcd,0xab]<br>
+ vextracti64x2 $0xab, %ymm17, %xmm29<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm17, %xmm29 {%k5}<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x2d,0x39,0xcd,0xab]<br>
+ vextracti64x2 $0xab, %ymm17, %xmm29 {%k5}<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm17, %xmm29 {%k5} {z}<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0xad,0x39,0xcd,0xab]<br>
+ vextracti64x2 $0xab, %ymm17, %xmm29 {%k5} {z}<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm17, %xmm29<br>
+// CHECK: encoding: [0x62,0x83,0xfd,0x28,0x39,0xcd,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm17, %xmm29<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x21,0xab]<br>
+ vextracti64x2 $0xab, %ymm20,(%rcx)<br>
+<br>
+// CHECK: vextracti64x2 $171, %ymm20, (%rcx) {%k2}<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x2a,0x39,0x21,0xab]<br>
+ vextracti64x2 $0xab, %ymm20,(%rcx) {%k2}<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x21,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm20,(%rcx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm20, 4660(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0xfd,0x28,0x39,0xa4,0xf0,0x34,0x12,0x00,0x00,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm20,4660(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm20, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x62,0x7f,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm20,2032(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm20, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0xa2,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm20,2048(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm20, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0x62,0x80,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm20,-2048(%rdx)<br>
+<br>
+// CHECK: vextracti64x2 $123, %ymm20, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0xfd,0x28,0x39,0xa2,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextracti64x2 $0x7b, %ymm20,-2064(%rdx)<br>
+<br>
<br>
Modified: llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s?rev=247149&r1=247148&r2=247149&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s?rev=247149&r1=247148&r2=247149&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s (original)<br>
+++ llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s Wed Sep 9 09:35:09 2015<br>
@@ -19739,6 +19739,102 @@ vaddpd {rz-sae}, %zmm2, %zmm1, %zmm1<br>
// CHECK: encoding: [0x62,0xe1,0xe5,0x30,0x6d,0xa2,0xf8,0xfb,0xff,0xff]<br>
vpunpckhqdq -1032(%rdx){1to4}, %ymm19, %ymm20<br>
<br>
+// CHECK: vextractf32x4 $171, %ymm17, %xmm28<br>
+// CHECK: encoding: [0x62,0x83,0x7d,0x28,0x19,0xcc,0xab]<br>
+ vextractf32x4 $0xab, %ymm17, %xmm28<br>
+<br>
+// CHECK: vextractf32x4 $171, %ymm17, %xmm28 {%k6}<br>
+// CHECK: encoding: [0x62,0x83,0x7d,0x2e,0x19,0xcc,0xab]<br>
+ vextractf32x4 $0xab, %ymm17, %xmm28 {%k6}<br>
+<br>
+// CHECK: vextractf32x4 $171, %ymm17, %xmm28 {%k6} {z}<br>
+// CHECK: encoding: [0x62,0x83,0x7d,0xae,0x19,0xcc,0xab]<br>
+ vextractf32x4 $0xab, %ymm17, %xmm28 {%k6} {z}<br>
+<br>
+// CHECK: vextractf32x4 $123, %ymm17, %xmm28<br>
+// CHECK: encoding: [0x62,0x83,0x7d,0x28,0x19,0xcc,0x7b]<br>
+ vextractf32x4 $0x7b, %ymm17, %xmm28<br>
+<br>
+// CHECK: vextractf32x4 $171, %ymm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x28,0x19,0x21,0xab]<br>
+ vextractf32x4 $0xab, %ymm20, (%rcx)<br>
+<br>
+// CHECK: vextractf32x4 $171, %ymm20, (%rcx) {%k2}<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x2a,0x19,0x21,0xab]<br>
+ vextractf32x4 $0xab, %ymm20, (%rcx) {%k2}<br>
+<br>
+// CHECK: vextractf32x4 $123, %ymm20, (%rcx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x28,0x19,0x21,0x7b]<br>
+ vextractf32x4 $0x7b, %ymm20, (%rcx)<br>
+<br>
+// CHECK: vextractf32x4 $123, %ymm20, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x28,0x19,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextractf32x4 $0x7b, %ymm20, 291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextractf32x4 $123, %ymm20, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x28,0x19,0x62,0x7f,0x7b]<br>
+ vextractf32x4 $0x7b, %ymm20, 2032(%rdx)<br>
+<br>
+// CHECK: vextractf32x4 $123, %ymm20, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x28,0x19,0xa2,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextractf32x4 $0x7b, %ymm20, 2048(%rdx)<br>
+<br>
+// CHECK: vextractf32x4 $123, %ymm20, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x28,0x19,0x62,0x80,0x7b]<br>
+ vextractf32x4 $0x7b, %ymm20, -2048(%rdx)<br>
+<br>
+// CHECK: vextractf32x4 $123, %ymm20, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0xe3,0x7d,0x28,0x19,0xa2,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextractf32x4 $0x7b, %ymm20, -2064(%rdx)<br>
+<br>
+// CHECK: vextracti32x4 $171, %ymm21, %xmm20<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x28,0x39,0xec,0xab]<br>
+ vextracti32x4 $0xab, %ymm21, %xmm20<br>
+<br>
+// CHECK: vextracti32x4 $171, %ymm21, %xmm20 {%k4}<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x2c,0x39,0xec,0xab]<br>
+ vextracti32x4 $0xab, %ymm21, %xmm20 {%k4}<br>
+<br>
+// CHECK: vextracti32x4 $171, %ymm21, %xmm20 {%k4} {z}<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0xac,0x39,0xec,0xab]<br>
+ vextracti32x4 $0xab, %ymm21, %xmm20 {%k4} {z}<br>
+<br>
+// CHECK: vextracti32x4 $123, %ymm21, %xmm20<br>
+// CHECK: encoding: [0x62,0xa3,0x7d,0x28,0x39,0xec,0x7b]<br>
+ vextracti32x4 $0x7b, %ymm21, %xmm20<br>
+<br>
+// CHECK: vextracti32x4 $171, %ymm28, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x28,0x39,0x21,0xab]<br>
+ vextracti32x4 $0xab, %ymm28, (%rcx)<br>
+<br>
+// CHECK: vextracti32x4 $171, %ymm28, (%rcx) {%k6}<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x2e,0x39,0x21,0xab]<br>
+ vextracti32x4 $0xab, %ymm28, (%rcx) {%k6}<br>
+<br>
+// CHECK: vextracti32x4 $123, %ymm28, (%rcx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x28,0x39,0x21,0x7b]<br>
+ vextracti32x4 $0x7b, %ymm28, (%rcx)<br>
+<br>
+// CHECK: vextracti32x4 $123, %ymm28, 291(%rax,%r14,8)<br>
+// CHECK: encoding: [0x62,0x23,0x7d,0x28,0x39,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]<br>
+ vextracti32x4 $0x7b, %ymm28, 291(%rax,%r14,8)<br>
+<br>
+// CHECK: vextracti32x4 $123, %ymm28, 2032(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x28,0x39,0x62,0x7f,0x7b]<br>
+ vextracti32x4 $0x7b, %ymm28, 2032(%rdx)<br>
+<br>
+// CHECK: vextracti32x4 $123, %ymm28, 2048(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x28,0x39,0xa2,0x00,0x08,0x00,0x00,0x7b]<br>
+ vextracti32x4 $0x7b, %ymm28, 2048(%rdx)<br>
+<br>
+// CHECK: vextracti32x4 $123, %ymm28, -2048(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x28,0x39,0x62,0x80,0x7b]<br>
+ vextracti32x4 $0x7b, %ymm28, -2048(%rdx)<br>
+<br>
+// CHECK: vextracti32x4 $123, %ymm28, -2064(%rdx)<br>
+// CHECK: encoding: [0x62,0x63,0x7d,0x28,0x39,0xa2,0xf0,0xf7,0xff,0xff,0x7b]<br>
+ vextracti32x4 $0x7b, %ymm28, -2064(%rdx)<br>
+<br>
// CHECK: vgetmantps $171, %xmm23, %xmm29<br>
// CHECK: encoding: [0x62,0x23,0x7d,0x08,0x26,0xef,0xab]<br>
vgetmantps $0xab, %xmm23, %xmm29<br>
<br>
<br>
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</blockquote></div><br></div>