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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple style='tab-interval:36.0pt'><div class=WordSection1><p class=MsoNormal><font size=2 color="#1f497d" face=Calibri><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";mso-bidi-font-family:"Times New Roman";color:#1F497D'>I ran the test suite and didn’t see any regressions (+spec2k/2k6).<o:p></o:p></span></font></p><p class=MsoNormal><font size=2 color="#1f497d" face=Calibri><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";mso-bidi-font-family:"Times New Roman";color:#1F497D'><o:p> </o:p></span></font></p><p class=MsoNormal><font size=2 color="#1f497d" face=Calibri><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";mso-bidi-font-family:"Times New Roman";color:#1F497D'>I’ve checked the <span class=SpellE>codegen</span> for these instructions and it seems sensible.<o:p></o:p></span></font></p><p class=MsoNormal><font size=2 color="#1f497d" face=Calibri><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";mso-bidi-font-family:"Times New Roman";color:#1F497D'><o:p> </o:p></span></font></p><p class=MsoNormal><font size=2 color="#1f497d" face=Calibri><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";mso-bidi-font-family:"Times New Roman";color:#1F497D'>Thanks,<o:p></o:p></span></font></p><p class=MsoNormal><font size=2 color="#1f497d" face=Calibri><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";mso-bidi-font-family:"Times New Roman";color:#1F497D'>Silviu<o:p></o:p></span></font></p><p class=MsoNormal><font size=2 color="#1f497d" face=Calibri><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";mso-bidi-font-family:"Times New Roman";color:#1F497D'><o:p> </o:p></span></font></p><div style='border:none;border-left:solid blue 1.5pt;padding:0cm 0cm 0cm 4.0pt'><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0cm 0cm 0cm'><p class=MsoNormal><b><font size=2 face=Tahoma><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif";mso-fareast-font-family:"Times New Roman";font-weight:bold'>From:</span></font></b><font size=2 face=Tahoma><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif";mso-fareast-font-family:"Times New Roman"'> aschwaighofer@apple.com [mailto:aschwaighofer@apple.com] <br><b><span style='font-weight:bold'>Sent:</span></b> 09 September 2015 16:20<br><b><span style='font-weight:bold'>To:</span></b> James Molloy<br><b><span style='font-weight:bold'>Cc:</span></b> reviews+D12724+public+3c8187211c6a6761@reviews.llvm.org; Silviu Baranga; Nadav Rotem; Gerolf Hoflehner; llvm-commits@lists.llvm.org; kanheim@a-bix.com<br><b><span style='font-weight:bold'>Subject:</span></b> Re: [PATCH] D12724: [CostModel][AArch64] Remove amortization factor for some of the vector select instructions<o:p></o:p></span></font></p></div></div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt'><o:p> </o:p></span></font></p><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'>LGTM assuming we don't pessimize those instructions anymore.<o:p></o:p></span></font></p></div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'><o:p> </o:p></span></font></p></div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'>Did you run the test suite?<font color="#1f497d"><span style='color:#1F497D'><o:p></o:p></span></font></span></font></p></div><div><p class=MsoNormal style='margin-bottom:12.0pt'><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'><br>On Sep 9, 2015, at 4:48 AM, James Molloy <<a href="mailto:james@jamesmolloy.co.uk">james@jamesmolloy.co.uk</a>> wrote:<o:p></o:p></span></font></p></div><blockquote style='margin-top:5.0pt;margin-bottom:5.0pt'><div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'>Hi Silviu,<o:p></o:p></span></font></p><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'><o:p> </o:p></span></font></p></div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'>I agree that we're no longer pessimizing select patterns on ARM or AArch64 with oversize vectors (although I haven't checked i64's, so I'll take your advice there), so this LGTM.<o:p></o:p></span></font></p></div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'><o:p> </o:p></span></font></p></div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'>But please wait for any objections from Nadav/Arnold/Gerolf as it was Nadav and Arnold who added this change in the first place (copied from ARM).<o:p></o:p></span></font></p></div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'><o:p> </o:p></span></font></p></div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'>James<o:p></o:p></span></font></p></div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'><o:p> </o:p></span></font></p><div><div><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'>On Wed, 9 Sep 2015 at 12:44 <a href="mailto:silviu.baranga@arm.com">silviu.baranga@arm.com</a> via llvm-commits <<a href="mailto:llvm-commits@lists.llvm.org">llvm-commits@lists.llvm.org</a>> wrote:<o:p></o:p></span></font></p></div><blockquote style='border:none;border-left:solid #CCCCCC 1.0pt;mso-border-left-alt:solid #CCCCCC .75pt;padding:0cm 0cm 0cm 6.0pt;margin-left:4.8pt;margin-right:0cm'><p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:12.0pt;mso-fareast-font-family:"Times New Roman"'>sbaranga created this revision.<br>sbaranga added a subscriber: llvm-commits.<br>Herald added subscribers: rengolin, aemerson.<br><br>We are not scalarizing the wide selects in codegen for i16 and i32 and<br>therefore we can remove the amortization factor. We still have issues<br>with i64 vectors in codegen though.<br><br><a href="http://reviews.llvm.org/D12724" target="_blank">http://reviews.llvm.org/D12724</a><br><br>Files:<br> lib/Target/AArch64/AArch64TargetTransformInfo.cpp<br> test/Analysis/CostModel/AArch64/select.ll<br><br>Index: lib/Target/AArch64/AArch64TargetTransformInfo.cpp<br>===================================================================<br>--- lib/Target/AArch64/AArch64TargetTransformInfo.cpp<br>+++ lib/Target/AArch64/AArch64TargetTransformInfo.cpp<br>@@ -380,15 +380,16 @@<br> Type *CondTy) {<br><br> int ISD = TLI->InstructionOpcodeToISD(Opcode);<br>- // We don't lower vector selects well that are wider than the register width.<br>+ // We don't lower some vector selects well that are wider than the register<br>+ // width.<br> if (ValTy->isVectorTy() && ISD == ISD::SELECT) {<br> // We would need this many instructions to hide the scalarization happening.<br> const int AmortizationCost = 20;<br> static const TypeConversionCostTblEntry<MVT::SimpleValueType><br> VectorSelectTbl[] = {<br>- { ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 * AmortizationCost },<br>- { ISD::SELECT, MVT::v8i1, MVT::v8i32, 8 * AmortizationCost },<br>- { ISD::SELECT, MVT::v16i1, MVT::v16i32, 16 * AmortizationCost },<br>+ { ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 },<br>+ { ISD::SELECT, MVT::v8i1, MVT::v8i32, 8 },<br>+ { ISD::SELECT, MVT::v16i1, MVT::v16i32, 16 },<br> { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4 * AmortizationCost },<br> { ISD::SELECT, MVT::v8i1, MVT::v8i64, 8 * AmortizationCost },<br> { ISD::SELECT, MVT::v16i1, MVT::v16i64, 16 * AmortizationCost }<br>Index: test/Analysis/CostModel/AArch64/select.ll<br>===================================================================<br>--- test/Analysis/CostModel/AArch64/select.ll<br>+++ test/Analysis/CostModel/AArch64/select.ll<br>@@ -17,22 +17,22 @@<br> ; CHECK: cost of 1 {{.*}} select<br> %v6 = select i1 undef, double undef, double undef<br><br>- ; Vector values - check for vectors that have a high cost because they end up<br>- ; scalarized.<br>- ; CHECK: cost of 320 {{.*}} select<br>+ ; CHECK: cost of 16 {{.*}} select<br> %v13b = select <16 x i1> undef, <16 x i16> undef, <16 x i16> undef<br><br>- ; CHECK: cost of 160 {{.*}} select<br>+ ; CHECK: cost of 8 {{.*}} select<br> %v15b = select <8 x i1> undef, <8 x i32> undef, <8 x i32> undef<br>- ; CHECK: cost of 320 {{.*}} select<br>+ ; CHECK: cost of 16 {{.*}} select<br> %v15c = select <16 x i1> undef, <16 x i32> undef, <16 x i32> undef<br><br>+ ; Vector values - check for vectors of i64s that have a high cost because<br>+ ; they end up scalarized.<br> ; CHECK: cost of 80 {{.*}} select<br> %v16a = select <4 x i1> undef, <4 x i64> undef, <4 x i64> undef<br> ; CHECK: cost of 160 {{.*}} select<br> %v16b = select <8 x i1> undef, <8 x i64> undef, <8 x i64> undef<br> ; CHECK: cost of 320 {{.*}} select<br> %v16c = select <16 x i1> undef, <16 x i64> undef, <16 x i64> undef<br><br>- ret void<br>+ ret void<br> }<br><br><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a><br><a href="http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits" target="_blank">http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits</a><o:p></o:p></span></font></p></blockquote></div></div></div></blockquote></div></div></body></html>