<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Mon, Aug 10, 2015 at 3:36 PM, JF Bastien via llvm-commits <span dir="ltr"><<a href="mailto:llvm-commits@lists.llvm.org" target="_blank">llvm-commits@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: jfb<br>
Date: Mon Aug 10 17:36:48 2015<br>
New Revision: 244520<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=244520&view=rev" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=244520&view=rev</a><br>
Log:<br>
WebAssembly: print immediates<br>
<br>
Summary:<br>
For now output using C99's hexadecimal floating-point representation.<br>
<br>
This patch also cleans up how machine operands are printed: instead of special-casing per type of machine instruction, the code now handles operands generically.<br>
<br>
Reviewers: sunfish<br>
<br>
Subscribers: llvm-commits, jfb<br>
<br>
Differential Revision: <a href="http://reviews.llvm.org/D11914" rel="noreferrer" target="_blank">http://reviews.llvm.org/D11914</a><br>
<br>
Added:<br>
llvm/trunk/test/CodeGen/WebAssembly/immediates.ll<br>
Modified:<br>
llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp<br>
llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp<br>
llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td<br>
<br>
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp?rev=244520&r1=244519&r2=244520&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp?rev=244520&r1=244519&r2=244520&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp (original)<br>
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp Mon Aug 10 17:36:48 2015<br>
@@ -99,28 +99,36 @@ void WebAssemblyAsmPrinter::EmitInstruct<br>
OS << "(setlocal @" << TargetRegisterInfo::virtReg2Index(Reg) << ' ';<br>
}<br>
<br>
- OS << '(';<br>
-<br>
- bool PrintOperands = true;<br>
- switch (MI->getOpcode()) {<br>
- case WebAssembly::ARGUMENT_Int32:<br>
- case WebAssembly::ARGUMENT_Int64:<br>
- case WebAssembly::ARGUMENT_Float32:<br>
- case WebAssembly::ARGUMENT_Float64:<br>
- OS << Name(TII, MI) << ' ' << MI->getOperand(1).getImm();<br>
- PrintOperands = false;<br>
- break;<br>
- default:<br>
- OS << Name(TII, MI);<br>
- break;<br>
- }<br>
-<br>
- if (PrintOperands)<br>
- for (const MachineOperand &MO : MI->uses()) {<br>
- if (MO.isReg() && MO.isImplicit())<br>
+ OS << '(' << Name(TII, MI);<br>
+ for (const MachineOperand &MO : MI->uses())<br>
+ switch (MO.getType()) {<br>
+ default:<br>
+ llvm_unreachable("unexpected machine operand type");<br>
+ case MachineOperand::MO_Register: {<br>
+ if (MO.isImplicit())<br>
continue;<br>
unsigned Reg = MO.getReg();<br>
OS << " @" << TargetRegisterInfo::virtReg2Index(Reg);<br>
+ } break;<br>
+ case MachineOperand::MO_Immediate: {<br>
+ OS << ' ' << MO.getImm();<br>
+ } break;<br>
+ case MachineOperand::MO_FPImmediate: {<br>
+ static const size_t BufBytes = 128;<br>
+ char buf[BufBytes];<br>
+ APFloat FP = MO.getFPImm()->getValueAPF();<br>
+ const APFloat CanonicalNaN = APFloat::getQNaN(FP.getSemantics());<br>
+ if (FP.isNaN() && !FP.bitwiseIsEqual(CanonicalNaN))<br>
+ // WebAssembly only has NaNs that are positive, quiet, without payload.<br>
+ FP = CanonicalNaN;<br>
+ // Use C99's hexadecimal floating-point representation.<br>
+ auto Written =<br>
+ FP.convertToHexString(buf, /*hexDigits=*/0, /*upperCase=*/false,<br>
+ APFloat::rmNearestTiesToEven);<br>
+ assert(Written != 0);<br>
+ assert(Written < BufBytes);<br></blockquote><div><br></div><div>The variable 'written' is unused in a non-asserts build, breaking the non-asserts -Werror build. Please add a "(void)Written;" to fix this (I'd do it myself, but my dev machine is not immediately accessible)<br><br>- David</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ OS << ' ' << buf;<br>
+ } break;<br>
}<br>
OS << ')';<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp?rev=244520&r1=244519&r2=244520&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp?rev=244520&r1=244519&r2=244520&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp Mon Aug 10 17:36:48 2015<br>
@@ -108,7 +108,11 @@ WebAssemblyTargetLowering::WebAssemblyTa<br>
// Compute derived properties from the register classes.<br>
computeRegisterProperties(Subtarget->getRegisterInfo());<br>
<br>
- // FIXME: setOperationAction...<br>
+ // FIXME: many setOperationAction are missing...<br>
+<br>
+ // Don't expand the following types to constant pools.<br>
+ setOperationAction(ISD::ConstantFP, MVT::f32, Legal);<br>
+ setOperationAction(ISD::ConstantFP, MVT::f64, Legal);<br>
}<br>
<br>
MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,<br>
<br>
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td?rev=244520&r1=244519&r2=244520&view=diff" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td?rev=244520&r1=244519&r2=244520&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td (original)<br>
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td Mon Aug 10 17:36:48 2015<br>
@@ -64,6 +64,16 @@ defm : ARGUMENT<Int64>;<br>
defm : ARGUMENT<Float32>;<br>
defm : ARGUMENT<Float64>;<br>
<br>
+<br>
+def Immediate_I32 : I<(outs Int32:$res), (ins i32imm:$imm),<br>
+ [(set Int32:$res, imm:$imm)]>;<br>
+def Immediate_I64 : I<(outs Int64:$res), (ins i64imm:$imm),<br>
+ [(set Int64:$res, imm:$imm)]>;<br>
+def Immediate_F32 : I<(outs Float32:$res), (ins f32imm:$imm),<br>
+ [(set Float32:$res, fpimm:$imm)]>;<br>
+def Immediate_F64 : I<(outs Float64:$res), (ins f64imm:$imm),<br>
+ [(set Float64:$res, fpimm:$imm)]>;<br>
+<br>
//===----------------------------------------------------------------------===//<br>
// Additional sets of instructions.<br>
//===----------------------------------------------------------------------===//<br>
<br>
Added: llvm/trunk/test/CodeGen/WebAssembly/immediates.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/immediates.ll?rev=244520&view=auto" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/WebAssembly/immediates.ll?rev=244520&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/WebAssembly/immediates.ll (added)<br>
+++ llvm/trunk/test/CodeGen/WebAssembly/immediates.ll Mon Aug 10 17:36:48 2015<br>
@@ -0,0 +1,174 @@<br>
+; RUN: llc < %s -asm-verbose=false | FileCheck %s<br>
+<br>
+; Test that basic immediates assemble as expected.<br>
+<br>
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"<br>
+target triple = "wasm32-unknown-unknown"<br>
+<br>
+; CHECK-LABEL: zero_i32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 0))<br>
+; CHECK-NEXT: (return @0)<br>
+define i32 @zero_i32() {<br>
+ ret i32 0<br>
+}<br>
+<br>
+; CHECK-LABEL: one_i32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 1))<br>
+; CHECK-NEXT: (return @0)<br>
+define i32 @one_i32() {<br>
+ ret i32 1<br>
+}<br>
+<br>
+; CHECK-LABEL: max_i32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 2147483647))<br>
+; CHECK-NEXT: (return @0)<br>
+define i32 @max_i32() {<br>
+ ret i32 2147483647<br>
+}<br>
+<br>
+; CHECK-LABEL: min_i32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate -2147483648))<br>
+; CHECK-NEXT: (return @0)<br>
+define i32 @min_i32() {<br>
+ ret i32 -2147483648<br>
+}<br>
+<br>
+; CHECK-LABEL: zero_i64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 0))<br>
+; CHECK-NEXT: (return @0)<br>
+define i64 @zero_i64() {<br>
+ ret i64 0<br>
+}<br>
+<br>
+; CHECK-LABEL: one_i64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 1))<br>
+; CHECK-NEXT: (return @0)<br>
+define i64 @one_i64() {<br>
+ ret i64 1<br>
+}<br>
+<br>
+; CHECK-LABEL: max_i64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 9223372036854775807))<br>
+; CHECK-NEXT: (return @0)<br>
+define i64 @max_i64() {<br>
+ ret i64 9223372036854775807<br>
+}<br>
+<br>
+; CHECK-LABEL: min_i64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate -9223372036854775808))<br>
+; CHECK-NEXT: (return @0)<br>
+define i64 @min_i64() {<br>
+ ret i64 -9223372036854775808<br>
+}<br>
+<br>
+; CHECK-LABEL: negzero_f32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate -0x0p0))<br>
+; CHECK-NEXT: (return @0)<br>
+define float @negzero_f32() {<br>
+ ret float -0.0<br>
+}<br>
+<br>
+; CHECK-LABEL: zero_f32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 0x0p0))<br>
+; CHECK-NEXT: (return @0)<br>
+define float @zero_f32() {<br>
+ ret float 0.0<br>
+}<br>
+<br>
+; CHECK-LABEL: one_f32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 0x1p0))<br>
+; CHECK-NEXT: (return @0)<br>
+define float @one_f32() {<br>
+ ret float 1.0<br>
+}<br>
+<br>
+; CHECK-LABEL: two_f32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 0x1p1))<br>
+; CHECK-NEXT: (return @0)<br>
+define float @two_f32() {<br>
+ ret float 2.0<br>
+}<br>
+<br>
+; CHECK-LABEL: nan_f32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate nan))<br>
+; CHECK-NEXT: (return @0)<br>
+define float @nan_f32() {<br>
+ ret float 0x7FF8000000000000<br>
+}<br>
+<br>
+; CHECK-LABEL: negnan_f32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate nan))<br>
+; CHECK-NEXT: (return @0)<br>
+define float @negnan_f32() {<br>
+ ret float 0xFFF8000000000000<br>
+}<br>
+<br>
+; CHECK-LABEL: inf_f32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate infinity))<br>
+; CHECK-NEXT: (return @0)<br>
+define float @inf_f32() {<br>
+ ret float 0x7FF0000000000000<br>
+}<br>
+<br>
+; CHECK-LABEL: neginf_f32:<br>
+; CHECK-NEXT: (setlocal @0 (immediate -infinity))<br>
+; CHECK-NEXT: (return @0)<br>
+define float @neginf_f32() {<br>
+ ret float 0xFFF0000000000000<br>
+}<br>
+<br>
+; CHECK-LABEL: negzero_f64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate -0x0p0))<br>
+; CHECK-NEXT: (return @0)<br>
+define double @negzero_f64() {<br>
+ ret double -0.0<br>
+}<br>
+<br>
+; CHECK-LABEL: zero_f64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 0x0p0))<br>
+; CHECK-NEXT: (return @0)<br>
+define double @zero_f64() {<br>
+ ret double 0.0<br>
+}<br>
+<br>
+; CHECK-LABEL: one_f64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 0x1p0))<br>
+; CHECK-NEXT: (return @0)<br>
+define double @one_f64() {<br>
+ ret double 1.0<br>
+}<br>
+<br>
+; CHECK-LABEL: two_f64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate 0x1p1))<br>
+; CHECK-NEXT: (return @0)<br>
+define double @two_f64() {<br>
+ ret double 2.0<br>
+}<br>
+<br>
+; CHECK-LABEL: nan_f64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate nan))<br>
+; CHECK-NEXT: (return @0)<br>
+define double @nan_f64() {<br>
+ ret double 0x7FF8000000000000<br>
+}<br>
+<br>
+; CHECK-LABEL: negnan_f64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate nan))<br>
+; CHECK-NEXT: (return @0)<br>
+define double @negnan_f64() {<br>
+ ret double 0xFFF8000000000000<br>
+}<br>
+<br>
+; CHECK-LABEL: inf_f64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate infinity))<br>
+; CHECK-NEXT: (return @0)<br>
+define double @inf_f64() {<br>
+ ret double 0x7FF0000000000000<br>
+}<br>
+<br>
+; CHECK-LABEL: neginf_f64:<br>
+; CHECK-NEXT: (setlocal @0 (immediate -infinity))<br>
+; CHECK-NEXT: (return @0)<br>
+define double @neginf_f64() {<br>
+ ret double 0xFFF0000000000000<br>
+}<br>
<br>
<br>
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</blockquote></div><br></div></div>