<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Jul 10, 2015 at 11:29 AM, Fiona Glaser <span dir="ltr"><<a href="mailto:escha@apple.com" target="_blank">escha@apple.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: escha<br>
Date: Fri Jul 10 13:29:02 2015<br>
New Revision: 241927<br>
<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject-3Frev-3D241927-26view-3Drev&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=zuoz10zhz1T4yQn21NiIo3nmiO9w7js47B14jBSH8dI&s=igdro6WxWZ9QMi-hZ7vJGhd4bqOcSTOtL71d1KTSHb0&e=" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project?rev=241927&view=rev</a><br>
Log:<br>
ComputeKnownBits: be a bit smarter about ADDs<br>
<br>
If our two inputs have known top-zero bit counts M and N, we trivially<br>
know that the output cannot have any bits set in the top (min(M, N)-1)<br>
bits, since nothing could carry past that point.<br>
<br>
Modified:<br>
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp<br>
llvm/trunk/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll<br>
llvm/trunk/test/CodeGen/X86/win64_frame.ll<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_CodeGen_SelectionDAG_SelectionDAG.cpp-3Frev-3D241927-26r1-3D241926-26r2-3D241927-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=zuoz10zhz1T4yQn21NiIo3nmiO9w7js47B14jBSH8dI&s=kEgdJzekdVGqrwk4f5tivdQb4ibonkbLD9iJ3GySFmo&e=" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=241927&r1=241926&r2=241927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Fri Jul 10 13:29:02 2015<br>
@@ -2356,15 +2356,24 @@ void SelectionDAG::computeKnownBits(SDVa<br>
// Output known-0 bits are known if clear or set in both the low clear bits<br>
// common to both LHS & RHS. For example, 8+(X<<3) is known to have the<br>
// low 3 bits clear.<br>
+ // Output known-0 bits are also known if the top bits of each input are<br>
+ // known to be clear. For example, if one input has the top 10 bits clear<br>
+ // and the other has the top 8 bits clear, we know the top 7 bits of the<br>
+ // output must be clear.<br>
computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);<br>
- unsigned KnownZeroOut = KnownZero2.countTrailingOnes();<br>
+ unsigned KnownZeroHigh = KnownZero2.countLeadingOnes();<br>
+ unsigned KnownZeroLow = KnownZero2.countTrailingOnes();<br>
<br>
computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);<br>
- KnownZeroOut = std::min(KnownZeroOut,<br>
+ KnownZeroHigh = std::min(KnownZeroHigh,<br>
+ KnownZero2.countLeadingOnes());<br>
+ KnownZeroLow = std::min(KnownZeroLow,<br>
KnownZero2.countTrailingOnes());<br>
<br>
if (Op.getOpcode() == ISD::ADD) {<br>
- KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);<br>
+ KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroLow);<br>
+ if (KnownZeroHigh > 1)<br>
+ KnownZero |= APInt::getHighBitsSet(BitWidth, KnownZeroHigh - 1);<br>
break;<br>
}<br>
<br>
@@ -2372,8 +2381,8 @@ void SelectionDAG::computeKnownBits(SDVa<br>
// information if we know (at least) that the low two bits are clear. We<br>
// then return to the caller that the low bit is unknown but that other bits<br>
// are known zero.<br>
- if (KnownZeroOut >= 2) // ADDE<br>
- KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);<br>
+ if (KnownZeroLow >= 2) // ADDE<br>
+ KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroLow);<br>
break;<br>
}<br>
case ISD::SREM:<br>
<br>
Modified: llvm/trunk/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AArch64_aarch64-2Ddynamic-2Dstack-2Dlayout.ll-3Frev-3D241927-26r1-3D241926-26r2-3D241927-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=zuoz10zhz1T4yQn21NiIo3nmiO9w7js47B14jBSH8dI&s=tbVrlPFWvAc_C9PpLlvOZ2dVlULgx1kQ4txoXbIImKQ&e=" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll?rev=241927&r1=241926&r2=241927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll (original)<br>
+++ llvm/trunk/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll Fri Jul 10 13:29:02 2015<br>
@@ -255,7 +255,7 @@ entry:<br>
; CHECK: ubfx x9, x0, #0, #32<br>
; CHECK: lsl x9, x9, #2<br>
; CHECK: add x9, x9, #15<br>
-; CHECK: and x9, x9, #0xfffffffffffffff0<br>
+; CHECK: and x9, x9, #0x7fffffff0<br>
; CHECK: mov x10, sp<br>
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9<br>
; CHECK: mov sp, x[[VLASPTMP]]<br>
@@ -302,7 +302,7 @@ entry:<br>
; CHECK: ubfx x9, x0, #0, #32<br>
; CHECK: lsl x9, x9, #2<br>
; CHECK: add x9, x9, #15<br>
-; CHECK: and x9, x9, #0xfffffffffffffff0<br>
+; CHECK: and x9, x9, #0x7fffffff0<br>
; CHECK: mov x10, sp<br>
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9<br>
; CHECK: mov sp, x[[VLASPTMP]]<br>
@@ -364,7 +364,7 @@ entry:<br>
; CHECK: ubfx x9, x0, #0, #32<br>
; CHECK: lsl x9, x9, #2<br>
; CHECK: add x9, x9, #15<br>
-; CHECK: and x9, x9, #0xfffffffffffffff0<br>
+; CHECK: and x9, x9, #0x7fffffff0<br>
; CHECK: mov x10, sp<br>
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9<br>
; CHECK: mov sp, x[[VLASPTMP]]<br>
@@ -417,7 +417,7 @@ entry:<br>
; CHECK: ubfx x9, x0, #0, #32<br>
; CHECK: lsl x9, x9, #2<br>
; CHECK: add x9, x9, #15<br>
-; CHECK: and x9, x9, #0xfffffffffffffff0<br>
+; CHECK: and x9, x9, #0x7fffffff0<br>
; CHECK: mov x10, sp<br>
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9<br>
; CHECK: mov sp, x[[VLASPTMP]]<br>
@@ -468,7 +468,7 @@ entry:<br>
; CHECK: ubfx x9, x0, #0, #32<br>
; CHECK: lsl x9, x9, #2<br>
; CHECK: add x9, x9, #15<br>
-; CHECK: and x9, x9, #0xfffffffffffffff0<br>
+; CHECK: and x9, x9, #0x7fffffff0<br>
; CHECK: mov x10, sp<br>
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9<br>
; CHECK: mov sp, x[[VLASPTMP]]<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/win64_frame.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_X86_win64-5Fframe.ll-3Frev-3D241927-26r1-3D241926-26r2-3D241927-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=zuoz10zhz1T4yQn21NiIo3nmiO9w7js47B14jBSH8dI&s=zlvpmR_RlkONDGcdnLXEJDjs7-A2c74Vn7XhAjVvcoM&e=" rel="noreferrer" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/win64_frame.ll?rev=241927&r1=241926&r2=241927&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/win64_frame.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/win64_frame.ll Fri Jul 10 13:29:02 2015<br>
@@ -100,8 +100,9 @@ define i32 @f8(i32 %a, i32 %b, i32 %c, i<br>
<br>
alloca i32, i32 %a<br>
; CHECK: movl %ecx, %eax<br>
- ; CHECK: leaq 15(,%rax,4), %rax<br>
- ; CHECK: andq $-16, %rax<br>
+ ; CHECK: leaq 15(,%rax,4), %rcx<br>
+ ; CHECK: movabsq $34359738352, %rax<br>
+ ; CHECK: andq %rcx, %rax<br></blockquote><div><br></div><div>What's up with this giant immediate we're now generating instead of an imm8? Seems worse.</div><div><br></div><div>-- Sean Silva</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
; CHECK: callq __chkstk<br>
; CHECK: subq %rax, %rsp<br>
<br>
<br>
<br>
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</blockquote></div><br></div></div>