<p dir="ltr">It's helpful to mention in the committee message the reason for the revert so we have an easy paper trail here</p>
<div class="gmail_quote">On Jun 2, 2015 12:50 AM, "Asaf Badouh" <<a href="mailto:asaf.badouh@intel.com">asaf.badouh@intel.com</a>> wrote:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: abadouh<br>
Date: Tue Jun 2 02:45:19 2015<br>
New Revision: 238810<br>
<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject-3Frev-3D238810-26view-3Drev&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=6MDRgYjsjel0HzQJv8bIA_Tdm1GhmLxGlrn7iOL3Ikk&e=" target="_blank">http://llvm.org/viewvc/llvm-project?rev=238810&view=rev</a><br>
Log:<br>
revert 238809<br>
<br>
Modified:<br>
llvm/trunk/include/llvm/IR/IntrinsicsX86.td<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.h<br>
llvm/trunk/lib/Target/X86/X86InstrAVX512.td<br>
llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td<br>
llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br>
llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll<br>
llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll<br>
llvm/trunk/test/MC/X86/avx512-encodings.s<br>
llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s<br>
<br>
Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_include_llvm_IR_IntrinsicsX86.td-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=x3D_QQBdMxTik31tF-y9LQb2gBB6oc1Nqd4rb5ujvOY&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)<br>
+++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Tue Jun 2 02:45:19 2015<br>
@@ -3372,40 +3372,10 @@ let TargetPrefix = "x86" in { // All in<br>
Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty],<br>
[IntrNoMem]>;<br>
<br>
- def int_x86_avx512_mask_sqrt_pd_128 : GCCBuiltin<"__builtin_ia32_sqrtpd128_mask">,<br>
- Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,<br>
- llvm_i8_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_sqrt_pd_256 : GCCBuiltin<"__builtin_ia32_sqrtpd256_mask">,<br>
- Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty,<br>
- llvm_i8_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_sqrt_pd_512 : GCCBuiltin<"__builtin_ia32_sqrtpd512_mask">,<br>
+ def int_x86_avx512_sqrt_pd_512 : GCCBuiltin<"__builtin_ia32_sqrtpd512_mask">,<br>
Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_v8f64_ty,<br>
llvm_i8_ty, llvm_i32_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_sqrt_ps_128 : GCCBuiltin<"__builtin_ia32_sqrtps128_mask">,<br>
- Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty,<br>
- llvm_i8_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_sqrt_ps_256 : GCCBuiltin<"__builtin_ia32_sqrtps256_mask">,<br>
- Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty,<br>
- llvm_i8_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_sqrt_ps_512 : GCCBuiltin<"__builtin_ia32_sqrtps512_mask">,<br>
- Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_v16f32_ty,<br>
- llvm_i16_ty, llvm_i32_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_getexp_pd_128 : GCCBuiltin<"__builtin_ia32_getexppd128_mask">,<br>
- Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty,<br>
- llvm_i8_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_getexp_pd_256 : GCCBuiltin<"__builtin_ia32_getexppd256_mask">,<br>
- Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty, llvm_v4f64_ty,<br>
- llvm_i8_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_getexp_pd_512 : GCCBuiltin<"__builtin_ia32_getexppd512_mask">,<br>
- Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_v8f64_ty,<br>
- llvm_i8_ty, llvm_i32_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_getexp_ps_128 : GCCBuiltin<"__builtin_ia32_getexpps128_mask">,<br>
- Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty,<br>
- llvm_i8_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_getexp_ps_256 : GCCBuiltin<"__builtin_ia32_getexpps256_mask">,<br>
- Intrinsic<[llvm_v8f32_ty], [llvm_v8f32_ty, llvm_v8f32_ty,<br>
- llvm_i8_ty], [IntrNoMem]>;<br>
- def int_x86_avx512_mask_getexp_ps_512 : GCCBuiltin<"__builtin_ia32_getexpps512_mask">,<br>
+ def int_x86_avx512_sqrt_ps_512 : GCCBuiltin<"__builtin_ia32_sqrtps512_mask">,<br>
Intrinsic<[llvm_v16f32_ty], [llvm_v16f32_ty, llvm_v16f32_ty,<br>
llvm_i16_ty, llvm_i32_ty], [IntrNoMem]>;<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86ISelLowering.cpp-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=PzYDwakTBJCJr7YthOWTcebEP-aa7NJyNNjkAU1ExqA&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jun 2 02:45:19 2015<br>
@@ -15076,31 +15076,12 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br>
Op.getOperand(2), Op.getOperand(3));<br>
case INTR_TYPE_1OP_MASK_RM: {<br>
SDValue Src = Op.getOperand(1);<br>
- SDValue PassThru = Op.getOperand(2);<br>
+ SDValue Src0 = Op.getOperand(2);<br>
SDValue Mask = Op.getOperand(3);<br>
- SDValue RoundingMode;<br>
- if (Op.getNumOperands() == 4)<br>
- RoundingMode = DAG.getConstant(X86::STATIC_ROUNDING::CUR_DIRECTION, dl, MVT::i32);<br>
- else<br>
- RoundingMode = Op.getOperand(4);<br>
- unsigned IntrWithRoundingModeOpcode = IntrData->Opc1;<br>
- if (IntrWithRoundingModeOpcode != 0) {<br>
- unsigned Round = cast<ConstantSDNode>(RoundingMode)->getZExtValue();<br>
- if (Round != X86::STATIC_ROUNDING::CUR_DIRECTION)<br>
- return getVectorMaskingNode(DAG.getNode(IntrWithRoundingModeOpcode,<br>
- dl, Op.getValueType(), Src, RoundingMode),<br>
- Mask, PassThru, Subtarget, DAG);<br>
- }<br>
+ SDValue RoundingMode = Op.getOperand(4);<br>
return getVectorMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src,<br>
RoundingMode),<br>
- Mask, PassThru, Subtarget, DAG);<br>
- }<br>
- case INTR_TYPE_1OP_MASK: {<br>
- SDValue Src = Op.getOperand(1);<br>
- SDValue Passthru = Op.getOperand(2);<br>
- SDValue Mask = Op.getOperand(3);<br>
- return getVectorMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src),<br>
- Mask, Passthru, Subtarget, DAG);<br>
+ Mask, Src0, Subtarget, DAG);<br>
}<br>
case INTR_TYPE_SCALAR_MASK_RM: {<br>
SDValue Src1 = Op.getOperand(1);<br>
@@ -18365,8 +18346,6 @@ const char *X86TargetLowering::getTarget<br>
case X86ISD::FSUB_RND: return "X86ISD::FSUB_RND";<br>
case X86ISD::FMUL_RND: return "X86ISD::FMUL_RND";<br>
case X86ISD::FDIV_RND: return "X86ISD::FDIV_RND";<br>
- case X86ISD::FSQRT_RND: return "X86ISD::FSQRT_RND";<br>
- case X86ISD::FGETEXP_RND: return "X86ISD::FGETEXP_RND";<br>
case X86ISD::ADDS: return "X86ISD::ADDS";<br>
case X86ISD::SUBS: return "X86ISD::SUBS";<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86ISelLowering.h-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=oUb7cj-oXSkN1n_hjnboXehxgr7omNKj0eMMuZ7Z8J8&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Jun 2 02:45:19 2015<br>
@@ -203,7 +203,6 @@ namespace llvm {<br>
<br>
/// Combined add and sub on an FP vector.<br>
ADDSUB,<br>
-<br>
// FP vector ops with rounding mode.<br>
FADD_RND,<br>
FSUB_RND,<br>
@@ -211,10 +210,6 @@ namespace llvm {<br>
FDIV_RND,<br>
FMAX_RND,<br>
FMIN_RND,<br>
- FSQRT_RND,<br>
-<br>
- // FP vector get exponent<br>
- FGETEXP_RND,<br>
<br>
// Integer add/sub with unsigned saturation.<br>
ADDUS,<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86InstrAVX512.td-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=oZI0p496JBdfoUOYYuy8D-PslIg9g-_37aW3SQ8Kwws&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Tue Jun 2 02:45:19 2015<br>
@@ -4854,6 +4854,11 @@ multiclass avx512_fp28_p<bits<8> opc, st<br>
(ins _.RC:$src), OpcodeStr, "$src", "$src",<br>
(OpNode (_.VT _.RC:$src), (i32 FROUND_CURRENT))>;<br>
<br>
+ defm rb : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),<br>
+ (ins _.RC:$src), OpcodeStr,<br>
+ "{sae}, $src", "$src, {sae}",<br>
+ (OpNode (_.VT _.RC:$src), (i32 FROUND_NO_EXC))>, EVEX_B;<br>
+<br>
defm m : AVX512_maskable<opc, MRMSrcMem, _, (outs _.RC:$dst),<br>
(ins _.MemOp:$src), OpcodeStr, "$src", "$src",<br>
(OpNode (_.FloatVT<br>
@@ -4861,58 +4866,24 @@ multiclass avx512_fp28_p<bits<8> opc, st<br>
(i32 FROUND_CURRENT))>;<br>
<br>
defm mb : AVX512_maskable<opc, MRMSrcMem, _, (outs _.RC:$dst),<br>
- (ins _.MemOp:$src), OpcodeStr,<br>
- "${src}"##_.BroadcastStr, "${src}"##_.BroadcastStr,<br>
+ (ins _.MemOp:$src), OpcodeStr, "$src", "$src",<br>
(OpNode (_.FloatVT<br>
(X86VBroadcast (_.ScalarLdFrag addr:$src))),<br>
(i32 FROUND_CURRENT))>, EVEX_B;<br>
}<br>
-multiclass avx512_fp28_p_round<bits<8> opc, string OpcodeStr, X86VectorVTInfo _,<br>
- SDNode OpNode> {<br>
- defm rb : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),<br>
- (ins _.RC:$src), OpcodeStr,<br>
- "{sae}, $src", "$src, {sae}",<br>
- (OpNode (_.VT _.RC:$src), (i32 FROUND_NO_EXC))>, EVEX_B;<br>
-}<br>
<br>
multiclass avx512_eri<bits<8> opc, string OpcodeStr, SDNode OpNode> {<br>
defm PS : avx512_fp28_p<opc, OpcodeStr#"ps", v16f32_info, OpNode>,<br>
- avx512_fp28_p_round<opc, OpcodeStr#"ps", v16f32_info, OpNode>,<br>
- T8PD, EVEX_V512, EVEX_CD8<32, CD8VF>;<br>
+ EVEX_CD8<32, CD8VF>;<br>
defm PD : avx512_fp28_p<opc, OpcodeStr#"pd", v8f64_info, OpNode>,<br>
- avx512_fp28_p_round<opc, OpcodeStr#"pd", v8f64_info, OpNode>,<br>
- T8PD, EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;<br>
+ VEX_W, EVEX_CD8<32, CD8VF>;<br>
}<br>
<br>
-multiclass avx512_fp_unaryop_packed<bits<8> opc, string OpcodeStr,<br>
- SDNode OpNode> {<br>
- // Define only if AVX512VL feature is present.<br>
- let Predicates = [HasVLX] in {<br>
- defm PSZ128 : avx512_fp28_p<opc, OpcodeStr#"ps", v4f32x_info, OpNode>,<br>
- EVEX_V128, T8PD, EVEX_CD8<32, CD8VF>;<br>
- defm PSZ256 : avx512_fp28_p<opc, OpcodeStr#"ps", v8f32x_info, OpNode>,<br>
- EVEX_V256, T8PD, EVEX_CD8<32, CD8VF>;<br>
- defm PDZ128 : avx512_fp28_p<opc, OpcodeStr#"pd", v2f64x_info, OpNode>,<br>
- EVEX_V128, VEX_W, T8PD, EVEX_CD8<64, CD8VF>;<br>
- defm PDZ256 : avx512_fp28_p<opc, OpcodeStr#"pd", v4f64x_info, OpNode>,<br>
- EVEX_V256, VEX_W, T8PD, EVEX_CD8<64, CD8VF>;<br>
- }<br>
-}<br>
let Predicates = [HasERI], hasSideEffects = 0 in {<br>
<br>
- defm VRSQRT28 : avx512_eri<0xCC, "vrsqrt28", X86rsqrt28>, EVEX;<br>
- defm VRCP28 : avx512_eri<0xCA, "vrcp28", X86rcp28>, EVEX;<br>
- defm VEXP2 : avx512_eri<0xC8, "vexp2", X86exp2>, EVEX;<br>
-}<br>
-defm VGETEXP : avx512_eri<0x42, "vgetexp", X86fgetexpRnd>,<br>
- avx512_fp_unaryop_packed<0x42, "vgetexp", X86fgetexpRnd> , EVEX;<br>
-<br>
-multiclass avx512_sqrt_packed_round<bits<8> opc, string OpcodeStr,<br>
- SDNode OpNodeRnd, X86VectorVTInfo _>{<br>
- defm rb: AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),<br>
- (ins _.RC:$src, AVX512RC:$rc), OpcodeStr, "$rc, $src", "$src, $rc",<br>
- (_.VT (OpNodeRnd _.RC:$src, (i32 imm:$rc)))>,<br>
- EVEX, EVEX_B, EVEX_RC;<br>
+ defm VRSQRT28 : avx512_eri<0xCC, "vrsqrt28", X86rsqrt28>, EVEX, EVEX_V512, T8PD;<br>
+ defm VRCP28 : avx512_eri<0xCA, "vrcp28", X86rcp28>, EVEX, EVEX_V512, T8PD;<br>
+ defm VEXP2 : avx512_eri<0xC8, "vexp2", X86exp2>, EVEX, EVEX_V512, T8PD;<br>
}<br>
<br>
multiclass avx512_sqrt_packed<bits<8> opc, string OpcodeStr,<br>
@@ -5021,22 +4992,20 @@ multiclass avx512_sqrt_packed_all<bits<8<br>
}<br>
}<br>
<br>
-multiclass avx512_sqrt_packed_all_round<bits<8> opc, string OpcodeStr,<br>
- SDNode OpNodeRnd> {<br>
- defm PSZ : avx512_sqrt_packed_round<opc, !strconcat(OpcodeStr, "ps"), OpNodeRnd,<br>
- v16f32_info>, EVEX_V512, PS, EVEX_CD8<32, CD8VF>;<br>
- defm PDZ : avx512_sqrt_packed_round<opc, !strconcat(OpcodeStr, "pd"), OpNodeRnd,<br>
- v8f64_info>, EVEX_V512, VEX_W, PD, EVEX_CD8<64, CD8VF>;<br>
-}<br>
-<br>
-defm VSQRT : avx512_sqrt_packed_all<0x51, "vsqrt", fsqrt>,<br>
- avx512_sqrt_packed_all_round<0x51, "vsqrt", X86fsqrtRnd>;<br>
+defm VSQRT : avx512_sqrt_packed_all<0x51, "vsqrt", fsqrt>;<br>
<br>
defm VSQRT : avx512_sqrt_scalar<0x51, "sqrt",<br>
int_x86_avx512_sqrt_ss, int_x86_avx512_sqrt_sd,<br>
SSE_SQRTSS, SSE_SQRTSD>;<br>
<br>
let Predicates = [HasAVX512] in {<br>
+ def : Pat<(v16f32 (int_x86_avx512_sqrt_ps_512 (v16f32 VR512:$src1),<br>
+ (bc_v16f32 (v16i32 immAllZerosV)), (i16 -1), FROUND_CURRENT)),<br>
+ (VSQRTPSZr VR512:$src1)>;<br>
+ def : Pat<(v8f64 (int_x86_avx512_sqrt_pd_512 (v8f64 VR512:$src1),<br>
+ (bc_v8f64 (v16i32 immAllZerosV)), (i8 -1), FROUND_CURRENT)),<br>
+ (VSQRTPDZr VR512:$src1)>;<br>
+<br>
def : Pat<(f32 (fsqrt FR32X:$src)),<br>
(VSQRTSSZr (f32 (IMPLICIT_DEF)), FR32X:$src)>;<br>
def : Pat<(f32 (fsqrt (load addr:$src))),<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86InstrFragmentsSIMD.td-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=lCO9HBa7a3ijceeflfSwF5moRbbl1RnR9Hx94Od0w6g&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrFragmentsSIMD.td Tue Jun 2 02:45:19 2015<br>
@@ -234,9 +234,6 @@ def SDTBlend : SDTypeProfile<1, 3, [SDTC<br>
def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.<br>
SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;<br>
<br>
-def SDTFPUnaryOpRound : SDTypeProfile<1, 2, [ // fsqrt_round, fgetexp_round, etc.<br>
- SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisInt<2>]>;<br>
-<br>
def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,<br>
SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;<br>
def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,<br>
@@ -309,8 +306,6 @@ def X86fmulRnd : SDNode<"X86ISD::FMUL_<br>
def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;<br>
def X86fmaxRnd : SDNode<"X86ISD::FMAX_RND", SDTFPBinOpRound>;<br>
def X86fminRnd : SDNode<"X86ISD::FMIN_RND", SDTFPBinOpRound>;<br>
-def X86fsqrtRnd : SDNode<"X86ISD::FSQRT_RND", SDTFPUnaryOpRound>;<br>
-def X86fgetexpRnd : SDNode<"X86ISD::FGETEXP_RND", SDTFPUnaryOpRound>;<br>
<br>
def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;<br>
def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86IntrinsicsInfo.h-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=NaDMn_EOHbZpJJHIYoZf8IYKFdrbDYbkVAXNgAKbazM&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h Tue Jun 2 02:45:19 2015<br>
@@ -21,7 +21,7 @@ enum IntrinsicType {<br>
GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX,<br>
INTR_TYPE_1OP, INTR_TYPE_2OP, INTR_TYPE_3OP,<br>
CMP_MASK, CMP_MASK_CC, VSHIFT, VSHIFT_MASK, COMI,<br>
- INTR_TYPE_1OP_MASK, INTR_TYPE_1OP_MASK_RM, INTR_TYPE_2OP_MASK, FMA_OP_MASK,<br>
+ INTR_TYPE_1OP_MASK_RM, INTR_TYPE_2OP_MASK, FMA_OP_MASK,<br>
INTR_TYPE_SCALAR_MASK_RM, COMPRESS_EXPAND_IN_REG, COMPRESS_TO_MEM,<br>
EXPAND_FROM_MEM, BLEND<br>
};<br>
@@ -339,9 +339,9 @@ static const IntrinsicData IntrinsicsWi<br>
X86_INTRINSIC_DATA(avx512_mask_div_ps_512, INTR_TYPE_2OP_MASK, ISD::FDIV,<br>
X86ISD::FDIV_RND),<br>
X86_INTRINSIC_DATA(avx512_mask_div_sd_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FDIV,<br>
- X86ISD::FDIV_RND),<br>
+ X86ISD::FDIV_RND),<br>
X86_INTRINSIC_DATA(avx512_mask_div_ss_round, INTR_TYPE_SCALAR_MASK_RM, ISD::FDIV,<br>
- X86ISD::FDIV_RND),<br>
+ X86ISD::FDIV_RND),<br>
X86_INTRINSIC_DATA(avx512_mask_expand_d_128, COMPRESS_EXPAND_IN_REG,<br>
X86ISD::EXPAND, 0),<br>
X86_INTRINSIC_DATA(avx512_mask_expand_d_256, COMPRESS_EXPAND_IN_REG,<br>
@@ -366,18 +366,6 @@ static const IntrinsicData IntrinsicsWi<br>
X86ISD::EXPAND, 0),<br>
X86_INTRINSIC_DATA(avx512_mask_expand_q_512, COMPRESS_EXPAND_IN_REG,<br>
X86ISD::EXPAND, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_getexp_pd_128, INTR_TYPE_1OP_MASK_RM,<br>
- X86ISD::FGETEXP_RND, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_getexp_pd_256, INTR_TYPE_1OP_MASK_RM,<br>
- X86ISD::FGETEXP_RND, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_getexp_pd_512, INTR_TYPE_1OP_MASK_RM,<br>
- X86ISD::FGETEXP_RND, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_getexp_ps_128, INTR_TYPE_1OP_MASK_RM,<br>
- X86ISD::FGETEXP_RND, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_getexp_ps_256, INTR_TYPE_1OP_MASK_RM,<br>
- X86ISD::FGETEXP_RND, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_getexp_ps_512, INTR_TYPE_1OP_MASK_RM,<br>
- X86ISD::FGETEXP_RND, 0),<br>
X86_INTRINSIC_DATA(avx512_mask_max_pd_128, INTR_TYPE_2OP_MASK, X86ISD::FMAX, 0),<br>
X86_INTRINSIC_DATA(avx512_mask_max_pd_256, INTR_TYPE_2OP_MASK, X86ISD::FMAX, 0),<br>
X86_INTRINSIC_DATA(avx512_mask_max_pd_512, INTR_TYPE_2OP_MASK, X86ISD::FMAX,<br>
@@ -571,14 +559,6 @@ static const IntrinsicData IntrinsicsWi<br>
X86ISD::RNDSCALE, 0),<br>
X86_INTRINSIC_DATA(avx512_mask_rndscale_ss, INTR_TYPE_SCALAR_MASK_RM,<br>
X86ISD::RNDSCALE, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_128, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_256, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_sqrt_pd_512, INTR_TYPE_1OP_MASK_RM, ISD::FSQRT,<br>
- X86ISD::FSQRT_RND),<br>
- X86_INTRINSIC_DATA(avx512_mask_sqrt_ps_128, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_sqrt_ps_256, INTR_TYPE_1OP_MASK, ISD::FSQRT, 0),<br>
- X86_INTRINSIC_DATA(avx512_mask_sqrt_ps_512, INTR_TYPE_1OP_MASK_RM, ISD::FSQRT,<br>
- X86ISD::FSQRT_RND),<br>
X86_INTRINSIC_DATA(avx512_mask_sub_pd_128, INTR_TYPE_2OP_MASK, ISD::FSUB, 0),<br>
X86_INTRINSIC_DATA(avx512_mask_sub_pd_256, INTR_TYPE_2OP_MASK, ISD::FSUB, 0),<br>
X86_INTRINSIC_DATA(avx512_mask_sub_pd_512, INTR_TYPE_2OP_MASK, ISD::FSUB,<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_X86_avx512-2Dintrinsics.ll-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=_w_kU1KwGPj9buzYrxqgGh_zjNJyKGApxS4LIlgshto&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll Tue Jun 2 02:45:19 2015<br>
@@ -98,55 +98,18 @@ define <4 x float> @test_rcp14_ss(<4 x f<br>
declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone<br>
<br>
define <8 x double> @test_sqrt_pd_512(<8 x double> %a0) {<br>
- ; CHECK-LABEL: test_sqrt_pd_512<br>
; CHECK: vsqrtpd<br>
- %res = call <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1, i32 4)<br>
+ %res = call <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1, i32 4) ; <<8 x double>> [#uses=1]<br>
ret <8 x double> %res<br>
}<br>
-declare <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double>, <8 x double>, i8, i32) nounwind readnone<br>
+declare <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double>, <8 x double>, i8, i32) nounwind readnone<br>
<br>
define <16 x float> @test_sqrt_ps_512(<16 x float> %a0) {<br>
- ; CHECK-LABEL: test_sqrt_ps_512<br>
; CHECK: vsqrtps<br>
- %res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 4)<br>
+ %res = call <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 4) ; <<16 x float>> [#uses=1]<br>
ret <16 x float> %res<br>
}<br>
-define <16 x float> @test_sqrt_round_ps_512(<16 x float> %a0) {<br>
- ; CHECK-LABEL: test_sqrt_round_ps_512<br>
- ; CHECK: vsqrtps {rz-sae}<br>
- %res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 3)<br>
- ret <16 x float> %res<br>
-}<br>
-declare <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float>, <16 x float>, i16, i32) nounwind readnone<br>
-<br>
-define <8 x double> @test_getexp_pd_512(<8 x double> %a0) {<br>
- ; CHECK-LABEL: test_getexp_pd_512<br>
- ; CHECK: vgetexppd<br>
- %res = call <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1, i32 4)<br>
- ret <8 x double> %res<br>
-}<br>
-define <8 x double> @test_getexp_round_pd_512(<8 x double> %a0) {<br>
- ; CHECK-LABEL: test_getexp_round_pd_512<br>
- ; CHECK: vgetexppd {sae}<br>
- %res = call <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 -1, i32 8)<br>
- ret <8 x double> %res<br>
-}<br>
-declare <8 x double> @llvm.x86.avx512.mask.getexp.pd.512(<8 x double>, <8 x double>, i8, i32) nounwind readnone<br>
-<br>
-define <16 x float> @test_getexp_ps_512(<16 x float> %a0) {<br>
- ; CHECK-LABEL: test_getexp_ps_512<br>
- ; CHECK: vgetexpps<br>
- %res = call <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 4)<br>
- ret <16 x float> %res<br>
-}<br>
-<br>
-define <16 x float> @test_getexp_round_ps_512(<16 x float> %a0) {<br>
- ; CHECK-LABEL: test_getexp_round_ps_512<br>
- ; CHECK: vgetexpps {sae}<br>
- %res = call <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 8)<br>
- ret <16 x float> %res<br>
-}<br>
-declare <16 x float> @llvm.x86.avx512.mask.getexp.ps.512(<16 x float>, <16 x float>, i16, i32) nounwind readnone<br>
+declare <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float>, <16 x float>, i16, i32) nounwind readnone<br>
<br>
define <4 x float> @test_sqrt_ss(<4 x float> %a0, <4 x float> %a1) {<br>
; CHECK: vsqrtss {{.*}}encoding: [0x62<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_X86_avx512vl-2Dintrinsics.ll-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=Q9tu5u4aWn9iYzaQmEwTpI1om_r9RDufhqXvotrVlVE&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll Tue Jun 2 02:45:19 2015<br>
@@ -2553,37 +2553,3 @@ define <4 x float> @test_mm512_min_ps_12<br>
ret <4 x float> %res<br>
}<br>
declare <4 x float> @llvm.x86.avx512.mask.min.ps.128(<4 x float>, <4 x float>, <4 x float>, i8)<br>
-<br>
-define <4 x double> @test_sqrt_pd_256(<4 x double> %a0, i8 %mask) {<br>
- ; CHECK-LABEL: test_sqrt_pd_256<br>
- ; CHECK: vsqrtpd<br>
- %res = call <4 x double> @llvm.x86.avx512.mask.sqrt.pd.256(<4 x double> %a0, <4 x double> zeroinitializer, i8 %mask)<br>
- ret <4 x double> %res<br>
-}<br>
-declare <4 x double> @llvm.x86.avx512.mask.sqrt.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone<br>
-<br>
-define <8 x float> @test_sqrt_ps_256(<8 x float> %a0, i8 %mask) {<br>
- ; CHECK-LABEL: test_sqrt_ps_256<br>
- ; CHECK: vsqrtps<br>
- %res = call <8 x float> @llvm.x86.avx512.mask.sqrt.ps.256(<8 x float> %a0, <8 x float> zeroinitializer, i8 %mask)<br>
- ret <8 x float> %res<br>
-}<br>
-<br>
-declare <8 x float> @llvm.x86.avx512.mask.sqrt.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone<br>
-<br>
-define <4 x double> @test_getexp_pd_256(<4 x double> %a0) {<br>
- ; CHECK-LABEL: test_getexp_pd_256<br>
- ; CHECK: vgetexppd<br>
- %res = call <4 x double> @llvm.x86.avx512.mask.getexp.pd.256(<4 x double> %a0, <4 x double> zeroinitializer, i8 -1)<br>
- ret <4 x double> %res<br>
-}<br>
-<br>
-declare <4 x double> @llvm.x86.avx512.mask.getexp.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone<br>
-<br>
-define <8 x float> @test_getexp_ps_256(<8 x float> %a0) {<br>
- ; CHECK-LABEL: test_getexp_ps_256<br>
- ; CHECK: vgetexpps<br>
- %res = call <8 x float> @llvm.x86.avx512.mask.getexp.ps.256(<8 x float> %a0, <8 x float> zeroinitializer, i8 -1)<br>
- ret <8 x float> %res<br>
-}<br>
-declare <8 x float> @llvm.x86.avx512.mask.getexp.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone<br>
<br>
Modified: llvm/trunk/test/MC/X86/avx512-encodings.s<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_MC_X86_avx512-2Dencodings.s-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=BsFx83ivvP9eG1aogD3oGxf-cpp10-UDfqsSdXXMJ_U&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/avx512-encodings.s?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/X86/avx512-encodings.s (original)<br>
+++ llvm/trunk/test/MC/X86/avx512-encodings.s Tue Jun 2 02:45:19 2015<br>
@@ -4796,38 +4796,6 @@<br>
// CHECK: encoding: [0x62,0x61,0x7c,0x58,0x51,0xa2,0xfc,0xfd,0xff,0xff]<br>
vsqrtps -516(%rdx){1to16}, %zmm28<br>
<br>
-// CHECK: vsqrtpd {rn-sae}, %zmm19, %zmm19<br>
-// CHECK: encoding: [0x62,0xa1,0xfd,0x18,0x51,0xdb]<br>
- vsqrtpd {rn-sae}, %zmm19, %zmm19<br>
-<br>
-// CHECK: vsqrtpd {ru-sae}, %zmm19, %zmm19<br>
-// CHECK: encoding: [0x62,0xa1,0xfd,0x58,0x51,0xdb]<br>
- vsqrtpd {ru-sae}, %zmm19, %zmm19<br>
-<br>
-// CHECK: vsqrtpd {rd-sae}, %zmm19, %zmm19<br>
-// CHECK: encoding: [0x62,0xa1,0xfd,0x38,0x51,0xdb]<br>
- vsqrtpd {rd-sae}, %zmm19, %zmm19<br>
-<br>
-// CHECK: vsqrtpd {rz-sae}, %zmm19, %zmm19<br>
-// CHECK: encoding: [0x62,0xa1,0xfd,0x78,0x51,0xdb]<br>
- vsqrtpd {rz-sae}, %zmm19, %zmm19<br>
-<br>
-// CHECK: vsqrtps {rn-sae}, %zmm29, %zmm28<br>
-// CHECK: encoding: [0x62,0x01,0x7c,0x18,0x51,0xe5]<br>
- vsqrtps {rn-sae}, %zmm29, %zmm28<br>
-<br>
-// CHECK: vsqrtps {ru-sae}, %zmm29, %zmm28<br>
-// CHECK: encoding: [0x62,0x01,0x7c,0x58,0x51,0xe5]<br>
- vsqrtps {ru-sae}, %zmm29, %zmm28<br>
-<br>
-// CHECK: vsqrtps {rd-sae}, %zmm29, %zmm28<br>
-// CHECK: encoding: [0x62,0x01,0x7c,0x38,0x51,0xe5]<br>
- vsqrtps {rd-sae}, %zmm29, %zmm28<br>
-<br>
-// CHECK: vsqrtps {rz-sae}, %zmm29, %zmm28<br>
-// CHECK: encoding: [0x62,0x01,0x7c,0x78,0x51,0xe5]<br>
- vsqrtps {rz-sae}, %zmm29, %zmm28<br>
-<br>
// CHECK: vsubpd %zmm9, %zmm12, %zmm9<br>
// CHECK: encoding: [0x62,0x51,0x9d,0x48,0x5c,0xc9]<br>
vsubpd %zmm9, %zmm12, %zmm9<br>
@@ -7952,123 +7920,3 @@ vpermilpd $0x23, 0x400(%rbx), %zmm2<br>
// CHECK: encoding: [0x62,0xe1,0x7d,0x58,0x70,0x9a,0xfc,0xfd,0xff,0xff,0x7b]<br>
vpshufd $123, -516(%rdx){1to16}, %zmm19<br>
<br>
-// CHECK: vgetexppd %zmm25, %zmm14<br>
-// CHECK: encoding: [0x62,0x12,0xfd,0x48,0x42,0xf1]<br>
- vgetexppd %zmm25, %zmm14<br>
-<br>
-// CHECK: vgetexppd %zmm25, %zmm14 {%k5}<br>
-// CHECK: encoding: [0x62,0x12,0xfd,0x4d,0x42,0xf1]<br>
- vgetexppd %zmm25, %zmm14 {%k5}<br>
-<br>
-// CHECK: vgetexppd %zmm25, %zmm14 {%k5} {z}<br>
-// CHECK: encoding: [0x62,0x12,0xfd,0xcd,0x42,0xf1]<br>
- vgetexppd %zmm25, %zmm14 {%k5} {z}<br>
-<br>
-// CHECK: vgetexppd {sae}, %zmm25, %zmm14<br>
-// CHECK: encoding: [0x62,0x12,0xfd,0x18,0x42,0xf1]<br>
- vgetexppd {sae}, %zmm25, %zmm14<br>
-<br>
-// CHECK: vgetexppd (%rcx), %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x42,0x31]<br>
- vgetexppd (%rcx), %zmm14<br>
-<br>
-// CHECK: vgetexppd 291(%rax,%r14,8), %zmm14<br>
-// CHECK: encoding: [0x62,0x32,0xfd,0x48,0x42,0xb4,0xf0,0x23,0x01,0x00,0x00]<br>
- vgetexppd 291(%rax,%r14,8), %zmm14<br>
-<br>
-// CHECK: vgetexppd (%rcx){1to8}, %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x42,0x31]<br>
- vgetexppd (%rcx){1to8}, %zmm14<br>
-<br>
-// CHECK: vgetexppd 8128(%rdx), %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x42,0x72,0x7f]<br>
- vgetexppd 8128(%rdx), %zmm14<br>
-<br>
-// CHECK: vgetexppd 8192(%rdx), %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x42,0xb2,0x00,0x20,0x00,0x00]<br>
- vgetexppd 8192(%rdx), %zmm14<br>
-<br>
-// CHECK: vgetexppd -8192(%rdx), %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x42,0x72,0x80]<br>
- vgetexppd -8192(%rdx), %zmm14<br>
-<br>
-// CHECK: vgetexppd -8256(%rdx), %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x48,0x42,0xb2,0xc0,0xdf,0xff,0xff]<br>
- vgetexppd -8256(%rdx), %zmm14<br>
-<br>
-// CHECK: vgetexppd 1016(%rdx){1to8}, %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x42,0x72,0x7f]<br>
- vgetexppd 1016(%rdx){1to8}, %zmm14<br>
-<br>
-// CHECK: vgetexppd 1024(%rdx){1to8}, %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x42,0xb2,0x00,0x04,0x00,0x00]<br>
- vgetexppd 1024(%rdx){1to8}, %zmm14<br>
-<br>
-// CHECK: vgetexppd -1024(%rdx){1to8}, %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x42,0x72,0x80]<br>
- vgetexppd -1024(%rdx){1to8}, %zmm14<br>
-<br>
-// CHECK: vgetexppd -1032(%rdx){1to8}, %zmm14<br>
-// CHECK: encoding: [0x62,0x72,0xfd,0x58,0x42,0xb2,0xf8,0xfb,0xff,0xff]<br>
- vgetexppd -1032(%rdx){1to8}, %zmm14<br>
-<br>
-// CHECK: vgetexpps %zmm6, %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x42,0xce]<br>
- vgetexpps %zmm6, %zmm1<br>
-<br>
-// CHECK: vgetexpps %zmm6, %zmm1 {%k3}<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x4b,0x42,0xce]<br>
- vgetexpps %zmm6, %zmm1 {%k3}<br>
-<br>
-// CHECK: vgetexpps %zmm6, %zmm1 {%k3} {z}<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0xcb,0x42,0xce]<br>
- vgetexpps %zmm6, %zmm1 {%k3} {z}<br>
-<br>
-// CHECK: vgetexpps {sae}, %zmm6, %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x18,0x42,0xce]<br>
- vgetexpps {sae}, %zmm6, %zmm1<br>
-<br>
-// CHECK: vgetexpps (%rcx), %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x42,0x09]<br>
- vgetexpps (%rcx), %zmm1<br>
-<br>
-// CHECK: vgetexpps 291(%rax,%r14,8), %zmm1<br>
-// CHECK: encoding: [0x62,0xb2,0x7d,0x48,0x42,0x8c,0xf0,0x23,0x01,0x00,0x00]<br>
- vgetexpps 291(%rax,%r14,8), %zmm1<br>
-<br>
-// CHECK: vgetexpps (%rcx){1to16}, %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x58,0x42,0x09]<br>
- vgetexpps (%rcx){1to16}, %zmm1<br>
-<br>
-// CHECK: vgetexpps 8128(%rdx), %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x42,0x4a,0x7f]<br>
- vgetexpps 8128(%rdx), %zmm1<br>
-<br>
-// CHECK: vgetexpps 8192(%rdx), %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x42,0x8a,0x00,0x20,0x00,0x00]<br>
- vgetexpps 8192(%rdx), %zmm1<br>
-<br>
-// CHECK: vgetexpps -8192(%rdx), %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x42,0x4a,0x80]<br>
- vgetexpps -8192(%rdx), %zmm1<br>
-<br>
-// CHECK: vgetexpps -8256(%rdx), %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x48,0x42,0x8a,0xc0,0xdf,0xff,0xff]<br>
- vgetexpps -8256(%rdx), %zmm1<br>
-<br>
-// CHECK: vgetexpps 508(%rdx){1to16}, %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x58,0x42,0x4a,0x7f]<br>
- vgetexpps 508(%rdx){1to16}, %zmm1<br>
-<br>
-// CHECK: vgetexpps 512(%rdx){1to16}, %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x58,0x42,0x8a,0x00,0x02,0x00,0x00]<br>
- vgetexpps 512(%rdx){1to16}, %zmm1<br>
-<br>
-// CHECK: vgetexpps -512(%rdx){1to16}, %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x58,0x42,0x4a,0x80]<br>
- vgetexpps -512(%rdx){1to16}, %zmm1<br>
-<br>
-// CHECK: vgetexpps -516(%rdx){1to16}, %zmm1<br>
-// CHECK: encoding: [0x62,0xf2,0x7d,0x58,0x42,0x8a,0xfc,0xfd,0xff,0xff]<br>
- vgetexpps -516(%rdx){1to16}, %zmm1<br>
-<br>
<br>
Modified: llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_MC_X86_x86-2D64-2Davx512f-5Fvl.s-3Frev-3D238810-26r1-3D238809-26r2-3D238810-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=ixGx-e719vwyFwt6D7mEzTXCtkJAfhB60AsfFhk6m4c&s=MztXa1p10wMvS3iqZyU5P2BNs7e8W3X4HVgXmV9d-pY&e=" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s?rev=238810&r1=238809&r2=238810&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s (original)<br>
+++ llvm/trunk/test/MC/X86/x86-64-avx512f_vl.s Tue Jun 2 02:45:19 2015<br>
@@ -10549,226 +10549,3 @@ vaddpd {rz-sae}, %zmm2, %zmm1, %zmm1<br>
// CHECK: encoding: [0x62,0xe1,0x7d,0x38,0x70,0xa2,0xfc,0xfd,0xff,0xff,0x7b]<br>
vpshufd $123, -516(%rdx){1to8}, %ymm20<br>
<br>
-// CHECK: vgetexppd %xmm18, %xmm17<br>
-// CHECK: encoding: [0x62,0xa2,0xfd,0x08,0x42,0xca]<br>
- vgetexppd %xmm18, %xmm17<br>
-<br>
-// CHECK: vgetexppd %xmm18, %xmm17 {%k1}<br>
-// CHECK: encoding: [0x62,0xa2,0xfd,0x09,0x42,0xca]<br>
- vgetexppd %xmm18, %xmm17 {%k1}<br>
-<br>
-// CHECK: vgetexppd %xmm18, %xmm17 {%k1} {z}<br>
-// CHECK: encoding: [0x62,0xa2,0xfd,0x89,0x42,0xca]<br>
- vgetexppd %xmm18, %xmm17 {%k1} {z}<br>
-<br>
-// CHECK: vgetexppd (%rcx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x42,0x09]<br>
- vgetexppd (%rcx), %xmm17<br>
-<br>
-// CHECK: vgetexppd 291(%rax,%r14,8), %xmm17<br>
-// CHECK: encoding: [0x62,0xa2,0xfd,0x08,0x42,0x8c,0xf0,0x23,0x01,0x00,0x00]<br>
- vgetexppd 291(%rax,%r14,8), %xmm17<br>
-<br>
-// CHECK: vgetexppd (%rcx){1to2}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x42,0x09]<br>
- vgetexppd (%rcx){1to2}, %xmm17<br>
-<br>
-// CHECK: vgetexppd 2032(%rdx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x42,0x4a,0x7f]<br>
- vgetexppd 2032(%rdx), %xmm17<br>
-<br>
-// CHECK: vgetexppd 2048(%rdx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x42,0x8a,0x00,0x08,0x00,0x00]<br>
- vgetexppd 2048(%rdx), %xmm17<br>
-<br>
-// CHECK: vgetexppd -2048(%rdx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x42,0x4a,0x80]<br>
- vgetexppd -2048(%rdx), %xmm17<br>
-<br>
-// CHECK: vgetexppd -2064(%rdx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x08,0x42,0x8a,0xf0,0xf7,0xff,0xff]<br>
- vgetexppd -2064(%rdx), %xmm17<br>
-<br>
-// CHECK: vgetexppd 1016(%rdx){1to2}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x42,0x4a,0x7f]<br>
- vgetexppd 1016(%rdx){1to2}, %xmm17<br>
-<br>
-// CHECK: vgetexppd 1024(%rdx){1to2}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x42,0x8a,0x00,0x04,0x00,0x00]<br>
- vgetexppd 1024(%rdx){1to2}, %xmm17<br>
-<br>
-// CHECK: vgetexppd -1024(%rdx){1to2}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x42,0x4a,0x80]<br>
- vgetexppd -1024(%rdx){1to2}, %xmm17<br>
-<br>
-// CHECK: vgetexppd -1032(%rdx){1to2}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x18,0x42,0x8a,0xf8,0xfb,0xff,0xff]<br>
- vgetexppd -1032(%rdx){1to2}, %xmm17<br>
-<br>
-// CHECK: vgetexppd %ymm17, %ymm20<br>
-// CHECK: encoding: [0x62,0xa2,0xfd,0x28,0x42,0xe1]<br>
- vgetexppd %ymm17, %ymm20<br>
-<br>
-// CHECK: vgetexppd %ymm17, %ymm20 {%k3}<br>
-// CHECK: encoding: [0x62,0xa2,0xfd,0x2b,0x42,0xe1]<br>
- vgetexppd %ymm17, %ymm20 {%k3}<br>
-<br>
-// CHECK: vgetexppd %ymm17, %ymm20 {%k3} {z}<br>
-// CHECK: encoding: [0x62,0xa2,0xfd,0xab,0x42,0xe1]<br>
- vgetexppd %ymm17, %ymm20 {%k3} {z}<br>
-<br>
-// CHECK: vgetexppd (%rcx), %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x42,0x21]<br>
- vgetexppd (%rcx), %ymm20<br>
-<br>
-// CHECK: vgetexppd 291(%rax,%r14,8), %ymm20<br>
-// CHECK: encoding: [0x62,0xa2,0xfd,0x28,0x42,0xa4,0xf0,0x23,0x01,0x00,0x00]<br>
- vgetexppd 291(%rax,%r14,8), %ymm20<br>
-<br>
-// CHECK: vgetexppd (%rcx){1to4}, %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x42,0x21]<br>
- vgetexppd (%rcx){1to4}, %ymm20<br>
-<br>
-// CHECK: vgetexppd 4064(%rdx), %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x42,0x62,0x7f]<br>
- vgetexppd 4064(%rdx), %ymm20<br>
-<br>
-// CHECK: vgetexppd 4096(%rdx), %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x42,0xa2,0x00,0x10,0x00,0x00]<br>
- vgetexppd 4096(%rdx), %ymm20<br>
-<br>
-// CHECK: vgetexppd -4096(%rdx), %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x42,0x62,0x80]<br>
- vgetexppd -4096(%rdx), %ymm20<br>
-<br>
-// CHECK: vgetexppd -4128(%rdx), %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x28,0x42,0xa2,0xe0,0xef,0xff,0xff]<br>
- vgetexppd -4128(%rdx), %ymm20<br>
-<br>
-// CHECK: vgetexppd 1016(%rdx){1to4}, %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x42,0x62,0x7f]<br>
- vgetexppd 1016(%rdx){1to4}, %ymm20<br>
-<br>
-// CHECK: vgetexppd 1024(%rdx){1to4}, %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x42,0xa2,0x00,0x04,0x00,0x00]<br>
- vgetexppd 1024(%rdx){1to4}, %ymm20<br>
-<br>
-// CHECK: vgetexppd -1024(%rdx){1to4}, %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x42,0x62,0x80]<br>
- vgetexppd -1024(%rdx){1to4}, %ymm20<br>
-<br>
-// CHECK: vgetexppd -1032(%rdx){1to4}, %ymm20<br>
-// CHECK: encoding: [0x62,0xe2,0xfd,0x38,0x42,0xa2,0xf8,0xfb,0xff,0xff]<br>
- vgetexppd -1032(%rdx){1to4}, %ymm20<br>
-<br>
-// CHECK: vgetexpps %xmm27, %xmm17<br>
-// CHECK: encoding: [0x62,0x82,0x7d,0x08,0x42,0xcb]<br>
- vgetexpps %xmm27, %xmm17<br>
-<br>
-// CHECK: vgetexpps %xmm27, %xmm17 {%k2}<br>
-// CHECK: encoding: [0x62,0x82,0x7d,0x0a,0x42,0xcb]<br>
- vgetexpps %xmm27, %xmm17 {%k2}<br>
-<br>
-// CHECK: vgetexpps %xmm27, %xmm17 {%k2} {z}<br>
-// CHECK: encoding: [0x62,0x82,0x7d,0x8a,0x42,0xcb]<br>
- vgetexpps %xmm27, %xmm17 {%k2} {z}<br>
-<br>
-// CHECK: vgetexpps (%rcx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x42,0x09]<br>
- vgetexpps (%rcx), %xmm17<br>
-<br>
-// CHECK: vgetexpps 291(%rax,%r14,8), %xmm17<br>
-// CHECK: encoding: [0x62,0xa2,0x7d,0x08,0x42,0x8c,0xf0,0x23,0x01,0x00,0x00]<br>
- vgetexpps 291(%rax,%r14,8), %xmm17<br>
-<br>
-// CHECK: vgetexpps (%rcx){1to4}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x42,0x09]<br>
- vgetexpps (%rcx){1to4}, %xmm17<br>
-<br>
-// CHECK: vgetexpps 2032(%rdx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x42,0x4a,0x7f]<br>
- vgetexpps 2032(%rdx), %xmm17<br>
-<br>
-// CHECK: vgetexpps 2048(%rdx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x42,0x8a,0x00,0x08,0x00,0x00]<br>
- vgetexpps 2048(%rdx), %xmm17<br>
-<br>
-// CHECK: vgetexpps -2048(%rdx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x42,0x4a,0x80]<br>
- vgetexpps -2048(%rdx), %xmm17<br>
-<br>
-// CHECK: vgetexpps -2064(%rdx), %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x08,0x42,0x8a,0xf0,0xf7,0xff,0xff]<br>
- vgetexpps -2064(%rdx), %xmm17<br>
-<br>
-// CHECK: vgetexpps 508(%rdx){1to4}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x42,0x4a,0x7f]<br>
- vgetexpps 508(%rdx){1to4}, %xmm17<br>
-<br>
-// CHECK: vgetexpps 512(%rdx){1to4}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x42,0x8a,0x00,0x02,0x00,0x00]<br>
- vgetexpps 512(%rdx){1to4}, %xmm17<br>
-<br>
-// CHECK: vgetexpps -512(%rdx){1to4}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x42,0x4a,0x80]<br>
- vgetexpps -512(%rdx){1to4}, %xmm17<br>
-<br>
-// CHECK: vgetexpps -516(%rdx){1to4}, %xmm17<br>
-// CHECK: encoding: [0x62,0xe2,0x7d,0x18,0x42,0x8a,0xfc,0xfd,0xff,0xff]<br>
- vgetexpps -516(%rdx){1to4}, %xmm17<br>
-<br>
-// CHECK: vgetexpps %ymm29, %ymm30<br>
-// CHECK: encoding: [0x62,0x02,0x7d,0x28,0x42,0xf5]<br>
- vgetexpps %ymm29, %ymm30<br>
-<br>
-// CHECK: vgetexpps %ymm29, %ymm30 {%k6}<br>
-// CHECK: encoding: [0x62,0x02,0x7d,0x2e,0x42,0xf5]<br>
- vgetexpps %ymm29, %ymm30 {%k6}<br>
-<br>
-// CHECK: vgetexpps %ymm29, %ymm30 {%k6} {z}<br>
-// CHECK: encoding: [0x62,0x02,0x7d,0xae,0x42,0xf5]<br>
- vgetexpps %ymm29, %ymm30 {%k6} {z}<br>
-<br>
-// CHECK: vgetexpps (%rcx), %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x42,0x31]<br>
- vgetexpps (%rcx), %ymm30<br>
-<br>
-// CHECK: vgetexpps 291(%rax,%r14,8), %ymm30<br>
-// CHECK: encoding: [0x62,0x22,0x7d,0x28,0x42,0xb4,0xf0,0x23,0x01,0x00,0x00]<br>
- vgetexpps 291(%rax,%r14,8), %ymm30<br>
-<br>
-// CHECK: vgetexpps (%rcx){1to8}, %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x42,0x31]<br>
- vgetexpps (%rcx){1to8}, %ymm30<br>
-<br>
-// CHECK: vgetexpps 4064(%rdx), %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x42,0x72,0x7f]<br>
- vgetexpps 4064(%rdx), %ymm30<br>
-<br>
-// CHECK: vgetexpps 4096(%rdx), %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x42,0xb2,0x00,0x10,0x00,0x00]<br>
- vgetexpps 4096(%rdx), %ymm30<br>
-<br>
-// CHECK: vgetexpps -4096(%rdx), %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x42,0x72,0x80]<br>
- vgetexpps -4096(%rdx), %ymm30<br>
-<br>
-// CHECK: vgetexpps -4128(%rdx), %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x42,0xb2,0xe0,0xef,0xff,0xff]<br>
- vgetexpps -4128(%rdx), %ymm30<br>
-<br>
-// CHECK: vgetexpps 508(%rdx){1to8}, %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x42,0x72,0x7f]<br>
- vgetexpps 508(%rdx){1to8}, %ymm30<br>
-<br>
-// CHECK: vgetexpps 512(%rdx){1to8}, %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x42,0xb2,0x00,0x02,0x00,0x00]<br>
- vgetexpps 512(%rdx){1to8}, %ymm30<br>
-<br>
-// CHECK: vgetexpps -512(%rdx){1to8}, %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x42,0x72,0x80]<br>
- vgetexpps -512(%rdx){1to8}, %ymm30<br>
-<br>
-// CHECK: vgetexpps -516(%rdx){1to8}, %ymm30<br>
-// CHECK: encoding: [0x62,0x62,0x7d,0x38,0x42,0xb2,0xfc,0xfd,0xff,0xff]<br>
- vgetexpps -516(%rdx){1to8}, %ymm30<br>
<br>
<br>
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</blockquote></div>