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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">I saw this mail only now, I’ll take care tomorrow. Please do not revert anything..<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal" style="margin-left:36.0pt;text-indent:-18.0pt;mso-list:l0 level1 lfo1">
<![if !supportLists]><span style="font-family:"Calibri","sans-serif";color:#31849B"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span dir="LTR"></span><b><i><span style="color:#31849B"> Elena<o:p></o:p></span></i></b></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Chandler Carruth [mailto:chandlerc@google.com]
<br>
<b>Sent:</b> Monday, June 01, 2015 13:07<br>
<b>To:</b> Demikhovsky, Elena; llvm-commits@cs.uiuc.edu<br>
<b>Subject:</b> Re: [llvm] r238735 - AVX-512: Implemented vector shuffle lowering for v8i64 and v8f64 types.<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
<div>
<div>
<p class="MsoNormal">On Mon, Jun 1, 2015 at 2:57 AM Elena Demikhovsky <<a href="mailto:elena.demikhovsky@intel.com">elena.demikhovsky@intel.com</a>> wrote:<o:p></o:p></p>
<p class="MsoNormal">Author: delena<br>
Date: Mon Jun 1 04:49:53 2015<br>
New Revision: 238735<br>
<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject-3Frev-3D238735-26view-3Drev&d=AwMGaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=QMA_a8mG0g-OARHIjZy_J2yno6MEet0n-aHZUxI7Ptk&s=qYl5DvzpVbYgUJNPuMu_9utUn6RYdfrU0sBcdyezRW0&e=" target="_blank">
http://llvm.org/viewvc/llvm-project?rev=238735&view=rev</a><br>
Log:<br>
AVX-512: Implemented vector shuffle lowering for v8i64 and v8f64 types.<br>
I removed the vector-shuffle-512-v8.ll, it is auto-generated test, not valid any more.<br>
<br>
<br>
Added:<br>
llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll<br>
Removed:<br>
llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86ISelLowering.cpp-3Frev-3D238735-26r1-3D238734-26r2-3D238735-26view-3Ddiff&d=AwMGaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=QMA_a8mG0g-OARHIjZy_J2yno6MEet0n-aHZUxI7Ptk&s=dhyvVRHFSpz9wQhxatEII57tsMIZQwCZBcwkF3H6NH8&e=" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=238735&r1=238734&r2=238735&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun 1 04:49:53 2015<br>
@@ -6260,6 +6260,42 @@ is128BitLaneRepeatedShuffleMask(MVT VT,<br>
return true;<br>
}<br>
<br>
+/// \brief Test whether a shuffle mask is equivalent within each 256-bit lane.<br>
+///<br>
+/// This checks a shuffle mask to see if it is performing the same<br>
+/// 256-bit lane-relative shuffle in each 256-bit lane. This trivially implies<br>
+/// that it is also not lane-crossing. It may however involve a blend from the<br>
+/// same lane of a second vector.<br>
+///<br>
+/// The specific repeated shuffle mask is populated in \p RepeatedMask, as it is<br>
+/// non-trivial to compute in the face of undef lanes. The representation is<br>
+/// *not* suitable for use with existing 256-bit shuffles as it will contain<br>
+/// entries from both V1 and V2 inputs to the wider mask.<br>
+static bool<br>
+is256BitLaneRepeatedShuffleMask(MVT VT, ArrayRef<int> Mask,<br>
+ SmallVectorImpl<int> &RepeatedMask) {<br>
+ int LaneSize = 256 / VT.getScalarSizeInBits();<br>
+ RepeatedMask.resize(LaneSize, -1);<br>
+ int Size = Mask.size();<br>
+ for (int i = 0; i < Size; ++i) {<br>
+ if (Mask[i] < 0)<br>
+ continue;<br>
+ if ((Mask[i] % Size) / LaneSize != i / LaneSize)<br>
+ // This entry crosses lanes, so there is no way to model this shuffle.<br>
+ return false;<br>
+<br>
+ // Ok, handle the in-lane shuffles by detecting if and when they repeat.<br>
+ if (RepeatedMask[i % LaneSize] == -1)<br>
+ // This is the first non-undef entry in this slot of a 256-bit lane.<br>
+ RepeatedMask[i % LaneSize] =<br>
+ Mask[i] < Size ? Mask[i] % LaneSize : Mask[i] % LaneSize + Size;<br>
+ else if (RepeatedMask[i % LaneSize] + (i / LaneSize) * LaneSize != Mask[i])<br>
+ // Found a mismatch with the repeated mask.<br>
+ return false;<br>
+ }<br>
+ return true;<br>
+}<br>
+<br>
/// \brief Checks whether a shuffle mask is equivalent to an explicit list of<br>
/// arguments.<br>
///<br>
@@ -10054,12 +10090,15 @@ static SDValue lower256BitVectorShuffle(<br>
}<br>
<br>
/// \brief Handle lowering of 8-lane 64-bit floating point shuffles.<br>
-static SDValue lowerV8F64VectorShuffle(SDValue Op, SDValue V1, SDValue V2,<br>
+static SDValue lowerV8X64VectorShuffle(SDValue Op, SDValue V1, SDValue V2,<br>
const X86Subtarget *Subtarget,<br>
SelectionDAG &DAG) {<br>
SDLoc DL(Op);<br>
- assert(V1.getSimpleValueType() == MVT::v8f64 && "Bad operand type!");<br>
- assert(V2.getSimpleValueType() == MVT::v8f64 && "Bad operand type!");<br>
+ MVT VT = Op.getSimpleValueType();<br>
+ assert((V1.getSimpleValueType() == MVT::v8f64 ||<br>
+ V1.getSimpleValueType() == MVT::v8i64) && "Bad operand type!");<br>
+ assert((V2.getSimpleValueType() == MVT::v8f64 ||<br>
+ V2.getSimpleValueType() == MVT::v8i64) && "Bad operand type!");<br>
ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(Op);<br>
ArrayRef<int> Mask = SVOp->getMask();<br>
assert(Mask.size() == 8 && "Unexpected mask size for v8 shuffle!");<br>
@@ -10067,12 +10106,65 @@ static SDValue lowerV8F64VectorShuffle(S<br>
// X86 has dedicated unpack instructions that can handle specific blend<br>
// operations: UNPCKH and UNPCKL.<br>
if (isShuffleEquivalent(V1, V2, Mask, {0, 8, 2, 10, 4, 12, 6, 14}))<br>
- return DAG.getNode(X86ISD::UNPCKL, DL, MVT::v8f64, V1, V2);<br>
+ return DAG.getNode(X86ISD::UNPCKL, DL, VT, V1, V2);<br>
if (isShuffleEquivalent(V1, V2, Mask, {1, 9, 3, 11, 5, 13, 7, 15}))<br>
- return DAG.getNode(X86ISD::UNPCKH, DL, MVT::v8f64, V1, V2);<br>
+ return DAG.getNode(X86ISD::UNPCKH, DL, VT, V1, V2);<br>
<br>
- // FIXME: Implement direct support for this type!<br>
- return splitAndLowerVectorShuffle(DL, MVT::v8f64, V1, V2, Mask, DAG);<br>
+ // VSHUFPD instruction - mask 0/1, 8/9, 2/3, 10/11, 4/5, 12/13, 6/7, 14/15<br>
+ bool ShufpdMask = true;<br>
+ unsigned Immediate = 0;<br>
+ for (int i = 0; i < 8; ++i) {<br>
+ if (Mask[i] < 0)<br>
+ continue;<br>
+ int Val = (i & 6) + 8 * (i & 1);<br>
+ if (Mask[i] < Val || Mask[i] > Val+1) {<br>
+ ShufpdMask = false;<br>
+ break;<br>
+ }<br>
+ Immediate |= (Mask[i]%2) << i;<br>
+ }<br>
+ if (ShufpdMask)<o:p></o:p></p>
<div>
<p class="MsoNormal"><o:p> </o:p></p>
</div>
<div>
<p class="MsoNormal">Why are you only matching specific masks? Especially for things like SHUFP which are actually fully generic shuffles within their lanes. We have loads of really nice generic shuffle lowering logic for 128-bit and 256-bit shuffles that should
be generalized for 512-bit. Adding code to detect single-instruction patterns only and lower just those will take us back to exactly the bad shuffle lowering we had for the other vector types.<o:p></o:p></p>
</div>
<div>
<p class="MsoNormal"><o:p> </o:p></p>
</div>
<div>
<p class="MsoNormal">Please revert this patch and take the approach of finding optimal lowerings for high-level *categories* of incoming shuffle patterns. Please especially re-use the reasonably comprehensive SHUFP matching logic that both 128-bit and 256-bit
vector shuffle lowering uses.<o:p></o:p></p>
</div>
<div>
<p class="MsoNormal"> <o:p></o:p></p>
</div>
<blockquote style="border:none;border-left:solid #CCCCCC 1.0pt;padding:0cm 0cm 0cm 6.0pt;margin-left:4.8pt;margin-right:0cm">
<p class="MsoNormal">+ return DAG.getNode(X86ISD::SHUFP, DL, VT, V1, V2,<br>
+ DAG.getConstant(Immediate, DL, MVT::i8));<br>
+<br>
+ // PERMILPD instruction - mask 0/1, 0/1, 2/3, 2/3, 4/5, 4/5, 6/7, 6/7<br>
+ if (isSingleInputShuffleMask(Mask)) {<br>
+ bool PermilMask = true;<br>
+ unsigned Immediate = 0;<br>
+ for (int i = 0; i < 8; ++i) {<br>
+ if (Mask[i] < 0)<br>
+ continue;<br>
+ int Val = (i & 6);<br>
+ if (Mask[i] < Val || Mask[i] > Val+1) {<br>
+ PermilMask = false;<br>
+ break;<br>
+ }<br>
+ Immediate |= (Mask[i]%2) << i;<br>
+ }<br>
+ if (PermilMask)<br>
+ return DAG.getNode(X86ISD::VPERMILPI, DL, VT, V1,<br>
+ DAG.getConstant(Immediate, DL, MVT::i8));<br>
+<br>
+ SmallVector<int, 4> RepeatedMask;<br>
+ if (is256BitLaneRepeatedShuffleMask(VT, Mask, RepeatedMask)) {<br>
+ unsigned Immediate = 0;<br>
+ for (int i = 0; i < 4; ++i)<br>
+ if (RepeatedMask[i] > 0)<br>
+ Immediate |= (RepeatedMask[i] & 3) << (i*2);<br>
+ return DAG.getNode(X86ISD::VPERMI, DL, VT, V1,<br>
+ DAG.getConstant(Immediate, DL, MVT::i8));<br>
+ }<br>
+ }<br>
+ SDValue VPermMask[8];<br>
+ for (int i = 0; i < 8; ++i)<br>
+ VPermMask[i] = Mask[i] < 0 ? DAG.getUNDEF(MVT::i64)<br>
+ : DAG.getConstant(Mask[i], DL, MVT::i64);<br>
+ SDValue MaskNode = DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i64,<br>
+ VPermMask);<br>
+ if (isSingleInputShuffleMask(Mask))<br>
+ return DAG.getNode(X86ISD::VPERMV, DL, VT, MaskNode, V1);<br>
+<br>
+ return DAG.getNode(X86ISD::VPERMV3, DL, VT, MaskNode, V1, V2);<br>
}<br>
<br>
/// \brief Handle lowering of 16-lane 32-bit floating point shuffles.<br>
@@ -10104,28 +10196,6 @@ static SDValue lowerV16F32VectorShuffle(<br>
return splitAndLowerVectorShuffle(DL, MVT::v16f32, V1, V2, Mask, DAG);<br>
}<br>
<br>
-/// \brief Handle lowering of 8-lane 64-bit integer shuffles.<br>
-static SDValue lowerV8I64VectorShuffle(SDValue Op, SDValue V1, SDValue V2,<br>
- const X86Subtarget *Subtarget,<br>
- SelectionDAG &DAG) {<br>
- SDLoc DL(Op);<br>
- assert(V1.getSimpleValueType() == MVT::v8i64 && "Bad operand type!");<br>
- assert(V2.getSimpleValueType() == MVT::v8i64 && "Bad operand type!");<br>
- ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(Op);<br>
- ArrayRef<int> Mask = SVOp->getMask();<br>
- assert(Mask.size() == 8 && "Unexpected mask size for v8 shuffle!");<br>
-<br>
- // X86 has dedicated unpack instructions that can handle specific blend<br>
- // operations: UNPCKH and UNPCKL.<br>
- if (isShuffleEquivalent(V1, V2, Mask, {0, 8, 2, 10, 4, 12, 6, 14}))<br>
- return DAG.getNode(X86ISD::UNPCKL, DL, MVT::v8i64, V1, V2);<br>
- if (isShuffleEquivalent(V1, V2, Mask, {1, 9, 3, 11, 5, 13, 7, 15}))<br>
- return DAG.getNode(X86ISD::UNPCKH, DL, MVT::v8i64, V1, V2);<br>
-<br>
- // FIXME: Implement direct support for this type!<br>
- return splitAndLowerVectorShuffle(DL, MVT::v8i64, V1, V2, Mask, DAG);<br>
-}<br>
-<br>
/// \brief Handle lowering of 16-lane 32-bit integer shuffles.<br>
static SDValue lowerV16I32VectorShuffle(SDValue Op, SDValue V1, SDValue V2,<br>
const X86Subtarget *Subtarget,<br>
@@ -10212,11 +10282,10 @@ static SDValue lower512BitVectorShuffle(<br>
// the requisite ISA extensions for that element type are available.<br>
switch (VT.SimpleTy) {<br>
case MVT::v8f64:<br>
- return lowerV8F64VectorShuffle(Op, V1, V2, Subtarget, DAG);<br>
+ case MVT::v8i64:<br>
+ return lowerV8X64VectorShuffle(Op, V1, V2, Subtarget, DAG);<br>
case MVT::v16f32:<br>
return lowerV16F32VectorShuffle(Op, V1, V2, Subtarget, DAG);<br>
- case MVT::v8i64:<br>
- return lowerV8I64VectorShuffle(Op, V1, V2, Subtarget, DAG);<br>
case MVT::v16i32:<br>
return lowerV16I32VectorShuffle(Op, V1, V2, Subtarget, DAG);<br>
case MVT::v32i16:<br>
@@ -20482,7 +20551,7 @@ static SmallVector<int, 4> getPSHUFShuff<br>
#ifndef NDEBUG<br>
for (int i = 1, NumLanes = VT.getSizeInBits() / 128; i < NumLanes; ++i)<br>
for (int j = 0; j < LaneElts; ++j)<br>
- assert(Mask[j] == Mask[i * LaneElts + j] - LaneElts &&<br>
+ assert(Mask[j] == Mask[i * LaneElts + j] - (LaneElts * i) &&<br>
"Mask doesn't repeat in high 128-bit lanes!");<br>
#endif<br>
Mask.resize(LaneElts);<br>
<br>
Added: llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_X86_avx512-2Dshuffle.ll-3Frev-3D238735-26view-3Dauto&d=AwMGaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=QMA_a8mG0g-OARHIjZy_J2yno6MEet0n-aHZUxI7Ptk&s=TSW1MAubIA710HhUttblBjgJN190BZCV0pU0ocDTFuI&e=" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll?rev=238735&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll (added)<br>
+++ llvm/trunk/test/CodeGen/X86/avx512-shuffle.ll Mon Jun 1 04:49:53 2015<br>
@@ -0,0 +1,98 @@<br>
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s<br>
+<br>
+; CHECK-LABEL: test1:<br>
+; CHECK: vpermps<br>
+; CHECK: ret<br>
+define <16 x float> @test1(<16 x float> %a) nounwind {<br>
+ %c = shufflevector <16 x float> %a, <16 x float> undef, <16 x i32> <i32 2, i32 5, i32 undef, i32 undef, i32 7, i32 undef, i32 10, i32 1, i32 0, i32 5, i32 undef, i32 4, i32 7, i32 undef, i32 10, i32 1><br>
+ ret <16 x float> %c<br>
+}<br>
+<br>
+; CHECK-LABEL: test2:<br>
+; CHECK: vpermd<br>
+; CHECK: ret<br>
+define <16 x i32> @test2(<16 x i32> %a) nounwind {<br>
+ %c = shufflevector <16 x i32> %a, <16 x i32> undef, <16 x i32> <i32 2, i32 5, i32 undef, i32 undef, i32 7, i32 undef, i32 10, i32 1, i32 0, i32 5, i32 undef, i32 4, i32 7, i32 undef, i32 10, i32 1><br>
+ ret <16 x i32> %c<br>
+}<br>
+<br>
+; CHECK-LABEL: test3:<br>
+; CHECK: vpermq<br>
+; CHECK: ret<br>
+define <8 x i64> @test3(<8 x i64> %a) nounwind {<br>
+ %c = shufflevector <8 x i64> %a, <8 x i64> undef, <8 x i32> <i32 2, i32 5, i32 1, i32 undef, i32 7, i32 undef, i32 3, i32 1><br>
+ ret <8 x i64> %c<br>
+}<br>
+<br>
+; CHECK-LABEL: test4:<br>
+; CHECK: vpermpd<br>
+; CHECK: ret<br>
+define <8 x double> @test4(<8 x double> %a) nounwind {<br>
+ %c = shufflevector <8 x double> %a, <8 x double> undef, <8 x i32> <i32 1, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef><br>
+ ret <8 x double> %c<br>
+}<br>
+<br>
+; CHECK-LABEL: test5:<br>
+; CHECK: vpermt2pd<br>
+; CHECK: ret<br>
+define <8 x double> @test5(<8 x double> %a, <8 x double> %b) nounwind {<br>
+ %c = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 2, i32 8, i32 0, i32 1, i32 6, i32 10, i32 4, i32 5><br>
+ ret <8 x double> %c<br>
+}<br>
+<br>
+; CHECK-LABEL: test6:<br>
+; CHECK: vpermq $30<br>
+; CHECK: ret<br>
+define <8 x i64> @test6(<8 x i64> %a) nounwind {<br>
+ %c = shufflevector <8 x i64> %a, <8 x i64> undef, <8 x i32> <i32 2, i32 3, i32 1, i32 0, i32 6, i32 7, i32 5, i32 4><br>
+ ret <8 x i64> %c<br>
+}<br>
+<br>
+; CHECK-LABEL: test7:<br>
+; CHECK: vpermt2q<br>
+; CHECK: ret<br>
+define <8 x i64> @test7(<8 x i64> %a, <8 x i64> %b) nounwind {<br>
+ %c = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 2, i32 8, i32 0, i32 1, i32 6, i32 10, i32 4, i32 5><br>
+ ret <8 x i64> %c<br>
+}<br>
+<br>
+; CHECK-LABEL: test14<br>
+; CHECK: vpermilpd $203, %zmm<br>
+; CHECK: ret<br>
+define <8 x double> @test14(<8 x double> %a) {<br>
+ %b = shufflevector <8 x double> %a, <8 x double> undef, <8 x i32><i32 1, i32 1, i32 2, i32 3, i32 4, i32 4, i32 7, i32 7><br>
+ ret <8 x double> %b<br>
+}<br>
+<br>
+; CHECK-LABEL: test17<br>
+; CHECK: vshufpd $19, %zmm1, %zmm0<br>
+; CHECK: ret<br>
+define <8 x double> @test17(<8 x double> %a, <8 x double> %b) nounwind {<br>
+ %c = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 9, i32 2, i32 10, i32 5, i32 undef, i32 undef, i32 undef><br>
+ ret <8 x double> %c<br>
+}<br>
+<br>
+; CHECK-LABEL: test20<br>
+; CHECK: vpunpckhqdq %zmm<br>
+; CHECK: ret<br>
+define <8 x i64> @test20(<8 x i64> %a, <8 x i64> %c) {<br>
+ %b = shufflevector <8 x i64> %a, <8 x i64> %c, <8 x i32><i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15><br>
+ ret <8 x i64> %b<br>
+}<br>
+<br>
+; CHECK-LABEL: test21<br>
+; CHECK: vbroadcastsd %xmm0, %zmm<br>
+; CHECK: ret<br>
+define <8 x double> @test21(<8 x double> %a, <8 x double> %b) {<br>
+ %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0><br>
+ ret <8 x double> %shuffle<br>
+}<br>
+<br>
+; CHECK-LABEL: test22<br>
+; CHECK: vpbroadcastq %xmm0, %zmm<br>
+; CHECK: ret<br>
+define <8 x i64> @test22(<8 x i64> %a, <8 x i64> %b) {<br>
+ %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0><br>
+ ret <8 x i64> %shuffle<br>
+}<br>
+<br>
<br>
Removed: llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll<br>
URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_X86_vector-2Dshuffle-2D512-2Dv8.ll-3Frev-3D238734-26view-3Dauto&d=AwMGaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=QMA_a8mG0g-OARHIjZy_J2yno6MEet0n-aHZUxI7Ptk&s=7c-T7o9kNpbtFUNsZvYvzeqsu0xtdqq0xnr1lN6Z16M&e=" target="_blank">
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll?rev=238734&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-512-v8.ll (removed)<br>
@@ -1,1452 +0,0 @@<br>
-; RUN: llc < %s -mcpu=x86-64 -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512F<br>
-; RUN: llc < %s -mcpu=x86-64 -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW<br>
-<br>
-target triple = "x86_64-unknown-unknown"<br>
-<br>
-define <8 x double> @shuffle_v8f64_00000000(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00000000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00000010(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00000010:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm1<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,1,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00000200(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00000200:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm1<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00003000(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00003000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm1<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,0,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00040000(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00040000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vbroadcastsd %xmm1, %ymm1<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm0<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm1 = ymm0[0,1,2],ymm1[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00500000(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00500000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm1 = ymm0[0],ymm1[1],ymm0[2,3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[0,0,1,0]<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_06000000(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_06000000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm1 = ymm0[0,1],ymm1[2],ymm0[3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[0,2,0,0]<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 6, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_70000000(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_70000000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm1 = ymm0[0,1,2],ymm1[3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[3,0,0,0]<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_01014545(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_01014545:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1<br>
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00112233(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00112233:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[0,0,1,1]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,2,3,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00001111(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00001111:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm1<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[1,1,1,1]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_81a3c5e7(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_81a3c5e7:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm2<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm3<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm3[0],ymm2[1],ymm3[2],ymm2[3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2],ymm0[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_08080808(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_08080808:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0<br>
-; ALL-NEXT: vbroadcastsd %xmm1, %ymm1<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 0, i32 8, i32 0, i32 8, i32 0, i32 8><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_08084c4c(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_08084c4c:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm2<br>
-; ALL-NEXT: vinsertf128 $1, %xmm2, %ymm2, %ymm2<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm3<br>
-; ALL-NEXT: vbroadcastsd %xmm3, %ymm3<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm2[0],ymm3[1],ymm2[2],ymm3[3]<br>
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0<br>
-; ALL-NEXT: vbroadcastsd %xmm1, %ymm1<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 0, i32 8, i32 4, i32 12, i32 4, i32 12><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_8823cc67(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_8823cc67:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm2<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm3<br>
-; ALL-NEXT: vbroadcastsd %xmm3, %ymm3<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3]<br>
-; ALL-NEXT: vbroadcastsd %xmm1, %ymm1<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 8, i32 8, i32 2, i32 3, i32 12, i32 12, i32 6, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_9832dc76(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_9832dc76:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm1[0,1],ymm0[2,3]<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm2 = ymm2[1,0,3,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm1<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3]<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm2, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 9, i32 8, i32 3, i32 2, i32 13, i32 12, i32 7, i32 6><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_9810dc54(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_9810dc54:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm2<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm2 = ymm2[1,0,3,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm1<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm2, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 9, i32 8, i32 1, i32 0, i32 13, i32 12, i32 5, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_08194c5d(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_08194c5d:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm2<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm2 = ymm2[0,0,2,1]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm3<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm3 = ymm3[0,1,1,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm3[0],ymm2[1],ymm3[2],ymm2[3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[0,0,2,1]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,1,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_2a3b6e7f(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_2a3b6e7f:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm2<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm2 = ymm2[0,2,2,3]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm3<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm3 = ymm3[2,1,3,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm3[0],ymm2[1],ymm3[2],ymm2[3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,1,3,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_08192a3b(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_08192a3b:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm2 = ymm1[0,2,2,3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm3 = ymm0[2,1,3,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm3[0],ymm2[1],ymm3[2],ymm2[3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[0,0,2,1]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,1,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_08991abb(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_08991abb:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm2 = ymm1[0,0,1,1]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm0[0],ymm2[1,2,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2,3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[1,2,3,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm2, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 8, i32 9, i32 9, i32 1, i32 10, i32 11, i32 11><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_091b2d3f(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_091b2d3f:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm2<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm3 = ymm0[2,1,3,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm3[0],ymm2[1],ymm3[2],ymm2[3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,1,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 9, i32 1, i32 11, i32 2, i32 13, i32 3, i32 15><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_09ab1def(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_09ab1def:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm2<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm3 = ymm0[1,0,2,2]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm3[0],ymm2[1,2,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 1, i32 13, i32 14, i32 15><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00014445(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00014445:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[0,0,0,1]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,0,1]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 1, i32 4, i32 4, i32 4, i32 5><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00204464(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00204464:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[0,0,2,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,2,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 0, i32 4, i32 4, i32 6, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_03004744(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_03004744:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[0,3,0,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,3,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 7, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_10005444(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_10005444:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[1,0,0,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[1,0,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_22006644(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_22006644:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[2,2,0,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,2,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 2, i32 2, i32 0, i32 0, i32 6, i32 6, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_33307774(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_33307774:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[3,3,3,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,3,3,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 3, i32 3, i32 3, i32 0, i32 7, i32 7, i32 7, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_32107654(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_32107654:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[3,2,1,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,2,1,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00234467(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00234467:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[0,0,2,3]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[0,0,2,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 4, i32 4, i32 6, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00224466(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00224466:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vmovddup {{.*#+}} ymm1 = ymm0[0,0,2,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_10325476(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_10325476:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[1,0,3,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_11335577(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_11335577:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[1,1,3,3]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,1,3,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_10235467(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_10235467:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[1,0,2,3]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 0, i32 2, i32 3, i32 5, i32 4, i32 6, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_10225466(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_10225466:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[1,0,2,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 0, i32 2, i32 2, i32 5, i32 4, i32 6, i32 6><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00015444(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00015444:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[0,0,0,1]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[1,0,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 1, i32 5, i32 4, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00204644(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00204644:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[0,0,2,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 0, i32 4, i32 6, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_03004474(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_03004474:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[0,3,0,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,0,3,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 4, i32 7, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_10004444(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_10004444:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[1,0,0,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_22006446(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_22006446:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[2,2,0,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,0,0,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 2, i32 2, i32 0, i32 0, i32 6, i32 4, i32 4, i32 6><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_33307474(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_33307474:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[3,3,3,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,0,3,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 3, i32 3, i32 3, i32 0, i32 7, i32 4, i32 7, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_32104567(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_32104567:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm0[3,2,1,0]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 4, i32 5, i32 6, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00236744(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00236744:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[0,0,2,3]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,3,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 6, i32 7, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00226644(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00226644:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vmovddup {{.*#+}} ymm1 = ymm0[0,0,2,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,2,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 6, i32 6, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_10324567(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_10324567:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[1,0,3,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_11334567(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_11334567:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[1,1,3,3]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 4, i32 5, i32 6, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_01235467(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_01235467:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm1[1,0,2,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 6, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_01235466(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_01235466:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm1[1,0,2,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 6, i32 6><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_002u6u44(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_002u6u44:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vmovddup {{.*#+}} ymm1 = ymm0[0,0,2,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,1,0,0]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 undef, i32 6, i32 undef, i32 4, i32 4><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_00uu66uu(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_00uu66uu:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm1<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[2,2,2,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 undef, i32 undef, i32 6, i32 6, i32 undef, i32 undef><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_103245uu(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_103245uu:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[1,0,3,2]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 4, i32 5, i32 undef, i32 undef><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_1133uu67(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_1133uu67:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm0[1,1,3,3]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 undef, i32 undef, i32 6, i32 7><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_0uu354uu(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_0uu354uu:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpermilpd {{.*#+}} ymm1 = ymm1[1,0,2,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 undef, i32 undef, i32 3, i32 5, i32 4, i32 undef, i32 undef><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_uuu3uu66(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_uuu3uu66:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vmovddup {{.*#+}} ymm1 = ymm1[0,0,2,2]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 6, i32 6><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_c348cda0(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_c348cda0:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm2<br>
-; ALL-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm2[0,1]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm3<br>
-; ALL-NEXT: vbroadcastsd %xmm1, %ymm4<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm4 = ymm3[0,1,2],ymm4[3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm2 = ymm4[0],ymm2[1,2],ymm4[3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm1 = ymm3[0,1],ymm1[2],ymm3[3]<br>
-; ALL-NEXT: vbroadcastsd %xmm0, %ymm0<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm0, %zmm2, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 12, i32 3, i32 4, i32 8, i32 12, i32 13, i32 10, i32 0><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x double> @shuffle_v8f64_f511235a(<8 x double> %a, <8 x double> %b) {<br>
-; ALL-LABEL: shuffle_v8f64_f511235a:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm0, %ymm2<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm3 = ymm0[0],ymm2[1],ymm0[2,3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm3 = ymm3[2,3,1,3]<br>
-; ALL-NEXT: vmovddup {{.*#+}} ymm4 = ymm1[0,0,2,2]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm3 = ymm3[0,1,2],ymm4[3]<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,1,1]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2,3]<br>
-; ALL-NEXT: vextractf64x4 $1, %zmm1, %ymm1<br>
-; ALL-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[3,1,2,3]<br>
-; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3]<br>
-; ALL-NEXT: vinsertf64x4 $1, %ymm3, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 15, i32 5, i32 1, i32 1, i32 2, i32 3, i32 5, i32 10><br>
- ret <8 x double> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00000000(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00000000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00000010(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00000010:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm1<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,1,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00000200(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00000200:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm1<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00003000(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00003000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm1<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,0,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00040000(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00040000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpbroadcastq %xmm1, %ymm1<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm0<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3,4,5],ymm1[6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00500000(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00500000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm1 = ymm0[0,1],ymm1[2,3],ymm0[4,5,6,7]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,0,1,0]<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm0<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_06000000(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_06000000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],ymm1[4,5],ymm0[6,7]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,0,0]<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm0<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 6, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_70000000(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_70000000:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3,4,5],ymm1[6,7]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm1[3,0,0,0]<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm0<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_01014545(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_01014545:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vinserti128 $1, %xmm1, %ymm1, %ymm1<br>
-; ALL-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00112233(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00112233:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,0,1,1]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,2,3,3]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00001111(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00001111:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm1<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,1,1,1]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_81a3c5e7(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_81a3c5e7:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm2<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm3<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i32 12, i32 5, i32 14, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_08080808(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_08080808:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0<br>
-; ALL-NEXT: vpbroadcastq %xmm1, %ymm1<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 8, i32 0, i32 8, i32 0, i32 8, i32 0, i32 8><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_08084c4c(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_08084c4c:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm2<br>
-; ALL-NEXT: vinserti128 $1, %xmm2, %ymm2, %ymm2<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm3<br>
-; ALL-NEXT: vpbroadcastq %xmm3, %ymm3<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm3[2,3],ymm2[4,5],ymm3[6,7]<br>
-; ALL-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0<br>
-; ALL-NEXT: vpbroadcastq %xmm1, %ymm1<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 8, i32 0, i32 8, i32 4, i32 12, i32 4, i32 12><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_8823cc67(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_8823cc67:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm2<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm3<br>
-; ALL-NEXT: vpbroadcastq %xmm3, %ymm3<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7]<br>
-; ALL-NEXT: vpbroadcastq %xmm1, %ymm1<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 8, i32 8, i32 2, i32 3, i32 12, i32 12, i32 6, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_9832dc76(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_9832dc76:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm1[0,1,2,3],ymm0[4,5,6,7]<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[2,3,0,1,6,7,4,5]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm1<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[2,3,0,1,6,7,4,5]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 9, i32 8, i32 3, i32 2, i32 13, i32 12, i32 7, i32 6><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_9810dc54(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_9810dc54:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm2<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[2,3,0,1,6,7,4,5]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm1<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[2,3,0,1,6,7,4,5]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 9, i32 8, i32 1, i32 0, i32 13, i32 12, i32 5, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_08194c5d(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_08194c5d:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm2<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm3<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,1,1,3]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,0,2,1]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,1,3]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_2a3b6e7f(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_2a3b6e7f:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm2<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm3<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,1,3,3]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_08192a3b(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_08192a3b:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm2 = ymm1[0,2,2,3]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm3 = ymm0[2,1,3,3]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,0,2,1]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,1,3]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_08991abb(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_08991abb:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm2 = ymm1[0,0,1,1]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm0[0,1],ymm2[2,3,4,5,6,7]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5,6,7]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,2,3,3]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm2, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 8, i32 9, i32 9, i32 1, i32 10, i32 11, i32 11><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_091b2d3f(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_091b2d3f:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm2<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm3 = ymm0[2,1,3,3]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,1,3]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 9, i32 1, i32 11, i32 2, i32 13, i32 3, i32 15><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_09ab1def(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_09ab1def:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm1, %ymm2<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm3 = ymm0[2,3,2,3,6,7,6,7]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3,4,5,6,7]<br>
-; ALL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3,4,5,6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 1, i32 13, i32 14, i32 15><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00014445(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00014445:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,0,0,1]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,0,1]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 1, i32 4, i32 4, i32 4, i32 5><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00204464(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00204464:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,0,2,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 0, i32 4, i32 4, i32 6, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_03004744(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_03004744:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,3,0,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 7, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_10005444(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_10005444:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[1,0,0,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,0,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 1, i32 0, i32 0, i32 0, i32 5, i32 4, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_22006644(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_22006644:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[2,2,0,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,2,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 2, i32 2, i32 0, i32 0, i32 6, i32 6, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_33307774(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_33307774:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[3,3,3,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,3,3,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 3, i32 3, i32 3, i32 0, i32 7, i32 7, i32 7, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_32107654(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_32107654:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[3,2,1,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,2,1,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00234467(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00234467:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,0,2,3]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,3]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 4, i32 4, i32 6, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00224466(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00224466:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[0,1,0,1,4,5,4,5]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,1,0,1,4,5,4,5]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_10325476(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_10325476:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[2,3,0,1,6,7,4,5]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[2,3,0,1,6,7,4,5]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_11335577(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_11335577:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[2,3,2,3,6,7,6,7]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[2,3,2,3,6,7,6,7]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_10235467(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_10235467:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[1,0,2,3]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,0,2,3]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 1, i32 0, i32 2, i32 3, i32 5, i32 4, i32 6, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_10225466(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_10225466:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[1,0,2,2]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,0,2,2]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 1, i32 0, i32 2, i32 2, i32 5, i32 4, i32 6, i32 6><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00015444(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00015444:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,0,0,1]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,0,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 1, i32 5, i32 4, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00204644(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00204644:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,0,2,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 0, i32 4, i32 6, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_03004474(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_03004474:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,3,0,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,3,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 3, i32 0, i32 0, i32 4, i32 4, i32 7, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_10004444(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_10004444:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[1,0,0,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpbroadcastq %xmm0, %ymm0<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 1, i32 0, i32 0, i32 0, i32 4, i32 4, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_22006446(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_22006446:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[2,2,0,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,0,0,2]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 2, i32 2, i32 0, i32 0, i32 6, i32 4, i32 4, i32 6><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_33307474(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_33307474:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[3,3,3,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,0,3,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 3, i32 3, i32 3, i32 0, i32 7, i32 4, i32 7, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_32104567(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_32104567:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[3,2,1,0]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 4, i32 5, i32 6, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00236744(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00236744:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm0[0,0,2,3]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,3,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 3, i32 6, i32 7, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00226644(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00226644:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[0,1,0,1,4,5,4,5]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,2,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 6, i32 6, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_10324567(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_10324567:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[2,3,0,1,6,7,4,5]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 1, i32 0, i32 3, i32 2, i32 4, i32 5, i32 6, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_11334567(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_11334567:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[2,3,2,3,6,7,6,7]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 4, i32 5, i32 6, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_01235467(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_01235467:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,0,2,3]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 6, i32 7><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_01235466(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_01235466:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm1<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,0,2,2]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 6, i32 6><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_002u6u44(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_002u6u44:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpshufd {{.*#+}} ymm1 = ymm0[0,1,0,1,4,5,4,5]<br>
-; ALL-NEXT: vextracti64x4 $1, %zmm0, %ymm0<br>
-; ALL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,0,0]<br>
-; ALL-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0<br>
-; ALL-NEXT: retq<br>
- %shuffle = shufflevector <8 x i64> %a, <8 x i64> %b, <8 x i32> <i32 0, i32 0, i32 2, i32 undef, i32 6, i32 undef, i32 4, i32 4><br>
- ret <8 x i64> %shuffle<br>
-}<br>
-<br>
-define <8 x i64> @shuffle_v8i64_00uu66uu(<8 x i64> %a, <8 x i64> %b) {<br>
-; ALL-LABEL: shuffle_v8i64_00uu66uu:<br>
-; ALL: # BB#0:<br>
-; ALL-NEXT: vpbroadc<o:p></o:p></p>
</blockquote>
</div>
</div>
</div>
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