<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Ping.<div class=""><br class=""></div><div class="">Chandler, this is a pretty bad layering violation. I’d really like to come up with a good solution for fixing it.</div><div class=""><br class=""></div><div class="">And i know you’re interested in this kind of thing because you said so yesterday ;) (<a href="http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-May/086127.html" class="">http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-May/086127.html</a>)</div><div class=""><br class=""></div><div class="">Cheers,</div><div class="">Pete<br class=""><div class=""><div><blockquote type="cite" class=""><div class="">On May 14, 2015, at 11:03 AM, Pete Cooper <<a href="mailto:peter_cooper@apple.com" class="">peter_cooper@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="">Ping<br class=""><blockquote type="cite" class="">On Apr 20, 2015, at 3:18 PM, Pete Cooper <<a href="mailto:peter_cooper@apple.com" class="">peter_cooper@apple.com</a>> wrote:<br class=""><br class="">Hi Chandler<br class=""><br class="">Sorry to resurrect an old thread.<br class=""><br class="">X86ShuffleDecode.h is great in that it keeps all of shuffle decoding in a single place. However, as its included by X86InstComments.cpp which is an MC level file, we now have libCore linked in to llvm-mc.<br class=""><br class="">Although it breaks the ‘nice to have it all in one place comment i just made’, i can’t think of any other solution than to split this file in to CodeGen shuffle decoding and MC shuffle decoding. Perhaps having the CodeGen one include the MC one to avoid #include churn. That would also involve actually breaking the X86Utils library in to probably X86CodeGenUtils and X86MCUtils.<br class=""><br class="">Can you think of any better solutions? I’m happy to do the work if we can come up with the right answer.<br class=""><br class="">Cheers,<br class="">Pete<br class=""><blockquote type="cite" class="">On Jul 25, 2014, at 4:47 PM, Chandler Carruth <<a href="mailto:chandlerc@gmail.com" class="">chandlerc@gmail.com</a>> wrote:<br class=""><br class="">Author: chandlerc<br class="">Date: Fri Jul 25 18:47:11 2014<br class="">New Revision: 213986<br class=""><br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject-3Frev-3D213986-26view-3Drev&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=xbH8d62RqOQiXpUYSInKnixKOUOfShA0wLU6KZi9Oqo&s=WY407Y5kviiZwPCBkvjPwEqvfwXAA2Y10FTqieFr1WI&e=" class="">http://llvm.org/viewvc/llvm-project?rev=213986&view=rev</a><br class="">Log:<br class="">[x86] Teach the X86 backend to print shuffle comments for PSHUFB<br class="">instructions which happen to have a constant mask.<br class=""><br class="">Currently, this only handles a very narrow set of cases, but those<br class="">happen to be the cases that I care about for testing shuffles sanely.<br class="">This is a bit trickier than other shuffle instructions because we're<br class="">decoding constants out of the constant pool. The current MC layer makes<br class="">it completely impossible to inspect a constant pool entry, so we have to<br class="">do it at the MI level and attach the comment to the streamer on its way<br class="">out. So no joy for disassembling, but it does make test cases and asm<br class="">dumps *much* nicer.<br class=""><br class="">Sorry for no test cases, but it didn't really seem that valuable to go<br class="">trolling through existing old test cases and updating them. I'll have<br class="">lots of testing of this in the upcoming patch for SSSE3 emission in the<br class="">new vector shuffle lowering code paths.<br class=""><br class="">Modified:<br class=""> llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.cpp<br class=""> llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.h<br class=""> llvm/trunk/lib/Target/X86/X86MCInstLower.cpp<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.cpp<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_Utils_X86ShuffleDecode.cpp-3Frev-3D213986-26r1-3D213985-26r2-3D213986-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=xbH8d62RqOQiXpUYSInKnixKOUOfShA0wLU6KZi9Oqo&s=iOwtSUWjUS67609x31Uow8Q2q6uTaiP_msZc1HY5q50&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.cpp?rev=213986&r1=213985&r2=213986&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.cpp Fri Jul 25 18:47:11 2014<br class="">@@ -13,6 +13,7 @@<br class="">//===----------------------------------------------------------------------===//<br class=""><br class="">#include "X86ShuffleDecode.h"<br class="">+#include "llvm/IR/Constants.h"<br class="">#include "llvm/CodeGen/MachineValueType.h"<br class=""><br class="">//===----------------------------------------------------------------------===//<br class="">@@ -207,6 +208,38 @@ void DecodeVPERM2X128Mask(MVT VT, unsign<br class=""> }<br class="">}<br class=""><br class="">+/// \brief Decode PSHUFB masks stored in an LLVM Constant.<br class="">+void DecodePSHUFBMask(const ConstantDataSequential *C,<br class="">+ SmallVectorImpl<int> &ShuffleMask) {<br class="">+ Type *MaskTy = C->getType();<br class="">+ assert(MaskTy->isVectorTy() && "Expected a vector constant mask!");<br class="">+ Type *EltTy = MaskTy->getVectorElementType();<br class="">+ assert(EltTy->isIntegerTy(8) && "Expected i8 constant mask elements!");<br class="">+ int NumElements = MaskTy->getVectorNumElements();<br class="">+ // FIXME: Add support for AVX-512.<br class="">+ assert((NumElements == 16 || NumElements == 32) &&<br class="">+ "Only 128-bit and 256-bit vectors supported!");<br class="">+ assert((unsigned)NumElements == C->getNumElements() &&<br class="">+ "Constant mask has a different number of elements!");<br class="">+<br class="">+ ShuffleMask.reserve(NumElements);<br class="">+ for (int i = 0; i < NumElements; ++i) {<br class="">+ // For AVX vectors with 32 bytes the base of the shuffle is the half of the<br class="">+ // vector we're inside.<br class="">+ int Base = i < 16 ? 0 : 16;<br class="">+ uint64_t Element = C->getElementAsInteger(i);<br class="">+ // If the high bit (7) of the byte is set, the element is zeroed.<br class="">+ if (Element & (1 << 7))<br class="">+ ShuffleMask.push_back(SM_SentinelZero);<br class="">+ else {<br class="">+ int Index = Base + Element;<br class="">+ assert((Index >= 0 && Index < NumElements) ||<br class="">+ "Out of bounds shuffle index for pshub instruction!");<br class="">+ ShuffleMask.push_back(Index);<br class="">+ }<br class="">+ }<br class="">+}<br class="">+<br class="">/// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.<br class="">/// No VT provided since it only works on 256-bit, 4 element vectors.<br class="">void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.h<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_Utils_X86ShuffleDecode.h-3Frev-3D213986-26r1-3D213985-26r2-3D213986-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=xbH8d62RqOQiXpUYSInKnixKOUOfShA0wLU6KZi9Oqo&s=5KqIXKoWWdQuZLWTUp-BzIoZaWXrLudmz7CArUKN9Ks&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.h?rev=213986&r1=213985&r2=213986&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.h (original)<br class="">+++ llvm/trunk/lib/Target/X86/Utils/X86ShuffleDecode.h Fri Jul 25 18:47:11 2014<br class="">@@ -22,6 +22,7 @@<br class="">//===----------------------------------------------------------------------===//<br class=""><br class="">namespace llvm {<br class="">+class ConstantDataSequential;<br class="">class MVT;<br class=""><br class="">enum {<br class="">@@ -59,6 +60,8 @@ void DecodeUNPCKHMask(MVT VT, SmallVecto<br class="">/// different datatypes and vector widths.<br class="">void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);<br class=""><br class="">+void DecodePSHUFBMask(const ConstantDataSequential *C,<br class="">+ SmallVectorImpl<int> &ShuffleMask);<br class=""><br class="">void DecodeVPERM2X128Mask(MVT VT, unsigned Imm,<br class=""> SmallVectorImpl<int> &ShuffleMask);<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86MCInstLower.cpp<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86MCInstLower.cpp-3Frev-3D213986-26r1-3D213985-26r2-3D213986-26view-3Ddiff&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=xbH8d62RqOQiXpUYSInKnixKOUOfShA0wLU6KZi9Oqo&s=E2-8mrMsXL7uzW0xWGu_cGPq5D7K5voXmUM2p_2R_cw&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCInstLower.cpp?rev=213986&r1=213985&r2=213986&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86MCInstLower.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86MCInstLower.cpp Fri Jul 25 18:47:11 2014<br class="">@@ -16,8 +16,11 @@<br class="">#include "X86RegisterInfo.h"<br class="">#include "InstPrinter/X86ATTInstPrinter.h"<br class="">#include "MCTargetDesc/X86BaseInfo.h"<br class="">+#include "Utils/X86ShuffleDecode.h"<br class="">#include "llvm/ADT/SmallString.h"<br class="">#include "llvm/CodeGen/MachineFunction.h"<br class="">+#include "llvm/CodeGen/MachineConstantPool.h"<br class="">+#include "llvm/CodeGen/MachineOperand.h"<br class="">#include "llvm/CodeGen/MachineModuleInfoImpls.h"<br class="">#include "llvm/CodeGen/StackMaps.h"<br class="">#include "llvm/IR/DataLayout.h"<br class="">@@ -963,6 +966,83 @@ void X86AsmPrinter::EmitInstruction(cons<br class=""> case X86::SEH_EndPrologue:<br class=""> OutStreamer.EmitWinCFIEndProlog();<br class=""> return;<br class="">+<br class="">+ case X86::PSHUFBrm:<br class="">+ // Lower PSHUFB normally but add a comment if we can find a constant<br class="">+ // shuffle mask. We won't be able to do this at the MC layer because the<br class="">+ // mask isn't an immediate.<br class="">+ std::string Comment;<br class="">+ raw_string_ostream CS(Comment);<br class="">+ SmallVector<int, 16> Mask;<br class="">+<br class="">+ assert(MI->getNumOperands() == 7 &&<br class="">+ "Wrong number of operansd for PSHUFBrm");<br class="">+ const MachineOperand &DstOp = MI->getOperand(0);<br class="">+ const MachineOperand &SrcOp = MI->getOperand(1);<br class="">+ const MachineOperand &MaskOp = MI->getOperand(5);<br class="">+<br class="">+ // Compute the name for a register. This is really goofy because we have<br class="">+ // multiple instruction printers that could (in theory) use different<br class="">+ // names. Fortunately most people use the ATT style (outside of Windows)<br class="">+ // and they actually agree on register naming here. Ultimately, this is<br class="">+ // a comment, and so its OK if it isn't perfect.<br class="">+ auto GetRegisterName = [](unsigned RegNum) -> StringRef {<br class="">+ return X86ATTInstPrinter::getRegisterName(RegNum);<br class="">+ };<br class="">+<br class="">+ StringRef DstName = DstOp.isReg() ? GetRegisterName(DstOp.getReg()) : "mem";<br class="">+ StringRef SrcName = SrcOp.isReg() ? GetRegisterName(SrcOp.getReg()) : "mem";<br class="">+ CS << DstName << " = ";<br class="">+<br class="">+ if (MaskOp.isCPI()) {<br class="">+ ArrayRef<MachineConstantPoolEntry> Constants =<br class="">+ MI->getParent()->getParent()->getConstantPool()->getConstants();<br class="">+ const MachineConstantPoolEntry &MaskConstantEntry =<br class="">+ Constants[MI->getOperand(5).getIndex()];<br class="">+ Type *MaskTy = MaskConstantEntry.getType();<br class="">+ if (!MaskConstantEntry.isMachineConstantPoolEntry())<br class="">+ if (auto *C = dyn_cast<ConstantDataSequential>(<br class="">+ MaskConstantEntry.Val.ConstVal)) {<br class="">+ assert(MaskTy == C->getType() &&<br class="">+ "Expected a constant of the same type!");<br class="">+<br class="">+ DecodePSHUFBMask(C, Mask);<br class="">+ assert(Mask.size() == MaskTy->getVectorNumElements() &&<br class="">+ "Shuffle mask has a different size than its type!");<br class="">+ }<br class="">+ }<br class="">+<br class="">+ if (!Mask.empty()) {<br class="">+ bool NeedComma = false;<br class="">+ bool InSrc = false;<br class="">+ for (int M : Mask) {<br class="">+ // Wrap up any prior entry...<br class="">+ if (M == SM_SentinelZero && InSrc) {<br class="">+ InSrc = false;<br class="">+ CS << "]";<br class="">+ }<br class="">+ if (NeedComma)<br class="">+ CS << ",";<br class="">+ else<br class="">+ NeedComma = true;<br class="">+<br class="">+ // Print this shuffle...<br class="">+ if (M == SM_SentinelZero) {<br class="">+ CS << "zero";<br class="">+ } else {<br class="">+ if (!InSrc) {<br class="">+ InSrc = true;<br class="">+ CS << SrcName << "[";<br class="">+ }<br class="">+ CS << M;<br class="">+ }<br class="">+ }<br class="">+ if (InSrc)<br class="">+ CS << "]";<br class="">+<br class="">+ OutStreamer.AddComment(CS.str());<br class="">+ }<br class="">+ break;<br class=""> }<br class=""><br class=""> MCInst TmpInst;<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@cs.uiuc.edu" class="">llvm-commits@cs.uiuc.edu</a><br class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits<br class=""></blockquote><br class=""></blockquote><br class=""></div></div></blockquote></div><br class=""></div></div></body></html>