<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Reapplied in <span style="font-family: Menlo; font-size: 11px;" class="">Committed revision 238035 </span>with a fix for that problem.<div>Let me know if it causes any breakage.</div><div><br class=""></div><div>Thanks,</div><div>-Quentin<br class=""><blockquote type="cite" class=""><div class="">On May 22, 2015, at 10:04 AM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" class="">qcolombet@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><meta http-equiv="Content-Type" content="text/html charset=us-ascii" class=""><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Nevermind, I was able to reproduce.<div class=""><br class=""></div><div class="">I think I know what I did. I slipped in a change required for shrink-wrapping whereas the surrounding code is not ready for this.</div><div class="">Should be a one line fixer if I am right.</div><div class=""><br class=""></div><div class="">Sorry for the breakage.</div><div class=""><br class=""></div><div class="">Thanks,</div><div class="">Q,<br class=""><div class=""><blockquote type="cite" class=""><div class="">On May 22, 2015, at 9:51 AM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" class="">qcolombet@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><meta http-equiv="Content-Type" content="text/html charset=us-ascii" class=""><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Hi Tamas,<div class=""><br class=""></div><div class="">I was not able so far to reproduce the problem with the .cpp you provided me.</div><div class=""><br class=""></div><div class="">Since this change only affects the backend, could you provide me a bitcode file?</div><div class=""><br class=""></div><div class="">Thanks,</div><div class="">-Quentin<br class=""><div class=""><blockquote type="cite" class=""><div class="">On May 22, 2015, at 9:11 AM, Justin Bogner <<a href="mailto:mail@justinbogner.com" class="">mail@justinbogner.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">Tamas Berghammer <</span><a href="mailto:tberghammer@google.com" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">tberghammer@google.com</a><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">> writes:</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">Author: tberghammer<br class="">Date: Fri May 22 05:01:56 2015<br class="">New Revision: 238011<br class=""><br class="">URL:<span class="Apple-converted-space"> </span><a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject-3Frev-3D238011-26view-3Drev&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=K7QzKcULGq8zsqZLzrUFnNYPdXArdk03ucGF6cngi4A&s=Y0EGkRrFYUWroimIXqyx-6WTqBpQ3_c2PX6ORiGFVAw&e=" class="">http://llvm.org/viewvc/llvm-project?rev=238011&view=rev</a><br class="">Log:<br class="">Revert "[X86] Fix a variable name for r237977 so that it works with<br class="">every compilers."<br class="">Revert "[X86] Refactor the prologue emission to prepare for shrink-wrapping."<br class=""></blockquote><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">When reverting, please summarize "why" in the commit message.</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">Similarly, it's helpful to follow up on the thread of the original</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">commit to say it's been reverted.</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">This reverts commit 6b3b93fc8b68a2c806aa992ee4bd3d7f61898d4b.<br class="">This reverts commit ab0b15dff8539826283a59c2dd700a18a9680e0f.<br class=""></blockquote><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">Also, please refer to the svn revision numbers, rather than git hashes.</span><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><br style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class=""><blockquote type="cite" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">Removed:<br class=""> llvm/trunk/lib/Target/X86/X86ExpandPseudo.cpp<br class="">Modified:<br class=""> llvm/trunk/lib/Target/X86/CMakeLists.txt<br class=""> llvm/trunk/lib/Target/X86/X86.h<br class=""> llvm/trunk/lib/Target/X86/X86FrameLowering.cpp<br class=""> llvm/trunk/lib/Target/X86/X86FrameLowering.h<br class=""> llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp<br class=""> llvm/trunk/lib/Target/X86/X86TargetMachine.cpp<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/CMakeLists.txt<br class="">URL:<br class=""><a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_CMakeLists.txt-3Frev-3D238011-26r1-3D238010-26r2-3D238011-26view-3Ddiff&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=K7QzKcULGq8zsqZLzrUFnNYPdXArdk03ucGF6cngi4A&s=AikNepwWjuswH6ONKMdVWWWVCCXg1zWdGkbQ6PL-I_Q&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/CMakeLists.txt?rev=238011&r1=238010&r2=238011&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/CMakeLists.txt (original)<br class="">+++ llvm/trunk/lib/Target/X86/CMakeLists.txt Fri May 22 05:01:56 2015<br class="">@@ -15,7 +15,6 @@ add_public_tablegen_target(X86CommonTabl<br class="">set(sources<br class=""> X86AsmPrinter.cpp<br class=""> X86CallFrameOptimization.cpp<br class="">- X86ExpandPseudo.cpp<br class=""> X86FastISel.cpp<br class=""> X86FloatingPoint.cpp<br class=""> X86FrameLowering.cpp<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86.h<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86.h-3Frev-3D238011-26r1-3D238010-26r2-3D238011-26view-3Ddiff&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=JiZyHu7xvotD0wZPthQtkSy1_sf8ZqJfiLaFR46m2bs&s=ezBzK8h2gldro-x-xVj3tZvmRd9q7bEIfN_jkYW3wTU&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.h?rev=238011&r1=238010&r2=238011&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86.h (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86.h Fri May 22 05:01:56 2015<br class="">@@ -75,11 +75,6 @@ FunctionPass *createX86CallFrameOptimiza<br class="">/// preparation.<br class="">FunctionPass *createX86WinEHStatePass();<br class=""><br class="">-/// Return a Machine IR pass that expands X86-specific pseudo<br class="">-/// instructions into a sequence of actual instructions. This pass<br class="">-/// must run after prologue/epilogue insertion and before lowering<br class="">-/// the MachineInstr to MC.<br class="">-FunctionPass *createX86ExpandPseudoPass();<br class="">} // End llvm namespace<br class=""><br class="">#endif<br class=""><br class="">Removed: llvm/trunk/lib/Target/X86/X86ExpandPseudo.cpp<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86ExpandPseudo.cpp-3Frev-3D238010-26view-3Dauto&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=JiZyHu7xvotD0wZPthQtkSy1_sf8ZqJfiLaFR46m2bs&s=MJBPVTxusPh7er7obGFS-JXgzpIZRvy7q7dBz3K7ZWU&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ExpandPseudo.cpp?rev=238010&view=auto</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86ExpandPseudo.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86ExpandPseudo.cpp (removed)<br class="">@@ -1,188 +0,0 @@<br class="">-//===------- X86ExpandPseudo.cpp - Expand pseudo instructions -------------===//<br class="">-//<br class="">-// The LLVM Compiler Infrastructure<br class="">-//<br class="">-// This file is distributed under the University of Illinois Open Source<br class="">-// License. See LICENSE.TXT for details.<br class="">-//<br class="">-//===----------------------------------------------------------------------===//<br class="">-//<br class="">-// This file contains a pass that expands pseudo instructions into target<br class="">-// instructions to allow proper scheduling, if-conversion, other late<br class="">-// optimizations, or simply the encoding of the instructions.<br class="">-//<br class="">-//===----------------------------------------------------------------------===//<br class="">-<br class="">-#include "X86.h"<br class="">-#include "X86FrameLowering.h"<br class="">-#include "X86InstrBuilder.h"<br class="">-#include "X86InstrInfo.h"<br class="">-#include "X86MachineFunctionInfo.h"<br class="">-#include "X86Subtarget.h"<br class="">-#include "llvm/CodeGen/Passes.h" // For IDs of passes that are preserved.<br class="">-#include "llvm/CodeGen/MachineFunctionPass.h"<br class="">-#include "llvm/CodeGen/MachineInstrBuilder.h"<br class="">-#include "llvm/IR/GlobalValue.h"<br class="">-using namespace llvm;<br class="">-<br class="">-#define DEBUG_TYPE "x86-pseudo"<br class="">-<br class="">-namespace {<br class="">-class X86ExpandPseudo : public MachineFunctionPass {<br class="">-public:<br class="">- static char ID;<br class="">- X86ExpandPseudo() : MachineFunctionPass(ID) {}<br class="">-<br class="">- void getAnalysisUsage(AnalysisUsage &AU) const override {<br class="">- AU.setPreservesCFG();<br class="">- AU.addPreservedID(MachineLoopInfoID);<br class="">- AU.addPreservedID(MachineDominatorsID);<br class="">- MachineFunctionPass::getAnalysisUsage(AU);<br class="">- }<br class="">-<br class="">- const X86Subtarget *STI;<br class="">- const X86InstrInfo *TII;<br class="">- const X86RegisterInfo *TRI;<br class="">- const X86FrameLowering *X86FL;<br class="">-<br class="">- bool runOnMachineFunction(MachineFunction &Fn) override;<br class="">-<br class="">- const char *getPassName() const override {<br class="">- return "X86 pseudo instruction expansion pass";<br class="">- }<br class="">-<br class="">-private:<br class="">- bool ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);<br class="">- bool ExpandMBB(MachineBasicBlock &MBB);<br class="">-};<br class="">-char X86ExpandPseudo::ID = 0;<br class="">-} // End anonymous namespace.<br class="">-<br class="">-/// If \p MBBI is a pseudo instruction, this method expands<br class="">-/// it to the corresponding (sequence of) actual instruction(s).<br class="">-/// \returns true if \p MBBI has been expanded.<br class="">-bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,<br class="">- MachineBasicBlock::iterator MBBI) {<br class="">- MachineInstr &MI = *MBBI;<br class="">- unsigned Opcode = MI.getOpcode();<br class="">- DebugLoc DL = MBBI->getDebugLoc();<br class="">- switch (Opcode) {<br class="">- default:<br class="">- return false;<br class="">- case X86::TCRETURNdi:<br class="">- case X86::TCRETURNri:<br class="">- case X86::TCRETURNmi:<br class="">- case X86::TCRETURNdi64:<br class="">- case X86::TCRETURNri64:<br class="">- case X86::TCRETURNmi64: {<br class="">- bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64;<br class="">- MachineOperand &JumpTarget = MBBI->getOperand(0);<br class="">- MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);<br class="">- assert(StackAdjust.isImm() && "Expecting immediate value.");<br class="">-<br class="">- // Adjust stack pointer.<br class="">- int StackAdj = StackAdjust.getImm();<br class="">-<br class="">- if (StackAdj) {<br class="">- bool Is64Bit = STI->is64Bit();<br class="">- // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.<br class="">- const bool Uses64BitFramePtr =<br class="">- STI->isTarget64BitLP64() || STI->isTargetNaCl64();<br class="">- bool UseLEAForSP =<br class="">- X86FL->useLEAForSPInProlog(*MBB.getParent());<br class="">- unsigned StackPtr = TRI->getStackRegister();<br class="">- // Check for possible merge with preceding ADD instruction.<br class="">- StackAdj += X86FrameLowering::mergeSPUpdates(MBB, MBBI, StackPtr, true);<br class="">- X86FrameLowering::emitSPUpdate(MBB, MBBI, StackPtr, StackAdj, Is64Bit,<br class="">- Uses64BitFramePtr, UseLEAForSP, *TII,<br class="">- *TRI);<br class="">- }<br class="">-<br class="">- // Jump to label or value in register.<br class="">- bool IsWin64 = STI->isTargetWin64();<br class="">- if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdi64) {<br class="">- unsigned Op = (Opcode == X86::TCRETURNdi)<br class="">- ? X86::TAILJMPd<br class="">- : (IsWin64 ? X86::TAILJMPd64_REX : X86::TAILJMPd64);<br class="">- MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));<br class="">- if (JumpTarget.isGlobal())<br class="">- MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),<br class="">- JumpTarget.getTargetFlags());<br class="">- else {<br class="">- assert(JumpTarget.isSymbol());<br class="">- MIB.addExternalSymbol(JumpTarget.getSymbolName(),<br class="">- JumpTarget.getTargetFlags());<br class="">- }<br class="">- } else if (Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64) {<br class="">- unsigned Op = (Opcode == X86::TCRETURNmi)<br class="">- ? X86::TAILJMPm<br class="">- : (IsWin64 ? X86::TAILJMPm64_REX : X86::TAILJMPm64);<br class="">- MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));<br class="">- for (unsigned i = 0; i != 5; ++i)<br class="">- MIB.addOperand(MBBI->getOperand(i));<br class="">- } else if (Opcode == X86::TCRETURNri64) {<br class="">- BuildMI(MBB, MBBI, DL,<br class="">- TII->get(IsWin64 ? X86::TAILJMPr64_REX : X86::TAILJMPr64))<br class="">- .addReg(JumpTarget.getReg(), RegState::Kill);<br class="">- } else {<br class="">- BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr))<br class="">- .addReg(JumpTarget.getReg(), RegState::Kill);<br class="">- }<br class="">-<br class="">- MachineInstr *NewMI = std::prev(MBBI);<br class="">- NewMI->copyImplicitOps(*MBBI->getParent()->getParent(), MBBI);<br class="">-<br class="">- // Delete the pseudo instruction TCRETURN.<br class="">- MBB.erase(MBBI);<br class="">-<br class="">- return true;<br class="">- }<br class="">- case X86::EH_RETURN:<br class="">- case X86::EH_RETURN64: {<br class="">- MachineOperand &DestAddr = MBBI->getOperand(0);<br class="">- assert(DestAddr.isReg() && "Offset should be in register!");<br class="">- const bool Uses64BitFramePtr =<br class="">- STI->isTarget64BitLP64() || STI->isTargetNaCl64();<br class="">- unsigned StackPtr = TRI->getStackRegister();<br class="">- BuildMI(MBB, MBBI, DL,<br class="">- TII->get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), StackPtr)<br class="">- .addReg(DestAddr.getReg());<br class="">- // The EH_RETURN pseudo is really removed during the MC Lowering.<br class="">- return true;<br class="">- }<br class="">- }<br class="">- llvm_unreachable("Previous switch has a fallthrough?");<br class="">-}<br class="">-<br class="">-/// Expand all pseudo instructions contained in \p MBB.<br class="">-/// \returns true if any expansion occurred for \p MBB.<br class="">-bool X86ExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {<br class="">- bool Modified = false;<br class="">-<br class="">- // MBBI may be invalidated by the expansion.<br class="">- MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();<br class="">- while (MBBI != E) {<br class="">- MachineBasicBlock::iterator NMBBI = std::next(MBBI);<br class="">- Modified |= ExpandMI(MBB, MBBI);<br class="">- MBBI = NMBBI;<br class="">- }<br class="">-<br class="">- return Modified;<br class="">-}<br class="">-<br class="">-bool X86ExpandPseudo::runOnMachineFunction(MachineFunction &MF) {<br class="">- STI = &static_cast<const X86Subtarget &>(MF.getSubtarget());<br class="">- TII = STI->getInstrInfo();<br class="">- TRI = STI->getRegisterInfo();<br class="">- X86FL = STI->getFrameLowering();<br class="">-<br class="">- bool Modified = false;<br class="">- for (MachineBasicBlock &MBB : MF)<br class="">- Modified |= ExpandMBB(MBB);<br class="">- return Modified;<br class="">-}<br class="">-<br class="">-/// Returns an instance of the pseudo instruction expansion pass.<br class="">-FunctionPass *llvm::createX86ExpandPseudoPass() {<br class="">- return new X86ExpandPseudo();<br class="">-}<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86FrameLowering.cpp<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86FrameLowering.cpp-3Frev-3D238011-26r1-3D238010-26r2-3D238011-26view-3Ddiff&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=JiZyHu7xvotD0wZPthQtkSy1_sf8ZqJfiLaFR46m2bs&s=9A9XffkBq0V8IGNo0fNqpGknBgpk8-Ons0U4lBJNGYY&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.cpp?rev=238011&r1=238010&r2=238011&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86FrameLowering.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86FrameLowering.cpp Fri May 22 05:01:56 2015<br class="">@@ -205,12 +205,11 @@ static bool isEAXLiveIn(MachineFunction<br class=""><br class="">/// emitSPUpdate - Emit a series of instructions to increment / decrement the<br class="">/// stack pointer by a constant value.<br class="">-void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB,<br class="">- MachineBasicBlock::iterator &MBBI,<br class="">- unsigned StackPtr, int64_t NumBytes,<br class="">- bool Is64BitTarget, bool Is64BitStackPtr,<br class="">- bool UseLEA, const TargetInstrInfo &TII,<br class="">- const TargetRegisterInfo &TRI) {<br class="">+static<br class="">+void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,<br class="">+ unsigned StackPtr, int64_t NumBytes,<br class="">+ bool Is64BitTarget, bool Is64BitStackPtr, bool UseLEA,<br class="">+ const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) {<br class=""> bool isSub = NumBytes < 0;<br class=""> uint64_t Offset = isSub ? -NumBytes : NumBytes;<br class=""> unsigned Opc;<br class="">@@ -313,10 +312,13 @@ void mergeSPUpdatesUp(MachineBasicBlock<br class=""> }<br class="">}<br class=""><br class="">-int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,<br class="">- MachineBasicBlock::iterator &MBBI,<br class="">- unsigned StackPtr,<br class="">- bool doMergeWithPrevious) {<br class="">+/// mergeSPUpdates - Checks the instruction before/after the passed<br class="">+/// instruction. If it is an ADD/SUB/LEA instruction it is deleted argument and<br class="">+/// the stack adjustment is returned as a positive value for ADD/LEA and a<br class="">+/// negative for SUB.<br class="">+static int mergeSPUpdates(MachineBasicBlock &MBB,<br class="">+ MachineBasicBlock::iterator &MBBI, unsigned StackPtr,<br class="">+ bool doMergeWithPrevious) {<br class=""> if ((doMergeWithPrevious && MBBI == MBB.begin()) ||<br class=""> (!doMergeWithPrevious && MBBI == MBB.end()))<br class=""> return 0;<br class="">@@ -965,17 +967,6 @@ void X86FrameLowering::emitPrologue(Mach<br class=""> }<br class="">}<br class=""><br class="">-bool X86FrameLowering::useLEAForSPInProlog(const MachineFunction &MF) const {<br class="">- // We can't use LEA instructions for adjusting the stack pointer if this is a<br class="">- // leaf function in the Win64 ABI. Only ADD instructions may be used to<br class="">- // deallocate the stack.<br class="">- // This means that we can use LEA for SP in two situations:<br class="">- // 1. We *aren't* using the Win64 ABI which means we are free to use LEA.<br class="">- // 2. We *have* a frame pointer which means we are permitted to use LEA.<br class="">- return MF.getSubtarget<X86Subtarget>().useLeaForSP() &&<br class="">- (!MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF));<br class="">-}<br class="">-<br class="">void X86FrameLowering::emitEpilogue(MachineFunction &MF,<br class=""> MachineBasicBlock &MBB) const {<br class=""> const MachineFrameInfo *MFI = MF.getFrameInfo();<br class="">@@ -983,12 +974,14 @@ void X86FrameLowering::emitEpilogue(Mach<br class=""> const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();<br class=""> const X86RegisterInfo *RegInfo = STI.getRegisterInfo();<br class=""> const TargetInstrInfo &TII = *STI.getInstrInfo();<br class="">- MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();<br class="">+ MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();<br class=""> assert(MBBI != MBB.end() && "Returning block has no instructions");<br class="">+ unsigned RetOpcode = MBBI->getOpcode();<br class=""> DebugLoc DL = MBBI->getDebugLoc();<br class=""> bool Is64Bit = STI.is64Bit();<br class=""> // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.<br class=""> const bool Uses64BitFramePtr = STI.isTarget64BitLP64() || STI.isTargetNaCl64();<br class="">+ bool HasFP = hasFP(MF);<br class=""> const bool Is64BitILP32 = STI.isTarget64BitILP32();<br class=""> unsigned SlotSize = RegInfo->getSlotSize();<br class=""> unsigned FramePtr = RegInfo->getFrameRegister(MF);<br class="">@@ -999,9 +992,22 @@ void X86FrameLowering::emitEpilogue(Mach<br class=""><br class=""> bool IsWinEH = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();<br class=""> bool NeedsWinEH = IsWinEH && MF.getFunction()->needsUnwindTableEntry();<br class="">- bool UseLEAForSP = useLEAForSPInProlog(MF);<br class="">+ bool UseLEAForSP = false;<br class=""><br class="">- switch (MBBI->getOpcode()) {<br class="">+ // We can't use LEA instructions for adjusting the stack pointer if this is a<br class="">+ // leaf function in the Win64 ABI. Only ADD instructions may be used to<br class="">+ // deallocate the stack.<br class="">+ if (STI.useLeaForSP()) {<br class="">+ if (!IsWinEH) {<br class="">+ // We *aren't* using the Win64 ABI which means we are free to use LEA.<br class="">+ UseLEAForSP = true;<br class="">+ } else if (HasFP) {<br class="">+ // We *have* a frame pointer which means we are permitted to use LEA.<br class="">+ UseLEAForSP = true;<br class="">+ }<br class="">+ }<br class="">+<br class="">+ switch (RetOpcode) {<br class=""> default:<br class=""> llvm_unreachable("Can only insert epilogue into returning blocks");<br class=""> case X86::RETQ:<br class="">@@ -1106,15 +1112,88 @@ void X86FrameLowering::emitEpilogue(Mach<br class=""> if (NeedsWinEH)<br class=""> BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));<br class=""><br class="">- // Add the return addr area delta back since we are not tail calling.<br class="">- int Offset = -1 * X86FI->getTCReturnAddrDelta();<br class="">- assert(Offset >= 0 && "TCDelta should never be positive");<br class="">- if (Offset) {<br class="">- MBBI = MBB.getFirstTerminator();<br class="">+ // We're returning from function via eh_return.<br class="">+ if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) {<br class="">+ MBBI = MBB.getLastNonDebugInstr();<br class="">+ MachineOperand &DestAddr = MBBI->getOperand(0);<br class="">+ assert(DestAddr.isReg() && "Offset should be in register!");<br class="">+ BuildMI(MBB, MBBI, DL,<br class="">+ TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),<br class="">+ StackPtr).addReg(DestAddr.getReg());<br class="">+ } else if (RetOpcode == X86::TCRETURNri || RetOpcode == X86::TCRETURNdi ||<br class="">+ RetOpcode == X86::TCRETURNmi ||<br class="">+ RetOpcode == X86::TCRETURNri64 || RetOpcode == X86::TCRETURNdi64 ||<br class="">+ RetOpcode == X86::TCRETURNmi64) {<br class="">+ bool isMem = RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64;<br class="">+ // Tail call return: adjust the stack pointer and jump to callee.<br class="">+ MBBI = MBB.getLastNonDebugInstr();<br class="">+ MachineOperand &JumpTarget = MBBI->getOperand(0);<br class="">+ MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);<br class="">+ assert(StackAdjust.isImm() && "Expecting immediate value.");<br class="">+<br class="">+ // Adjust stack pointer.<br class="">+ int StackAdj = StackAdjust.getImm();<br class="">+ int MaxTCDelta = X86FI->getTCReturnAddrDelta();<br class="">+ int Offset = 0;<br class="">+ assert(MaxTCDelta <= 0 && "MaxTCDelta should never be positive");<br class="">+<br class="">+ // Incoporate the retaddr area.<br class="">+ Offset = StackAdj-MaxTCDelta;<br class="">+ assert(Offset >= 0 && "Offset should never be negative");<br class="">+<br class="">+ if (Offset) {<br class="">+ // Check for possible merge with preceding ADD instruction.<br class="">+ Offset += mergeSPUpdates(MBB, MBBI, StackPtr, true);<br class="">+ emitSPUpdate(MBB, MBBI, StackPtr, Offset, Is64Bit, Uses64BitFramePtr,<br class="">+ UseLEAForSP, TII, *RegInfo);<br class="">+ }<br class="">+<br class="">+ // Jump to label or value in register.<br class="">+ bool IsWin64 = STI.isTargetWin64();<br class="">+ if (RetOpcode == X86::TCRETURNdi || RetOpcode == X86::TCRETURNdi64) {<br class="">+ unsigned Op = (RetOpcode == X86::TCRETURNdi)<br class="">+ ? X86::TAILJMPd<br class="">+ : (IsWin64 ? X86::TAILJMPd64_REX : X86::TAILJMPd64);<br class="">+ MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII.get(Op));<br class="">+ if (JumpTarget.isGlobal())<br class="">+ MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),<br class="">+ JumpTarget.getTargetFlags());<br class="">+ else {<br class="">+ assert(JumpTarget.isSymbol());<br class="">+ MIB.addExternalSymbol(JumpTarget.getSymbolName(),<br class="">+ JumpTarget.getTargetFlags());<br class="">+ }<br class="">+ } else if (RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64) {<br class="">+ unsigned Op = (RetOpcode == X86::TCRETURNmi)<br class="">+ ? X86::TAILJMPm<br class="">+ : (IsWin64 ? X86::TAILJMPm64_REX : X86::TAILJMPm64);<br class="">+ MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII.get(Op));<br class="">+ for (unsigned i = 0; i != 5; ++i)<br class="">+ MIB.addOperand(MBBI->getOperand(i));<br class="">+ } else if (RetOpcode == X86::TCRETURNri64) {<br class="">+ BuildMI(MBB, MBBI, DL,<br class="">+ TII.get(IsWin64 ? X86::TAILJMPr64_REX : X86::TAILJMPr64))<br class="">+ .addReg(JumpTarget.getReg(), RegState::Kill);<br class="">+ } else {<br class="">+ BuildMI(MBB, MBBI, DL, TII.get(X86::TAILJMPr)).<br class="">+ addReg(JumpTarget.getReg(), RegState::Kill);<br class="">+ }<br class="">+<br class="">+ MachineInstr *NewMI = std::prev(MBBI);<br class="">+ NewMI->copyImplicitOps(MF, MBBI);<br class="">+<br class="">+ // Delete the pseudo instruction TCRETURN.<br class="">+ MBB.erase(MBBI);<br class="">+ } else if ((RetOpcode == X86::RETQ || RetOpcode == X86::RETL ||<br class="">+ RetOpcode == X86::RETIQ || RetOpcode == X86::RETIL) &&<br class="">+ (X86FI->getTCReturnAddrDelta() < 0)) {<br class="">+ // Add the return addr area delta back since we are not tail calling.<br class="">+ int delta = -1*X86FI->getTCReturnAddrDelta();<br class="">+ MBBI = MBB.getLastNonDebugInstr();<br class=""><br class=""> // Check for possible merge with preceding ADD instruction.<br class="">- Offset += mergeSPUpdates(MBB, MBBI, StackPtr, true);<br class="">- emitSPUpdate(MBB, MBBI, StackPtr, Offset, Is64Bit, Uses64BitFramePtr,<br class="">+ delta += mergeSPUpdates(MBB, MBBI, StackPtr, true);<br class="">+ emitSPUpdate(MBB, MBBI, StackPtr, delta, Is64Bit, Uses64BitFramePtr,<br class=""> UseLEAForSP, TII, *RegInfo);<br class=""> }<br class="">}<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86FrameLowering.h<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86FrameLowering.h-3Frev-3D238011-26r1-3D238010-26r2-3D238011-26view-3Ddiff&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=JiZyHu7xvotD0wZPthQtkSy1_sf8ZqJfiLaFR46m2bs&s=DNVbWLRSWuPcqR873FaSnnItLY1XFoGHbniGP1FZGok&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.h?rev=238011&r1=238010&r2=238011&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86FrameLowering.h (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86FrameLowering.h Fri May 22 05:01:56 2015<br class="">@@ -79,26 +79,6 @@ public:<br class=""> MachineBasicBlock &MBB,<br class=""> MachineBasicBlock::iterator MI) const override;<br class=""><br class="">- /// Check the instruction before/after the passed instruction. If<br class="">- /// it is an ADD/SUB/LEA instruction it is deleted argument and the<br class="">- /// stack adjustment is returned as a positive value for ADD/LEA and<br class="">- /// a negative for SUB.<br class="">- static int mergeSPUpdates(MachineBasicBlock &MBB,<br class="">- MachineBasicBlock::iterator &MBBI,<br class="">- unsigned StackPtr, bool doMergeWithPrevious);<br class="">-<br class="">- /// Emit a series of instructions to increment / decrement the stack<br class="">- /// pointer by a constant value.<br class="">- static void emitSPUpdate(MachineBasicBlock &MBB,<br class="">- MachineBasicBlock::iterator &MBBI, unsigned StackPtr,<br class="">- int64_t NumBytes, bool Is64BitTarget,<br class="">- bool Is64BitStackPtr, bool UseLEA,<br class="">- const TargetInstrInfo &TII,<br class="">- const TargetRegisterInfo &TRI);<br class="">-<br class="">- /// Check that LEA can be use on SP in a prologue sequence for \p MF.<br class="">- bool useLEAForSPInProlog(const MachineFunction &MF) const;<br class="">-<br class="">private:<br class=""> /// convertArgMovsToPushes - This method tries to convert a call sequence<br class=""> /// that uses sub and mov instructions to put the argument onto the stack<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86RegisterInfo.cpp-3Frev-3D238011-26r1-3D238010-26r2-3D238011-26view-3Ddiff&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=JiZyHu7xvotD0wZPthQtkSy1_sf8ZqJfiLaFR46m2bs&s=b7R3bI64W5Fo_cxuFiKOIrYYCDEiaWJzDl8CKOqWjV0&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=238011&r1=238010&r2=238011&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Fri May 22 05:01:56 2015<br class="">@@ -492,8 +492,7 @@ X86RegisterInfo::eliminateFrameIndex(Mac<br class=""> unsigned BasePtr;<br class=""><br class=""> unsigned Opc = MI.getOpcode();<br class="">- bool AfterFPPop = Opc == X86::TAILJMPm64 || Opc == X86::TAILJMPm ||<br class="">- Opc == X86::TCRETURNmi || Opc == X86::TCRETURNmi64;<br class="">+ bool AfterFPPop = Opc == X86::TAILJMPm64 || Opc == X86::TAILJMPm;<br class=""> if (hasBasePointer(MF))<br class=""> BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());<br class=""> else if (needsStackRealignment(MF))<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp<br class="">URL: <a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_X86_X86TargetMachine.cpp-3Frev-3D238011-26r1-3D238010-26r2-3D238011-26view-3Ddiff&d=AwMFAg&c=8hUWFZcy2Z-Za5rBPlktOQ&r=mQ4LZ2PUj9hpadE3cDHZnIdEwhEBrbAstXeMaFoB9tg&m=JiZyHu7xvotD0wZPthQtkSy1_sf8ZqJfiLaFR46m2bs&s=-y_AcdJCRsPavNhLBuWp7hJ5csdDmB1y9u9HuZxP9MI&e=" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=238011&r1=238010&r2=238011&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Fri May 22 05:01:56 2015<br class="">@@ -187,7 +187,6 @@ public:<br class=""> void addPreRegAlloc() override;<br class=""> void addPostRegAlloc() override;<br class=""> void addPreEmitPass() override;<br class="">- void addPreSched2() override;<br class="">};<br class="">} // namespace<br class=""><br class="">@@ -236,8 +235,6 @@ void X86PassConfig::addPostRegAlloc() {<br class=""> addPass(createX86FloatingPointStackifierPass());<br class="">}<br class=""><br class="">-void X86PassConfig::addPreSched2() { addPass(createX86ExpandPseudoPass()); }<br class="">-<br class="">void X86PassConfig::addPreEmitPass() {<br class=""> if (getOptLevel() != CodeGenOpt::None)<br class=""> addPass(createExecutionDependencyFixPass(&X86::VR128RegClass));<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@cs.uiuc.edu" class="">llvm-commits@cs.uiuc.edu</a><br class=""><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br class=""></blockquote><span style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px; float: none; display: inline !important;" class="">_______________________________________________</span><br style="font-family: Helvetica; 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