<div dir="ltr">This is breaking bots and is still not fixed over an *hour* after landing. Not cool. Reverting. Please pay more attention to the bots.<br></div><br><div class="gmail_quote">On Tue, May 12, 2015 at 4:16 PM Quentin Colombet <<a href="mailto:qcolombet@apple.com">qcolombet@apple.com</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div style="word-wrap:break-word">Hi Reid,<div><br></div><div>Looks like this commit broke at least a bot:</div><div><a href="http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_check/6959/consoleFull#10105486868254eaf0-7326-4999-85b0-388101f2d404" target="_blank">http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_check/6959/consoleFull#10105486868254eaf0-7326-4999-85b0-388101f2d404</a></div><div><br></div><div>Could you investigate please?</div><div><br></div><div>Thanks,</div><div>-Quentin</div></div><div style="word-wrap:break-word"><div><br><div><blockquote type="cite"><div>On May 12, 2015, at 1:56 PM, Reid Kleckner <<a href="mailto:reid@kleckner.net" target="_blank">reid@kleckner.net</a>> wrote:</div><br><div>Author: rnk<br>Date: Tue May 12 15:56:32 2015<br>New Revision: 237175<br><br>URL: <a href="http://llvm.org/viewvc/llvm-project?rev=237175&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=237175&view=rev</a><br>Log:<br>[X86] Always return the sret parameter in eax/rax, even on 32-bit<br><br>Summary:<br>This rule was always in the old SysV i386 ABI docs and the new ones that<br>H.J. Lu has put together, but we never noticed:<br><br> EAX scratch register; also used to return integer and pointer values<br> from functions; also stores the address of a returned struct or union<br><br>Fixes PR23491.<br><br>Reviewers: majnemer<br><br>Subscribers: llvm-commits<br><br>Differential Revision: <a href="http://reviews.llvm.org/D9715" target="_blank">http://reviews.llvm.org/D9715</a><br><br>Modified:<br> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br> llvm/trunk/test/CodeGen/X86/cmovcmov.ll<br> llvm/trunk/test/CodeGen/X86/sret-implicit.ll<br><br>Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=237175&r1=237174&r2=237175&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=237175&r1=237174&r2=237175&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue May 12 15:56:32 2015<br>@@ -2000,9 +2000,8 @@ X86TargetLowering::LowerReturn(SDValue C<br> RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));<br> }<br><br>- // The x86-64 ABIs require that for returning structs by value we copy<br>+ // All x86 ABIs require that for returning structs by value we copy<br> // the sret argument into %rax/%eax (depending on ABI) for the return.<br>- // Win32 requires us to put the sret argument to %eax as well.<br> // We saved the argument into a virtual register in the entry block,<br> // so now we copy the value out and into %rax/%eax.<br> //<br>@@ -2011,8 +2010,6 @@ X86TargetLowering::LowerReturn(SDValue C<br> // false, then an sret argument may be implicitly inserted in the SelDAG. In<br> // either case FuncInfo->setSRetReturnReg() will have been called.<br> if (unsigned SRetReg = FuncInfo->getSRetReturnReg()) {<br>- assert((Subtarget->is64Bit() || Subtarget->isTargetKnownWindowsMSVC()) &&<br>- "No need for an sret register");<br> SDValue Val = DAG.getCopyFromReg(Chain, dl, SRetReg, getPointerTy());<br><br> unsigned RetValReg<br>@@ -2434,24 +2431,21 @@ X86TargetLowering::LowerFormalArguments(<br> InVals.push_back(ArgValue);<br> }<br><br>- if (Subtarget->is64Bit() || Subtarget->isTargetKnownWindowsMSVC()) {<br>- for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {<br>- // The x86-64 ABIs require that for returning structs by value we copy<br>- // the sret argument into %rax/%eax (depending on ABI) for the return.<br>- // Win32 requires us to put the sret argument to %eax as well.<br>- // Save the argument into a virtual register so that we can access it<br>- // from the return points.<br>- if (Ins[i].Flags.isSRet()) {<br>- unsigned Reg = FuncInfo->getSRetReturnReg();<br>- if (!Reg) {<br>- MVT PtrTy = getPointerTy();<br>- Reg = MF.getRegInfo().createVirtualRegister(getRegClassFor(PtrTy));<br>- FuncInfo->setSRetReturnReg(Reg);<br>- }<br>- SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, InVals[i]);<br>- Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain);<br>- break;<br>+ for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {<br>+ // All x86 ABIs require that for returning structs by value we copy the<br>+ // sret argument into %rax/%eax (depending on ABI) for the return. Save<br>+ // the argument into a virtual register so that we can access it from the<br>+ // return points.<br>+ if (Ins[i].Flags.isSRet()) {<br>+ unsigned Reg = FuncInfo->getSRetReturnReg();<br>+ if (!Reg) {<br>+ MVT PtrTy = getPointerTy();<br>+ Reg = MF.getRegInfo().createVirtualRegister(getRegClassFor(PtrTy));<br>+ FuncInfo->setSRetReturnReg(Reg);<br> }<br>+ SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, InVals[i]);<br>+ Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain);<br>+ break;<br> }<br> }<br><br><br>Modified: llvm/trunk/test/CodeGen/X86/cmovcmov.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmovcmov.ll?rev=237175&r1=237174&r2=237175&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmovcmov.ll?rev=237175&r1=237174&r2=237175&view=diff</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/X86/cmovcmov.ll (original)<br>+++ llvm/trunk/test/CodeGen/X86/cmovcmov.ll Tue May 12 15:56:32 2015<br>@@ -143,19 +143,19 @@ entry:<br> ; NOCMOV-NEXT: jp [[TBB]]<br> ; NOCMOV-NEXT: leal 24(%esp), %eax<br> ; NOCMOV-NEXT: [[TBB]]:<br>-; NOCMOV-NEXT: movl (%eax), %eax<br>-; NOCMOV-NEXT: leal 44(%esp), %ecx<br>+; NOCMOV-NEXT: movl (%eax), %ecx<br>+; NOCMOV-NEXT: leal 44(%esp), %edx<br> ; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]<br> ; NOCMOV-NEXT: jp [[TBB]]<br>-; NOCMOV-NEXT: leal 28(%esp), %ecx<br>+; NOCMOV-NEXT: leal 28(%esp), %edx<br> ; NOCMOV-NEXT: [[TBB]]:<br>-; NOCMOV-NEXT: movl (%ecx), %ecx<br>+; NOCMOV-NEXT: movl 12(%esp), %eax<br>+; NOCMOV-NEXT: movl (%edx), %edx<br> ; NOCMOV-NEXT: leal 48(%esp), %esi<br> ; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]<br> ; NOCMOV-NEXT: jp [[TBB]]<br> ; NOCMOV-NEXT: leal 32(%esp), %esi<br> ; NOCMOV-NEXT: [[TBB]]:<br>-; NOCMOV-NEXT: movl 12(%esp), %edx<br> ; NOCMOV-NEXT: movl (%esi), %esi<br> ; NOCMOV-NEXT: leal 52(%esp), %edi<br> ; NOCMOV-NEXT: jne [[TBB:.LBB[0-9_]+]]<br>@@ -163,10 +163,10 @@ entry:<br> ; NOCMOV-NEXT: leal 36(%esp), %edi<br> ; NOCMOV-NEXT: [[TBB]]:<br> ; NOCMOV-NEXT: movl (%edi), %edi<br>-; NOCMOV-NEXT: movl %edi, 12(%edx)<br>-; NOCMOV-NEXT: movl %esi, 8(%edx)<br>-; NOCMOV-NEXT: movl %ecx, 4(%edx)<br>-; NOCMOV-NEXT: movl %eax, (%edx)<br>+; NOCMOV-NEXT: movl %edi, 12(%eax)<br>+; NOCMOV-NEXT: movl %esi, 8(%eax)<br>+; NOCMOV-NEXT: movl %edx, 4(%eax)<br>+; NOCMOV-NEXT: movl %ecx, (%eax)<br> ; NOCMOV-NEXT: popl %esi<br> ; NOCMOV-NEXT: popl %edi<br> ; NOCMOV-NEXT: retl $4<br><br>Modified: llvm/trunk/test/CodeGen/X86/sret-implicit.ll<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sret-implicit.ll?rev=237175&r1=237174&r2=237175&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sret-implicit.ll?rev=237175&r1=237174&r2=237175&view=diff</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/X86/sret-implicit.ll (original)<br>+++ llvm/trunk/test/CodeGen/X86/sret-implicit.ll Tue May 12 15:56:32 2015<br>@@ -1,12 +1,34 @@<br>-; RUN: llc -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s<br>-; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s<br>-; RUN: llc -mtriple=x86_64-apple-darwin8 -terminal-rule < %s | FileCheck %s<br>-; RUN: llc -mtriple=x86_64-pc-linux -terminal-rule < %s | FileCheck %s<br>-<br>-; CHECK-LABEL: return32<br>-; CHECK-DAG: movq<span style="white-space:pre-wrap"> </span>$0, (%rdi)<br>-; CHECK-DAG: movq<span style="white-space:pre-wrap"> </span>%rdi, %rax<br>-; CHECK: retq<br>-define i256 @return32() {<br>+; RUN: llc -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s --check-prefix=X64<br>+; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s --check-prefix=X64<br>+; RUN: llc -mtriple=i686-pc-linux < %s | FileCheck %s --check-prefix=X86<br>+; RUN: llc -mtriple=x86_64-apple-darwin8 -terminal-rule < %s | FileCheck %s --check-prefix=X64<br>+; RUN: llc -mtriple=x86_64-pc-linux -terminal-rule < %s | FileCheck %s --check-prefix=X64<br>+<br>+define void @sret_void(i32* sret %p) {<br>+ store i32 0, i32* %p<br>+ ret void<br>+}<br>+<br>+; X64-LABEL: sret_void<br>+; X64-DAG: movl $0, (%rdi)<br>+; X64-DAG: movq %rdi, %rax<br>+; X64: retq<br>+<br>+; X86-LABEL: sret_void<br>+; X86: movl 4(%esp), %eax<br>+; X86: movl $0, (%eax)<br>+; X86: retl<br>+<br>+define i256 @sret_demoted() {<br> ret i256 0<br> }<br>+<br>+; X64-LABEL: sret_demoted<br>+; X64-DAG: movq $0, (%rdi)<br>+; X64-DAG: movq %rdi, %rax<br>+; X64: retq<br>+<br>+; X86-LABEL: sret_demoted<br>+; X86: movl 4(%esp), %eax<br>+; X86: movl $0, (%eax)<br>+; X86: retl<br><br><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br></div></blockquote></div><br></div></div>_______________________________________________<br>
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