<div dir="ltr"><div>I don't know if it qualifies as undefined behavior, but Takumi replied to the r236546 thread with some valgrind output that shows the bug:<br><br> ==9953== Address 0x631bdb0 is 32 bytes inside a block of size 80 free'd<br>
==9953== at 0x4C26B66: operator delete[](void*) (vg_replace_malloc.c:515)<br>
==9953== by 0x1E697C3: llvm::SelectionDAG::DeallocateNode(llvm::SDNode*) (SelectionDAG.cpp:710)<br>
==9953== by 0x1E6965B: llvm::SelectionDAG::DeleteNodeNotInCSEMaps(llvm::SDNode*) (SelectionDAG.cpp:696)<br>
==9953== by 0x1E695A1: llvm::SelectionDAG::DeleteNode(llvm::SDNode*) (SelectionDAG.cpp:686)<br>
==9953== by 0x1D8C855: (anonymous namespace)::DAGCombiner::deleteAndRecombine(llvm::SDNode*) (DAGCombiner.cpp:513)<br>
==9953== by 0x1D8EBAF: (anonymous namespace)::DAGCombiner::CombineTo(llvm::SDNode*, llvm::SDValue const*, unsigned int, bool) (DAGCombiner.cpp:848)<br>
<br></div>This looks independent of anything to do with the FMF changes; I can cause this by simply replacing the *non-flags-node* allocation case to return a plain SDNode rather than a BinarySDNode.<br><br><div>So there's a bug when we're recycling the operand memory and/or morphing a node.<br></div><div><br></div><div>That said, my patch was overstepping by deriving a node with flags directly from SDNode and, therefore, circumventing the allocation optimization of a BinarySDNode. I'm assuming we have 16 versions of SelectionDAG.getNode() for a good reason. :)<br><br></div><div>I'll redo my patch to derive from BinarySDNode and then figure out how to handle unary, ternary, and other cases independently of this first patch.<br></div><div><br></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Wed, May 6, 2015 at 8:28 AM, Hal Finkel <span dir="ltr"><<a href="mailto:hfinkel@anl.gov" target="_blank">hfinkel@anl.gov</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">----- Original Message -----<br>
> From: "NAKAMURA Takumi" <<a href="mailto:geek4civic@gmail.com">geek4civic@gmail.com</a>><br>
> To: <a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>
> Sent: Wednesday, May 6, 2015 9:03:13 AM<br>
> Subject: [llvm] r236600 - Revert r236546, "propagate IR-level fast-math-flags to DAG nodes (NFC)"<br>
><br>
> Author: chapuni<br>
> Date: Wed May 6 09:03:12 2015<br>
> New Revision: 236600<br>
><br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=236600&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=236600&view=rev</a><br>
> Log:<br>
> Revert r236546, "propagate IR-level fast-math-flags to DAG nodes<br>
> (NFC)"<br>
><br>
> It caused undefined behavior.<br>
<br>
</span>Where? In what?<br>
<br>
-Hal<br>
<div class="HOEnZb"><div class="h5"><br>
><br>
> Modified:<br>
> llvm/trunk/include/llvm/CodeGen/SelectionDAG.h<br>
> llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
> llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp<br>
> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
><br>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h<br>
> URL:<br>
> <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=236600&r1=236599&r2=236600&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=236600&r1=236599&r2=236600&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)<br>
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Wed May 6<br>
> 09:03:12 2015<br>
> @@ -655,7 +655,7 @@ public:<br>
> SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT);<br>
> SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N);<br>
> SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,<br>
> SDValue N2,<br>
> - const SDNodeFlags *Flags = nullptr);<br>
> + bool nuw = false, bool nsw = false, bool exact =<br>
> false);<br>
> SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,<br>
> SDValue N2,<br>
> SDValue N3);<br>
> SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,<br>
> SDValue N2,<br>
> @@ -978,7 +978,8 @@ public:<br>
><br>
> /// Get the specified node if it's already available, or else<br>
> return NULL.<br>
> SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTs,<br>
> ArrayRef<SDValue> Ops,<br>
> - const SDNodeFlags *Flags = nullptr);<br>
> + bool nuw = false, bool nsw = false,<br>
> + bool exact = false);<br>
><br>
> /// Creates a SDDbgValue node.<br>
> SDDbgValue *getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,<br>
> unsigned R,<br>
> @@ -1235,8 +1236,9 @@ private:<br>
><br>
> void allnodes_clear();<br>
><br>
> - SDNode *GetSDNodeWithFlags(unsigned Opcode, SDLoc DL, SDVTList<br>
> VTs,<br>
> - ArrayRef<SDValue> Ops, const<br>
> SDNodeFlags *Flags);<br>
> + BinarySDNode *GetBinarySDNode(unsigned Opcode, SDLoc DL, SDVTList<br>
> VTs,<br>
> + SDValue N1, SDValue N2, bool nuw,<br>
> bool nsw,<br>
> + bool exact);<br>
><br>
> /// List of non-single value types.<br>
> FoldingSet<SDVTListNode> VTListMap;<br>
><br>
> Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h<br>
> URL:<br>
> <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=236600&r1=236599&r2=236600&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=236600&r1=236599&r2=236600&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)<br>
> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed May 6<br>
> 09:03:12 2015<br>
> @@ -981,44 +981,6 @@ public:<br>
> (NoSignedZeros << 6) | (AllowReciprocal << 7);<br>
> }<br>
> };<br>
> -<br>
> -/// Returns true if the opcode is an operation with optional<br>
> optimization flags.<br>
> -static bool mayHaveOptimizationFlags(unsigned Opcode) {<br>
> - switch (Opcode) {<br>
> - case ISD::SDIV:<br>
> - case ISD::UDIV:<br>
> - case ISD::SRA:<br>
> - case ISD::SRL:<br>
> - case ISD::MUL:<br>
> - case ISD::ADD:<br>
> - case ISD::SUB:<br>
> - case ISD::SHL:<br>
> - case ISD::FADD:<br>
> - case ISD::FDIV:<br>
> - case ISD::FMUL:<br>
> - case ISD::FREM:<br>
> - case ISD::FSUB:<br>
> - return true;<br>
> - default:<br>
> - return false;<br>
> - }<br>
> -}<br>
> -/// This class is an extension of SDNode used from instructions that<br>
> may have<br>
> -/// associated extra flags.<br>
> -class SDNodeWithFlags : public SDNode {<br>
> -public:<br>
> - SDNodeFlags Flags;<br>
> - SDNodeWithFlags(unsigned Opc, unsigned Order, DebugLoc dl,<br>
> SDVTList VTs,<br>
> - ArrayRef<SDValue> Ops, const SDNodeFlags<br>
> &NodeFlags)<br>
> - : SDNode(Opc, Order, dl, VTs, Ops) {<br>
> - Flags = NodeFlags;<br>
> - }<br>
> -<br>
> - // This is used to implement dyn_cast, isa, and other type<br>
> queries.<br>
> - static bool classof(const SDNode *N) {<br>
> - return mayHaveOptimizationFlags(N->getOpcode());<br>
> - }<br>
> -};<br>
><br>
> /// This class is used for single-operand SDNodes. This is solely<br>
> /// to allow co-allocation of node operands with the node itself.<br>
> @@ -1044,6 +1006,36 @@ public:<br>
> }<br>
> };<br>
><br>
> +/// Returns true if the opcode is a binary operation with flags.<br>
> +static bool isBinOpWithFlags(unsigned Opcode) {<br>
> + switch (Opcode) {<br>
> + case ISD::SDIV:<br>
> + case ISD::UDIV:<br>
> + case ISD::SRA:<br>
> + case ISD::SRL:<br>
> + case ISD::MUL:<br>
> + case ISD::ADD:<br>
> + case ISD::SUB:<br>
> + case ISD::SHL:<br>
> + return true;<br>
> + default:<br>
> + return false;<br>
> + }<br>
> +}<br>
> +<br>
> +/// This class is an extension of BinarySDNode<br>
> +/// used from those opcodes that have associated extra flags.<br>
> +class BinaryWithFlagsSDNode : public BinarySDNode {<br>
> +public:<br>
> + SDNodeFlags Flags;<br>
> + BinaryWithFlagsSDNode(unsigned Opc, unsigned Order, DebugLoc dl,<br>
> SDVTList VTs,<br>
> + SDValue X, SDValue Y)<br>
> + : BinarySDNode(Opc, Order, dl, VTs, X, Y), Flags() { }<br>
> + static bool classof(const SDNode *N) {<br>
> + return isBinOpWithFlags(N->getOpcode());<br>
> + }<br>
> +};<br>
> +<br>
> /// This class is used for three-operand SDNodes. This is solely<br>
> /// to allow co-allocation of node operands with the node itself.<br>
> class TernarySDNode : public SDNode {<br>
><br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>
> URL:<br>
> <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=236600&r1=236599&r2=236600&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=236600&r1=236599&r2=236600&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed May 6<br>
> 09:03:12 2015<br>
> @@ -1452,9 +1452,12 @@ SDValue DAGCombiner::combine(SDNode *N)<br>
> if (isa<ConstantSDNode>(N0) || !isa<ConstantSDNode>(N1)) {<br>
> SDValue Ops[] = {N1, N0};<br>
> SDNode *CSENode;<br>
> - if (auto *FlagsNode = dyn_cast<SDNodeWithFlags>(N)) {<br>
> - CSENode = DAG.getNodeIfExists(N->getOpcode(),<br>
> N->getVTList(),<br>
> - Ops, &FlagsNode->Flags);<br>
> + if (const BinaryWithFlagsSDNode *BinNode =<br>
> + dyn_cast<BinaryWithFlagsSDNode>(N)) {<br>
> + CSENode = DAG.getNodeIfExists(N->getOpcode(),<br>
> N->getVTList(), Ops,<br>
> +<br>
> BinNode->Flags.hasNoUnsignedWrap(),<br>
> +<br>
> BinNode->Flags.hasNoSignedWrap(),<br>
> + BinNode->Flags.hasExact());<br>
> } else {<br>
> CSENode = DAG.getNodeIfExists(N->getOpcode(),<br>
> N->getVTList(), Ops);<br>
> }<br>
><br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp<br>
> URL:<br>
> <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=236600&r1=236599&r2=236600&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=236600&r1=236599&r2=236600&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed May 6<br>
> 09:03:12 2015<br>
> @@ -400,22 +400,18 @@ static void AddNodeIDOperands(FoldingSet<br>
> }<br>
> }<br>
><br>
> -/// Add logical or fast math flag values to FoldingSetNodeID value.<br>
> -static void AddNodeIDFlags(FoldingSetNodeID &ID, unsigned Opcode,<br>
> - const SDNodeFlags *Flags) {<br>
> - if (!Flags || !mayHaveOptimizationFlags(Opcode))<br>
> - return;<br>
> -<br>
> - unsigned RawFlags = Flags->getRawFlags();<br>
> - // If no flags are set, do not alter the ID. This saves time and<br>
> allows<br>
> - // a gradual increase in API usage of the optional optimization<br>
> flags.<br>
> - if (RawFlags != 0)<br>
> - ID.AddInteger(RawFlags);<br>
> +static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw,<br>
> bool nsw,<br>
> + bool exact) {<br>
> + ID.AddBoolean(nuw);<br>
> + ID.AddBoolean(nsw);<br>
> + ID.AddBoolean(exact);<br>
> }<br>
><br>
> -static void AddNodeIDFlags(FoldingSetNodeID &ID, const SDNode *N) {<br>
> - if (auto *Node = dyn_cast<SDNodeWithFlags>(N))<br>
> - AddNodeIDFlags(ID, Node->getOpcode(), &Node->Flags);<br>
> +/// AddBinaryNodeIDCustom - Add BinarySDNodes special infos<br>
> +static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned<br>
> Opcode,<br>
> + bool nuw, bool nsw, bool exact) {<br>
> + if (isBinOpWithFlags(Opcode))<br>
> + AddBinaryNodeIDCustom(ID, nuw, nsw, exact);<br>
> }<br>
><br>
> static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,<br>
> @@ -510,6 +506,21 @@ static void AddNodeIDCustom(FoldingSetNo<br>
> ID.AddInteger(ST->getPointerInfo().getAddrSpace());<br>
> break;<br>
> }<br>
> + case ISD::SDIV:<br>
> + case ISD::UDIV:<br>
> + case ISD::SRA:<br>
> + case ISD::SRL:<br>
> + case ISD::MUL:<br>
> + case ISD::ADD:<br>
> + case ISD::SUB:<br>
> + case ISD::SHL: {<br>
> + const BinaryWithFlagsSDNode *BinNode =<br>
> cast<BinaryWithFlagsSDNode>(N);<br>
> + AddBinaryNodeIDCustom(ID, N->getOpcode(),<br>
> + BinNode->Flags.hasNoUnsignedWrap(),<br>
> + BinNode->Flags.hasNoSignedWrap(),<br>
> + BinNode->Flags.hasExact());<br>
> + break;<br>
> + }<br>
> case ISD::ATOMIC_CMP_SWAP:<br>
> case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:<br>
> case ISD::ATOMIC_SWAP:<br>
> @@ -553,8 +564,6 @@ static void AddNodeIDCustom(FoldingSetNo<br>
> }<br>
> } // end switch (N->getOpcode())<br>
><br>
> - AddNodeIDFlags(ID, N);<br>
> -<br>
> // Target specific memory nodes could also have address spaces to<br>
> check.<br>
> if (N->isTargetMemoryOpcode())<br>
> ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());<br>
> @@ -949,22 +958,22 @@ void SelectionDAG::allnodes_clear() {<br>
> DeallocateNode(AllNodes.begin());<br>
> }<br>
><br>
> -SDNode *SelectionDAG::GetSDNodeWithFlags(unsigned Opcode, SDLoc DL,<br>
> - SDVTList VTs,<br>
> ArrayRef<SDValue> Ops,<br>
> - const SDNodeFlags *Flags) {<br>
> - if (mayHaveOptimizationFlags(Opcode)) {<br>
> - // If no flags were passed in, use a default flags object.<br>
> - SDNodeFlags F;<br>
> - if (Flags == nullptr)<br>
> - Flags = &F;<br>
> -<br>
> - SDNodeWithFlags *NodeWithFlags = new (NodeAllocator)<br>
> SDNodeWithFlags(<br>
> - Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, Ops, *Flags);<br>
> - return NodeWithFlags;<br>
> +BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc<br>
> DL,<br>
> + SDVTList VTs, SDValue<br>
> N1,<br>
> + SDValue N2, bool nuw,<br>
> bool nsw,<br>
> + bool exact) {<br>
> + if (isBinOpWithFlags(Opcode)) {<br>
> + BinaryWithFlagsSDNode *FN = new (NodeAllocator)<br>
> BinaryWithFlagsSDNode(<br>
> + Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);<br>
> + FN->Flags.setNoUnsignedWrap(nuw);<br>
> + FN->Flags.setNoSignedWrap(nsw);<br>
> + FN->Flags.setExact(exact);<br>
> +<br>
> + return FN;<br>
> }<br>
><br>
> - SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),<br>
> - DL.getDebugLoc(), VTs,<br>
> Ops);<br>
> + BinarySDNode *N = new (NodeAllocator)<br>
> + BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs,<br>
> N1, N2);<br>
> return N;<br>
> }<br>
><br>
> @@ -3192,7 +3201,7 @@ SDValue SelectionDAG::FoldConstantArithm<br>
> }<br>
><br>
> SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,<br>
> SDValue N1,<br>
> - SDValue N2, const SDNodeFlags *Flags)<br>
> {<br>
> + SDValue N2, bool nuw, bool nsw, bool<br>
> exact) {<br>
> ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());<br>
> ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());<br>
> switch (Opcode) {<br>
> @@ -3654,23 +3663,24 @@ SDValue SelectionDAG::getNode(unsigned O<br>
> }<br>
><br>
> // Memoize this node if possible.<br>
> - SDNode *N;<br>
> + BinarySDNode *N;<br>
> SDVTList VTs = getVTList(VT);<br>
> - SDValue Ops[] = { N1, N2 };<br>
> + const bool BinOpHasFlags = isBinOpWithFlags(Opcode);<br>
> if (VT != MVT::Glue) {<br>
> SDValue Ops[] = {N1, N2};<br>
> FoldingSetNodeID ID;<br>
> AddNodeIDNode(ID, Opcode, VTs, Ops);<br>
> - AddNodeIDFlags(ID, Opcode, Flags);<br>
> + if (BinOpHasFlags)<br>
> + AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);<br>
> void *IP = nullptr;<br>
> if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))<br>
> return SDValue(E, 0);<br>
><br>
> - N = GetSDNodeWithFlags(Opcode, DL, VTs, Ops, Flags);<br>
> -<br>
> + N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);<br>
> +<br>
> CSEMap.InsertNode(N, IP);<br>
> } else {<br>
> - N = GetSDNodeWithFlags(Opcode, DL, VTs, Ops, Flags);<br>
> + N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);<br>
> }<br>
><br>
> InsertNode(N);<br>
> @@ -5974,12 +5984,13 @@ SelectionDAG::getTargetInsertSubreg(int<br>
> /// getNodeIfExists - Get the specified node if it's already<br>
> available, or<br>
> /// else return NULL.<br>
> SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList<br>
> VTList,<br>
> - ArrayRef<SDValue> Ops,<br>
> - const SDNodeFlags *Flags) {<br>
> + ArrayRef<SDValue> Ops, bool<br>
> nuw, bool nsw,<br>
> + bool exact) {<br>
> if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {<br>
> FoldingSetNodeID ID;<br>
> AddNodeIDNode(ID, Opcode, VTList, Ops);<br>
> - AddNodeIDFlags(ID, Opcode, Flags);<br>
> + if (isBinOpWithFlags(Opcode))<br>
> + AddBinaryNodeIDCustom(ID, nuw, nsw, exact);<br>
> void *IP = nullptr;<br>
> if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))<br>
> return E;<br>
><br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
> URL:<br>
> <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=236600&r1=236599&r2=236600&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=236600&r1=236599&r2=236600&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp<br>
> (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed<br>
> May 6 09:03:12 2015<br>
> @@ -2139,8 +2139,6 @@ void SelectionDAGBuilder::visitBinary(co<br>
> bool nuw = false;<br>
> bool nsw = false;<br>
> bool exact = false;<br>
> - FastMathFlags FMF;<br>
> -<br>
> if (const OverflowingBinaryOperator *OFBinOp =<br>
> dyn_cast<const OverflowingBinaryOperator>(&I)) {<br>
> nuw = OFBinOp->hasNoUnsignedWrap();<br>
> @@ -2150,20 +2148,8 @@ void SelectionDAGBuilder::visitBinary(co<br>
> dyn_cast<const PossiblyExactOperator>(&I))<br>
> exact = ExactOp->isExact();<br>
><br>
> - if (const FPMathOperator *FPOp = dyn_cast<const<br>
> FPMathOperator>(&I))<br>
> - FMF = FPOp->getFastMathFlags();<br>
> -<br>
> - SDNodeFlags Flags;<br>
> - Flags.setAllowReciprocal(FMF.allowReciprocal());<br>
> - Flags.setExact(exact);<br>
> - Flags.setNoInfs(FMF.noInfs());<br>
> - Flags.setNoNaNs(FMF.noNaNs());<br>
> - Flags.setNoSignedWrap(nsw);<br>
> - Flags.setNoSignedZeros(FMF.noSignedZeros());<br>
> - Flags.setNoUnsignedWrap(nuw);<br>
> - Flags.setUnsafeAlgebra(FMF.unsafeAlgebra());<br>
> SDValue BinNodeValue = DAG.getNode(OpCode, getCurSDLoc(),<br>
> Op1.getValueType(),<br>
> - Op1, Op2, &Flags);<br>
> + Op1, Op2, nuw, nsw, exact);<br>
> setValue(&I, BinNodeValue);<br>
> }<br>
><br>
> @@ -2212,12 +2198,8 @@ void SelectionDAGBuilder::visitShift(con<br>
> exact = ExactOp->isExact();<br>
> }<br>
><br>
> - SDNodeFlags Flags;<br>
> - Flags.setExact(exact);<br>
> - Flags.setNoSignedWrap(nsw);<br>
> - Flags.setNoUnsignedWrap(nuw);<br>
> SDValue Res = DAG.getNode(Opcode, getCurSDLoc(),<br>
> Op1.getValueType(), Op1, Op2,<br>
> - &Flags);<br>
> + nuw, nsw, exact);<br>
> setValue(&I, Res);<br>
> }<br>
><br>
><br>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp<br>
> URL:<br>
> <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=236600&r1=236599&r2=236600&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=236600&r1=236599&r2=236600&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)<br>
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Wed May 6<br>
> 09:03:12 2015<br>
> @@ -2660,9 +2660,8 @@ SDValue TargetLowering::BuildExactSDIV(S<br>
> // TODO: For UDIV use SRL instead of SRA.<br>
> SDValue Amt = DAG.getConstant(ShAmt, dl,<br>
> getShiftAmountTy(Op1.getValueType()));<br>
> - SDNodeFlags Flags;<br>
> - Flags.setExact(true);<br>
> - Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt,<br>
> &Flags);<br>
> + Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt,<br>
> false, false,<br>
> + true);<br>
> d = d.ashr(ShAmt);<br>
> }<br>
><br>
><br>
> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
> URL:<br>
> <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=236600&r1=236599&r2=236600&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=236600&r1=236599&r2=236600&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed May 6 09:03:12<br>
> 2015<br>
> @@ -12561,8 +12561,9 @@ SDValue X86TargetLowering::EmitTest(SDVa<br>
> case ISD::SUB:<br>
> case ISD::MUL:<br>
> case ISD::SHL: {<br>
> - const SDNodeWithFlags *Node =<br>
> cast<SDNodeWithFlags>(Op.getNode());<br>
> - if (Node->Flags.hasNoSignedWrap())<br>
> + const BinaryWithFlagsSDNode *BinNode =<br>
> + cast<BinaryWithFlagsSDNode>(Op.getNode());<br>
> + if (BinNode->Flags.hasNoSignedWrap())<br>
> break;<br>
> }<br>
> default:<br>
><br>
><br>
> _______________________________________________<br>
> llvm-commits mailing list<br>
> <a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>
> <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br>
><br>
<br>
</div></div><span class="HOEnZb"><font color="#888888">--<br>
Hal Finkel<br>
Assistant Computational Scientist<br>
Leadership Computing Facility<br>
Argonne National Laboratory<br>
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</div></div></blockquote></div><br></div>